static int anx9805_train(struct nouveau_i2c_port *port, int link_nr, int link_bw, bool enh) { struct anx9805_i2c_port *chan = (void *)port; struct nouveau_i2c_port *mast = (void *)nv_object(chan)->parent; u8 tmp, i; nv_wri2cr(mast, chan->addr, 0xa0, link_bw); nv_wri2cr(mast, chan->addr, 0xa1, link_nr | (enh ? 0x80 : 0x00)); nv_wri2cr(mast, chan->addr, 0xa2, 0x01); nv_wri2cr(mast, chan->addr, 0xa8, 0x01); i = 0; while ((tmp = nv_rdi2cr(mast, chan->addr, 0xa8)) & 0x01) { mdelay(5); if (i++ == 100) { nv_error(port, "link training timed out\n"); return -ETIMEDOUT; } } if (tmp & 0x70) { nv_error(port, "link training failed: 0x%02x\n", tmp); return -EIO; } return 1; }
static int anx9805_xfer(struct i2c_adapter *adap, struct i2c_msg *msgs, int num) { struct anx9805_i2c_port *port = adap->algo_data; struct nouveau_i2c_port *mast = (void *)nv_object(port)->parent; struct i2c_msg *msg = msgs; int ret = -ETIMEDOUT; int i, j, cnt = num; u8 seg = 0x00, off = 0x00, tmp; tmp = nv_rdi2cr(mast, port->ctrl, 0x07) & ~0x10; nv_wri2cr(mast, port->ctrl, 0x07, tmp | 0x10); nv_wri2cr(mast, port->ctrl, 0x07, tmp); nv_wri2cr(mast, port->addr, 0x43, 0x05); mdelay(5); while (cnt--) { if ( (msg->flags & I2C_M_RD) && msg->addr == 0x50) { nv_wri2cr(mast, port->addr, 0x40, msg->addr << 1); nv_wri2cr(mast, port->addr, 0x41, seg); nv_wri2cr(mast, port->addr, 0x42, off); nv_wri2cr(mast, port->addr, 0x44, msg->len); nv_wri2cr(mast, port->addr, 0x45, 0x00); nv_wri2cr(mast, port->addr, 0x43, 0x01); for (i = 0; i < msg->len; i++) { j = 0; while (nv_rdi2cr(mast, port->addr, 0x46) & 0x10) { mdelay(5); if (j++ == 32) goto done; } msg->buf[i] = nv_rdi2cr(mast, port->addr, 0x47); } } else if (!(msg->flags & I2C_M_RD)) { if (msg->addr == 0x50 && msg->len == 0x01) { off = msg->buf[0]; } else if (msg->addr == 0x30 && msg->len == 0x01) { seg = msg->buf[0]; } else goto done; } else { goto done; } msg++; } ret = num; done: nv_wri2cr(mast, port->addr, 0x43, 0x00); return ret; }
static int init_wri2cr(struct nvbios_init *init, u8 index, u8 addr, u8 reg, u8 val) { struct nouveau_i2c_port *port = init_i2c(init, index); if (port && init_exec(init)) return nv_wri2cr(port, addr, reg, val); return -ENODEV; }
static int anx9805_aux(struct nouveau_i2c_port *port, u8 type, u32 addr, u8 *data, u8 size) { struct anx9805_i2c_port *chan = (void *)port; struct nouveau_i2c_port *mast = (void *)nv_object(chan)->parent; int i, ret = -ETIMEDOUT; u8 tmp; tmp = nv_rdi2cr(mast, chan->ctrl, 0x07) & ~0x04; nv_wri2cr(mast, chan->ctrl, 0x07, tmp | 0x04); nv_wri2cr(mast, chan->ctrl, 0x07, tmp); nv_wri2cr(mast, chan->ctrl, 0xf7, 0x01); nv_wri2cr(mast, chan->addr, 0xe4, 0x80); for (i = 0; !(type & 1) && i < size; i++) nv_wri2cr(mast, chan->addr, 0xf0 + i, data[i]); nv_wri2cr(mast, chan->addr, 0xe5, ((size - 1) << 4) | type); nv_wri2cr(mast, chan->addr, 0xe6, (addr & 0x000ff) >> 0); nv_wri2cr(mast, chan->addr, 0xe7, (addr & 0x0ff00) >> 8); nv_wri2cr(mast, chan->addr, 0xe8, (addr & 0xf0000) >> 16); nv_wri2cr(mast, chan->addr, 0xe9, 0x01); i = 0; while ((tmp = nv_rdi2cr(mast, chan->addr, 0xe9)) & 0x01) { mdelay(5); if (i++ == 32) goto done; } if ((tmp = nv_rdi2cr(mast, chan->ctrl, 0xf7)) & 0x01) { ret = -EIO; goto done; } for (i = 0; (type & 1) && i < size; i++) data[i] = nv_rdi2cr(mast, chan->addr, 0xf0 + i); ret = 0; done: nv_wri2cr(mast, chan->ctrl, 0xf7, 0x01); return ret; }