static void omap3_core_save_context(void)
{
u32 control_padconf_off;
/* Save the padconf registers */
control_padconf_off = omap_ctrl_readl(OMAP343X_CONTROL_PADCONF_OFF);
control_padconf_off |= START_PADCONF_SAVE;
omap_ctrl_writel(control_padconf_off, OMAP343X_CONTROL_PADCONF_OFF);
/* wait for the save to complete */
while (!(omap_ctrl_readl(OMAP343X_CONTROL_GENERAL_PURPOSE_STATUS)
& PADCONF_SAVE_DONE))
udelay(1);
/*
* Force write last pad into memory, as this can fail in some
* cases according to erratas 1.157, 1.185
*/
omap_ctrl_writel(omap_ctrl_readl(OMAP343X_PADCONF_ETK_D14),
OMAP343X_CONTROL_MEM_WKUP + 0x2a0);
/*
* override the value saved in scratchpad memory, errata i583
*/
if (omap_rev() <= OMAP3630_REV_ES1_1)
omap_ctrl_writew(0x1f, OMAP343X_CONTROL_MEM_WKUP +
OMAP3_CONTROL_PADCONF_SDRC_CKE1_OFFSET);
/* Save the Interrupt controller context */
omap_intc_save_context();
/* Save the GPMC context */
omap3_gpmc_save_context();
/* Save the system control module context, padconf already save above*/
omap3_control_save_context();
}
/**
* omap3_ctrl_setup_d2d_padconf - setup stacked modem pads for idle
*
* Sets up the pads controlling the stacked modem in such way that the
* device can enter idle.
*/
static void __init omap3_ctrl_setup_d2d_padconf(void)
{
u16 mask, padconf;
/*
* In a stand alone OMAP3430 where there is not a stacked
* modem for the D2D Idle Ack and D2D MStandby must be pulled
* high. S CONTROL_PADCONF_SAD2D_IDLEACK and
* CONTROL_PADCONF_SAD2D_MSTDBY to have a pull up.
*/
mask = (1 << 4) | (1 << 3); /* pull-up, enabled */
padconf = omap_ctrl_readw(OMAP3_PADCONF_SAD2D_MSTANDBY);
padconf |= mask;
omap_ctrl_writew(padconf, OMAP3_PADCONF_SAD2D_MSTANDBY);
padconf = omap_ctrl_readw(OMAP3_PADCONF_SAD2D_IDLEACK);
padconf |= mask;
omap_ctrl_writew(padconf, OMAP3_PADCONF_SAD2D_IDLEACK);
}
static void omap3_core_restore_context(void)
{
if (omap_rev() <= OMAP3630_REV_ES1_1) {
/*
* errata i583 workaround, safe transition sequence for CKE1:
*/
omap_ctrl_writew(0x1b, OMAP2_CONTROL_PADCONFS +
OMAP3_CONTROL_PADCONF_SDRC_CKE1_OFFSET);
omap_ctrl_writew(0x19, OMAP2_CONTROL_PADCONFS +
OMAP3_CONTROL_PADCONF_SDRC_CKE1_OFFSET);
omap_ctrl_writew(0x18, OMAP2_CONTROL_PADCONFS +
OMAP3_CONTROL_PADCONF_SDRC_CKE1_OFFSET);
}
/* Restore the control module context, padconf restored by h/w */
omap3_control_restore_context();
/* Restore the GPMC context */
omap3_gpmc_restore_context();
/* Restore the interrupt controller context */
omap_intc_restore_context();
}
static int __init_or_module omap34xx_cfg_reg(const struct pin_config *cfg)
{
static DEFINE_SPINLOCK(mux_spin_lock);
unsigned long flags;
u16 reg = 0;
spin_lock_irqsave(&mux_spin_lock, flags);
reg |= cfg->mux_val;
omap2_cfg_debug(cfg, reg);
omap_ctrl_writew(reg, cfg->mux_reg);
spin_unlock_irqrestore(&mux_spin_lock, flags);
return 0;
}
void omap_watchdog_reset(void)
{
u32 base = 0x48314000;
u32 cm_base_iclk = 0x48004C00;
u32 cm_base_fclk = 0x48004C10;
u32 regval;
omap_ctrl_writew(0x118, 0x0A08); // change pullup just before warm-reset
regval = omap_readl(cm_base_iclk);
regval |= 0x20;
omap_writel(regval, cm_base_iclk);
regval = omap_readl(cm_base_fclk);
regval |= 0x20;
omap_writel(regval, cm_base_fclk);
/* initialize prescaler */
while (omap_readl(base + OMAP_WATCHDOG_WPS) & 0x01)
cpu_relax();
omap_writel((0 << 5) | (PTV << 2), base + OMAP_WATCHDOG_CNTRL);
while (omap_readl(base + OMAP_WATCHDOG_WPS) & 0x01)
cpu_relax();
while (omap_readl(base + OMAP_WATCHDOG_WPS) & 0x04)
cpu_relax();
omap_writel((0xFFFE88FF), base + OMAP_WATCHDOG_CRR); // 0xFFFE88FF: 3secs, 0xFFFD8EFF: 5secs, 0xFFFF82FF: 1sec
while (omap_readl(base + OMAP_WATCHDOG_WPS) & 0x04)
cpu_relax();
udelay(20);
omap_writel(0xBBBB, base + OMAP_WATCHDOG_SPR );
while (omap_readl(base + OMAP_WATCHDOG_WPS) & 0x10)
cpu_relax();
omap_writel(0x4444, base + OMAP_WATCHDOG_SPR );
return;
}
void __init mapphone_mmcprobe_init(void)
{
int i;
printk(KERN_INFO "mapphone_mmcprobe: MMC subsystem ganked for debug\n");
omap_ctrl_writew(0x04, 0x144); /* MMC1_CLK/GPIO120 */
omap_ctrl_writew(0x04, 0x146); /* MMC1_CMD/GPIO121 */
omap_ctrl_writew(0x04, 0x148); /* MMC1_DAT0/GPIO122 */
omap_ctrl_writew(0x04, 0x14a); /* MMC1_DAT1/GPIO123 */
omap_ctrl_writew(0x04, 0x14c); /* MMC1_DAT2/GPIO124 */
omap_ctrl_writew(0x04, 0x14e); /* MMC1_DAT3/GPIO125 */
gpio_request(120, "mmcprobe-ch1");
gpio_request(121, "mmcprobe-ch2");
gpio_request(122, "mmcprobe-ch3");
gpio_request(123, "mmcprobe-ch4");
gpio_request(124, "mmcprobe-ch5");
gpio_request(125, "mmcprobe-ch6");
for (i = 0; i < 5; i++)
mapphone_mmcprobe_strobe(i, 1 + i);
}
