/**
* serial_omap_irq() - This handles the interrupt from one port
* @irq: uart port irq number
* @dev_id: uart port info
*/
static inline irqreturn_t serial_omap_irq(int irq, void *dev_id)
{
struct uart_omap_port *up = dev_id;
unsigned int iir, lsr;
unsigned long flags;
spin_lock_irqsave(&up->port.lock, flags);
#ifdef CONFIG_PM
/*
* This will enable the clock for some reason if the
* clocks get disabled. This would enable the ICK also
* in case if the Idle state is set and the PRCM modul
* just shutdown the ICK because of inactivity.
*/
omap_uart_enable_clock_from_irq(up->pdev->id);
#endif
iir = serial_in(up, UART_IIR);
if (iir & UART_IIR_NO_INT) {
spin_unlock_irqrestore(&up->port.lock, flags);
return IRQ_NONE;
}
lsr = serial_in(up, UART_LSR);
if (iir & UART_IIR_RLSI) {
if (!up->use_dma) {
if (lsr & UART_LSR_DR) {
receive_chars(up, &lsr);
if (omap_is_console_port(&up->port) &&
(up->plat_hold_wakelock)) {
spin_unlock(&up->port.lock);
up->plat_hold_wakelock(up, WAKELK_IRQ);
spin_lock(&up->port.lock);
}
}
} else {
up->ier &= ~UART_IER_RDI;
serial_out(up, UART_IER, up->ier);
if (serial_omap_start_rxdma(up) != 0)
if (lsr & UART_LSR_DR)
receive_chars(up, &lsr);
}
}
check_modem_status(up);
if ((lsr & UART_LSR_THRE) && (iir & UART_IIR_THRI))
transmit_chars(up);
spin_unlock_irqrestore(&up->port.lock, flags);
up->port_activity = jiffies;
return IRQ_HANDLED;
}
static int serial_omap_resume(struct platform_device *dev)
{
struct uart_omap_port *up = platform_get_drvdata(dev);
struct omap_uart_port_info *omap_up_info = dev->dev.platform_data;
if (omap_is_console_port(&up->port) && up->plat_hold_wakelock &&
omap_up_info->uart_wakeup_event)
up->plat_hold_wakelock(up, WAKELK_RESUME);
if (up)
uart_resume_port(&serial_omap_reg, &up->port);
return 0;
}
