/* ************************************************************************ * * Setup the architecture * */ static void __init twr_p1025_setup_arch(void) { #ifdef CONFIG_QUICC_ENGINE struct device_node *np; #endif if (ppc_md.progress) ppc_md.progress("twr_p1025_setup_arch()", 0); mpc85xx_smp_init(); fsl_pci_assign_primary(); #ifdef CONFIG_QUICC_ENGINE np = of_find_compatible_node(NULL, NULL, "fsl,qe"); if (!np) { np = of_find_node_by_name(NULL, "qe"); if (!np) { printk(KERN_ERR "Could not find Quicc Engine node\n"); goto qe_fail; } } qe_reset(); of_node_put(np); np = of_find_node_by_name(NULL, "par_io"); if (np) { struct device_node *ucc; par_io_init(np); of_node_put(np); for_each_node_by_name(ucc, "ucc") par_io_of_config(ucc); } #if defined(CONFIG_UCC_GETH) || defined(CONFIG_SERIAL_QE) if (machine_is(twr_p1025)) { struct ccsr_guts __iomem *guts; np = of_find_node_by_name(NULL, "global-utilities"); if (np) { guts = of_iomap(np, 0); if (!guts) pr_err("twr_p1025: could not map global utilities register\n"); else { /* P1025 has pins muxed for QE and other functions. To * enable QE UEC mode, we need to set bit QE0 for UCC1 * in Eth mode, QE0 and QE3 for UCC5 in Eth mode, QE9 * and QE12 for QE MII management signals in PMUXCR * register. */ printk(KERN_INFO "P1025 pinmux configured for QE\n"); /* Set QE mux bits in PMUXCR */ setbits32(&guts->pmuxcr, MPC85xx_PMUXCR_QE(0) | MPC85xx_PMUXCR_QE(3) | MPC85xx_PMUXCR_QE(9) | MPC85xx_PMUXCR_QE(12)); iounmap(guts); #if defined(CONFIG_SERIAL_QE) || defined(CONFIG_SERIAL_QE_MODULE) /* On P1025TWR board, the UCC7 acted as UART port. * However, The UCC7's CTS pin is low level in default, * it will impact the transmission in full duplex * communication. So disable the Flow control pin PA18. * The UCC7 UART just can use RXD and TXD pins. */ par_io_config_pin(0, 18, 0, 0, 0, 0); #endif /* Drive PB29 to CPLD low - CPLD will then change * muxing from LBC to QE */ par_io_config_pin(1, 29, 1, 0, 0, 0); par_io_data_set(1, 29, 0); } of_node_put(np); } } #endif qe_fail: #endif /* CONFIG_QUICC_ENGINE */ printk(KERN_INFO "TWR-P1025 board from Freescale Semiconductor\n"); }
static void mpc83xx_spi_deactivate_cs(u8 cs, u8 polarity) { pr_debug("%s %d %d\n", __func__, cs, polarity); par_io_data_set(3, 13, !polarity); }