void cpu_init(struct cpu_info *ci) { u_int cr4 = 0; /* configure the CPU if needed */ if (ci->cpu_setup != NULL) (*ci->cpu_setup)(ci); /* * We do this here after identifycpu() because errata may affect * what we do. */ patinit(ci); /* * Enable ring 0 write protection (486 or above, but 386 * no longer supported). */ lcr0(rcr0() | CR0_WP); if (cpu_feature & CPUID_PGE) cr4 |= CR4_PGE; /* enable global TLB caching */ if (ci->ci_feature_sefflags_ebx & SEFF0EBX_SMEP) cr4 |= CR4_SMEP; #ifndef SMALL_KERNEL if (ci->ci_feature_sefflags_ebx & SEFF0EBX_SMAP) cr4 |= CR4_SMAP; if (ci->ci_feature_sefflags_ecx & SEFF0ECX_UMIP) cr4 |= CR4_UMIP; #endif /* * If we have FXSAVE/FXRESTOR, use them. */ if (cpu_feature & CPUID_FXSR) { cr4 |= CR4_OSFXSR; /* * If we have SSE/SSE2, enable XMM exceptions. */ if (cpu_feature & (CPUID_SSE|CPUID_SSE2)) cr4 |= CR4_OSXMMEXCPT; } /* no cr4 on most 486s */ if (cr4 != 0) lcr4(rcr4()|cr4); #ifdef MULTIPROCESSOR ci->ci_flags |= CPUF_RUNNING; tlbflushg(); #endif }
void cpu_init(struct cpu_info *ci) { /* configure the CPU if needed */ if (ci->cpu_setup != NULL) (*ci->cpu_setup)(ci); /* * We do this here after identifycpu() because errata may affect * what we do. */ patinit(ci); lcr0(rcr0() | CR0_WP); lcr4(rcr4() | CR4_DEFAULT); #ifdef MULTIPROCESSOR ci->ci_flags |= CPUF_RUNNING; tlbflushg(); #endif }