static int board_asus_a7v8x_mx(const char *name)
{
struct pci_dev *dev;
uint8_t val;
dev = pci_dev_find(0x1106, 0x3177); /* VT8235 ISA bridge */
if (!dev)
dev = pci_dev_find(0x1106, 0x3227); /* VT8237 ISA bridge */
if (!dev) {
fprintf(stderr, "\nERROR: VT823x ISA bridge not found.\n");
return -1;
}
/* This bit is marked reserved actually */
val = pci_read_byte(dev, 0x59);
val &= 0x7F;
pci_write_byte(dev, 0x59, val);
/* Raise ROM MEMW# line on Winbond w83697 SuperIO */
w836xx_ext_enter();
if (!(wbsio_read(0x24) & 0x02)) /* flash rom enabled? */
wbsio_mask(0x24, 0x08, 0x08); /* enable MEMW# */
w836xx_ext_leave();
return 0;
}
/*
* Match boards on pci ids and subsystem ids.
* Second set of ids can be main only or missing completely.
*/
static struct board_pciid_enable *board_match_pci_card_ids(void)
{
struct board_pciid_enable *board = board_pciid_enables;
for (; board->name; board++) {
if (!board->first_card_vendor || !board->first_card_device)
continue;
if (!pci_card_find(board->first_vendor, board->first_device,
board->first_card_vendor,
board->first_card_device))
continue;
if (board->second_vendor) {
if (board->second_card_vendor) {
if (!pci_card_find(board->second_vendor,
board->second_device,
board->second_card_vendor,
board->second_card_device))
continue;
} else {
if (!pci_dev_find(board->second_vendor,
board->second_device))
continue;
}
}
return board;
}
return NULL;
}
static int board_via_epia_m(const char *name)
{
struct pci_dev *dev;
unsigned int base;
uint8_t val;
dev = pci_dev_find(0x1106, 0x3177); /* VT8235 ISA bridge */
if (!dev) {
fprintf(stderr, "\nERROR: VT8235 ISA Bridge not found.\n");
return -1;
}
/* GPIO12-15 -> output */
val = pci_read_byte(dev, 0xE4);
val |= 0x10;
pci_write_byte(dev, 0xE4, val);
/* Get Power Management IO address. */
base = pci_read_word(dev, 0x88) & 0xFF80;
/* enable GPIO15 which is connected to write protect. */
val = inb(base + 0x4D);
val |= 0x80;
outb(val, base + 0x4D);
return 0;
}
/*
* Match boards on linuxbios table gathered vendor and part name.
* Require main pci-ids to match too as extra safety.
*
*/
static struct board_pciid_enable *board_match_linuxbios_name(char *vendor,
char *part)
{
struct board_pciid_enable *board = board_pciid_enables;
for (; board->name; board++) {
if (!board->lb_vendor || strcmp(board->lb_vendor, vendor))
continue;
if (!board->lb_part || strcmp(board->lb_part, part))
continue;
if (!pci_dev_find(board->first_vendor, board->first_device))
continue;
if (board->second_vendor &&
!pci_dev_find(board->second_vendor, board->second_device))
continue;
return board;
}
return NULL;
}
uint16_t detect_ec(void)
{
uint16_t ec_port;
struct pci_dev *dev;
dev = pci_dev_find(0x1002, 0x439d);
if (!dev) {
return 0;
}
/* is EC disabled ? */
if (!(pci_read_byte(dev, 0x40) & (1 << 7)))
return 0;
ec_port = pci_read_word(dev, 0xa4);
if (!(ec_port & 0x1))
return 0;
ec_port &= ~0x1;
return ec_port;
}
int cs5536_probe(const struct targetdef *target) {
return (NULL != pci_dev_find(0x1022, 0x2090));
}
static void determine_generation(struct pci_dev *dev)
{
amd_gen = CHIPSET_AMD_UNKNOWN;
msg_pdbg2("Trying to determine the generation of the SPI interface... ");
if (dev->device_id == 0x438d) {
amd_gen = CHIPSET_SB6XX;
msg_pdbg("SB6xx detected.\n");
} else if (dev->device_id == 0x439d) {
struct pci_dev *smbus_dev = pci_dev_find(0x1002, 0x4385);
if (smbus_dev == NULL)
return;
uint8_t rev = pci_read_byte(smbus_dev, PCI_REVISION_ID);
if (rev >= 0x39 && rev <= 0x3D) {
amd_gen = CHIPSET_SB7XX;
msg_pdbg("SB7xx/SP5100 detected.\n");
} else if (rev >= 0x40 && rev <= 0x42) {
amd_gen = CHIPSET_SB89XX;
msg_pdbg("SB8xx/SB9xx/Hudson-1 detected.\n");
} else {
msg_pwarn("SB device found but SMBus revision 0x%02x does not match known values.\n"
"Assuming SB8xx/SB9xx/Hudson-1. Please send a log to [email protected]\n",
rev);
amd_gen = CHIPSET_SB89XX;
}
} else if (dev->device_id == 0x780e) {
/* The PCI ID of the LPC bridge doesn't change between Hudson-2/3/4 and Yangtze (Kabini/Temash)
* although they use different SPI interfaces. */
#ifdef USE_YANGTZE_HEURISTICS
/* This heuristic accesses the SPI interface MMIO BAR at locations beyond those supported by
* Hudson in the hope of getting 0xff readback on older chipsets and non-0xff readback on
* Yangtze (and newer, compatible chipsets). */
int i;
msg_pdbg("Checking for AMD Yangtze (Kabini/Temash) or later... ");
for (i = 0x20; i <= 0x4f; i++) {
if (mmio_readb(sb600_spibar + i) != 0xff) {
amd_gen = CHIPSET_YANGTZE;
msg_pdbg("found.\n");
return;
}
}
msg_pdbg("not found. Assuming Hudson.\n");
amd_gen = CHIPSET_HUDSON234;
#else
struct pci_dev *smbus_dev = pci_dev_find(0x1022, 0x780B);
if (smbus_dev == NULL) {
msg_pdbg("No SMBus device with ID 1022:780B found.\n");
return;
}
uint8_t rev = pci_read_byte(smbus_dev, PCI_REVISION_ID);
if (rev >= 0x11 && rev <= 0x15) {
amd_gen = CHIPSET_HUDSON234;
msg_pdbg("Hudson-2/3/4 detected.\n");
} else if (rev >= 0x39 && rev <= 0x3A) {
amd_gen = CHIPSET_YANGTZE;
msg_pdbg("Yangtze detected.\n");
} else {
msg_pwarn("FCH device found but SMBus revision 0x%02x does not match known values.\n"
"Please report this to [email protected] and include this log and\n"
"the output of lspci -nnvx, thanks!.\n", rev);
}
#endif
} else
msg_pwarn("%s: Unknown LPC device %" PRIx16 ":%" PRIx16 ".\n"
"Please report this to [email protected] and include this log and\n"
"the output of lspci -nnvx, thanks!\n",
__func__, dev->vendor_id, dev->device_id);
}
