void mainboard_fill_pei_data(struct pei_data *pei_data)
{
/* One installed DIMM per channel */
pei_data->dimm_channel0_disabled = 2;
pei_data->dimm_channel1_disabled = 2;
pei_data->spd_addresses[0] = 0xa2;
pei_data->spd_addresses[2] = 0xa2;
pei_data_usb2_port(pei_data, 0, 0x40, 1, USB_OC_PIN_SKIP,
USB_PORT_FRONT_PANEL);
pei_data_usb2_port(pei_data, 1, 0x40, 1, USB_OC_PIN_SKIP,
USB_PORT_FRONT_PANEL);
pei_data_usb2_port(pei_data, 2, 0x40, 1, USB_OC_PIN_SKIP,
USB_PORT_FRONT_PANEL);
pei_data_usb2_port(pei_data, 3, 0x40, 1, USB_OC_PIN_SKIP,
USB_PORT_FRONT_PANEL);
pei_data_usb2_port(pei_data, 4, 0x40, 1, USB_OC_PIN_SKIP,
USB_PORT_FRONT_PANEL);
pei_data_usb2_port(pei_data, 5, 0x40, 1, USB_OC_PIN_SKIP,
USB_PORT_FRONT_PANEL);
pei_data_usb2_port(pei_data, 6, 0x40, 1, USB_OC_PIN_SKIP,
USB_PORT_FRONT_PANEL);
pei_data_usb2_port(pei_data, 7, 0x40, 1, USB_OC_PIN_SKIP,
USB_PORT_FRONT_PANEL);
pei_data_usb3_port(pei_data, 0, 1, USB_OC_PIN_SKIP, 0);
pei_data_usb3_port(pei_data, 1, 1, USB_OC_PIN_SKIP, 0);
pei_data_usb3_port(pei_data, 2, 1, USB_OC_PIN_SKIP, 0);
pei_data_usb3_port(pei_data, 3, 1, USB_OC_PIN_SKIP, 0);
}
void mainboard_fill_pei_data(struct pei_data *pei_data)
{
/* DQ byte map for Samus board */
const u8 dq_map[2][6][2] = {
{ { 0x0F, 0xF0 }, { 0x00, 0xF0 }, { 0x0F, 0xF0 },
{ 0x0F, 0x00 }, { 0xFF, 0x00 }, { 0xFF, 0x00 } },
{ { 0x0F, 0xF0 }, { 0x00, 0xF0 }, { 0x0F, 0xF0 },
{ 0x0F, 0x00 }, { 0xFF, 0x00 }, { 0xFF, 0x00 } } };
/* DQS CPU<>DRAM map for Samus board */
const u8 dqs_map[2][8] = {
{ 2, 0, 1, 3, 6, 4, 7, 5 },
{ 2, 1, 0, 3, 6, 5, 4, 7 } };
pei_data->ec_present = 1;
/* One installed DIMM per channel */
pei_data->dimm_channel0_disabled = 2;
pei_data->dimm_channel1_disabled = 2;
memcpy(pei_data->dq_map, dq_map, sizeof(dq_map));
memcpy(pei_data->dqs_map, dqs_map, sizeof(dqs_map));
/* P0: HOST PORT */
pei_data_usb2_port(pei_data, 0, 0x0080, 1, 0,
USB_PORT_BACK_PANEL);
/* P1: HOST PORT */
pei_data_usb2_port(pei_data, 1, 0x0080, 1, 1,
USB_PORT_BACK_PANEL);
/* P2: RAIDEN */
pei_data_usb2_port(pei_data, 2, 0x0080, 1, USB_OC_PIN_SKIP,
USB_PORT_BACK_PANEL);
/* P3: SD CARD */
pei_data_usb2_port(pei_data, 3, 0x0040, 1, USB_OC_PIN_SKIP,
USB_PORT_INTERNAL);
/* P4: RAIDEN */
pei_data_usb2_port(pei_data, 4, 0x0080, 1, USB_OC_PIN_SKIP,
USB_PORT_BACK_PANEL);
/* P5: WWAN (Disabled) */
pei_data_usb2_port(pei_data, 5, 0x0000, 0, USB_OC_PIN_SKIP,
USB_PORT_SKIP);
/* P6: CAMERA */
pei_data_usb2_port(pei_data, 6, 0x0040, 1, USB_OC_PIN_SKIP,
USB_PORT_INTERNAL);
/* P7: BT */
pei_data_usb2_port(pei_data, 7, 0x0040, 1, USB_OC_PIN_SKIP,
USB_PORT_INTERNAL);
/* P1: HOST PORT */
pei_data_usb3_port(pei_data, 0, 1, 0, 0);
/* P2: HOST PORT */
pei_data_usb3_port(pei_data, 1, 1, 1, 0);
/* P3: RAIDEN */
pei_data_usb3_port(pei_data, 2, 1, USB_OC_PIN_SKIP, 0);
/* P4: RAIDEN */
pei_data_usb3_port(pei_data, 3, 1, USB_OC_PIN_SKIP, 0);
}
void mainboard_fill_pei_data(struct pei_data *pei_data)
{
pei_data->ec_present = 1;
/* One installed DIMM per channel -- can be changed by SPD init */
pei_data->dimm_channel0_disabled = 2;
pei_data->dimm_channel1_disabled = 2;
/* P0: Port B, CN01 (IOBoard) */
pei_data_usb2_port(pei_data, 0, 0x0150, 1, 0,
USB_PORT_BACK_PANEL);
/* P1: Port A, CN01 */
pei_data_usb2_port(pei_data, 1, 0x0040, 1, 2,
USB_PORT_BACK_PANEL);
/* P2: CCD */
pei_data_usb2_port(pei_data, 2, 0x0080, 1, USB_OC_PIN_SKIP,
USB_PORT_INTERNAL);
/* P3: BT */
pei_data_usb2_port(pei_data, 3, 0x0040, 1, USB_OC_PIN_SKIP,
USB_PORT_MINI_PCIE);
/* P4: Empty */
pei_data_usb2_port(pei_data, 4, 0x0000, 0, USB_OC_PIN_SKIP,
USB_PORT_SKIP);
/* P5: EMPTY */
pei_data_usb2_port(pei_data, 5, 0x0000, 0, USB_OC_PIN_SKIP,
USB_PORT_SKIP);
/* P6: SD Card */
pei_data_usb2_port(pei_data, 6, 0x0040, 1, USB_OC_PIN_SKIP,
USB_PORT_FLEX);
/* P7: EMPTY */
pei_data_usb2_port(pei_data, 7, 0x0000, 0, USB_OC_PIN_SKIP,
USB_PORT_SKIP);
/* P0: PORTB*/
pei_data_usb3_port(pei_data, 0, 1, 0, 0);
/* P1: PORTA */
pei_data_usb3_port(pei_data, 1, 1, 2, 0);
/* P2: EMPTY */
pei_data_usb3_port(pei_data, 2, 0, USB_OC_PIN_SKIP, 0);
/* P3: EMPTY */
pei_data_usb3_port(pei_data, 3, 0, USB_OC_PIN_SKIP, 0);
}
void mainboard_fill_pei_data(struct pei_data *pei_data)
{
pei_data->ec_present = 1;
/* One DIMM slot */
pei_data->dimm_channel1_disabled = 3;
pei_data->spd_addresses[0] = 0xa0;
/* P1: Left Side Port (USB2 only) */
pei_data_usb2_port(pei_data, 0, 0x0080, 1, USB_OC_PIN_SKIP,
USB_PORT_BACK_PANEL);
/* P2: Right Side Port (USB2) */
pei_data_usb2_port(pei_data, 1, 0x0080, 1, USB_OC_PIN_SKIP,
USB_PORT_BACK_PANEL);
/* P3: Empty */
pei_data_usb2_port(pei_data, 2, 0x0000, 0, USB_OC_PIN_SKIP,
USB_PORT_SKIP);
/* P4: Camera */
pei_data_usb2_port(pei_data, 3, 0x0080, 1, USB_OC_PIN_SKIP,
USB_PORT_BACK_PANEL);
/* P5: Bluetooth */
pei_data_usb2_port(pei_data, 4, 0x0080, 1, USB_OC_PIN_SKIP,
USB_PORT_BACK_PANEL);
/* P6: Empty */
pei_data_usb2_port(pei_data, 5, 0x0080, 0, USB_OC_PIN_SKIP,
USB_PORT_SKIP);
/* P7: Empty */
pei_data_usb2_port(pei_data, 6, 0x0080, 0, USB_OC_PIN_SKIP,
USB_PORT_SKIP);
/* P8: SD Card */
pei_data_usb2_port(pei_data, 7, 0x0080, 1, USB_OC_PIN_SKIP,
USB_PORT_BACK_PANEL);
/* P1: Empty */
pei_data_usb3_port(pei_data, 0, 0, USB_OC_PIN_SKIP, 0);
/* P2: Right Side Port (USB3) */
pei_data_usb3_port(pei_data, 1, 1, USB_OC_PIN_SKIP, 0);
/* P3: Empty */
pei_data_usb3_port(pei_data, 2, 0, USB_OC_PIN_SKIP, 0);
/* P4: Empty */
pei_data_usb3_port(pei_data, 3, 0, USB_OC_PIN_SKIP, 0);
}
void mainboard_fill_pei_data(struct pei_data *pei_data)
{
pei_data->ec_present = 0;
/* P0: VP8 */
pei_data_usb2_port(pei_data, 0, 0x0064, 1, USB_OC_PIN_SKIP,
USB_PORT_MINI_PCIE);
/* P1: Port 3, USB3 */
pei_data_usb2_port(pei_data, 1, 0x0040, 1, 0,
USB_PORT_INTERNAL);
/* P2: Port 4, USB4 */
pei_data_usb2_port(pei_data, 2, 0x0040, 1, 1,
USB_PORT_INTERNAL);
/* P3: Mini Card */
pei_data_usb2_port(pei_data, 3, 0x0040, 1, USB_OC_PIN_SKIP,
USB_PORT_MINI_PCIE);
/* P4: Port 1, USB1 */
pei_data_usb2_port(pei_data, 4, 0x0040, 1, 2,
USB_PORT_INTERNAL);
/* P5: Port 2, USB2 */
pei_data_usb2_port(pei_data, 5, 0x0040, 1, 2,
USB_PORT_INTERNAL);
/* P6: Card Reader */
pei_data_usb2_port(pei_data, 6, 0x0040, 1, USB_OC_PIN_SKIP,
USB_PORT_INTERNAL);
/* P7: Pin Header */
pei_data_usb2_port(pei_data, 7, 0x0040, 1, 3,
USB_PORT_INTERNAL);
/* P1: USB1 */
pei_data_usb3_port(pei_data, 0, 1, 2, 0);
/* P2: USB2 */
pei_data_usb3_port(pei_data, 1, 1, 2, 0);
/* P3: USB3 */
pei_data_usb3_port(pei_data, 2, 1, 0, 0);
/* P4: USB4 */
pei_data_usb3_port(pei_data, 3, 1, 1, 0);
}
void mainboard_fill_pei_data(struct pei_data *pei_data)
{
pei_data->ec_present = 0;
/* P0: VP8 */
pei_data_usb2_port(pei_data, 0, 0x0064, 1, 0,
USB_PORT_MINI_PCIE);
/* P1: Port A, CN22 */
pei_data_usb2_port(pei_data, 1, 0x0040, 1, 0,
USB_PORT_INTERNAL);
/* P2: Port B, CN23 */
pei_data_usb2_port(pei_data, 2, 0x0040, 1, 1,
USB_PORT_INTERNAL);
/* P3: WLAN */
pei_data_usb2_port(pei_data, 3, 0x0040, 1, USB_OC_PIN_SKIP,
USB_PORT_MINI_PCIE);
/* P4: Port C, CN25 */
pei_data_usb2_port(pei_data, 4, 0x0040, 1, 2,
USB_PORT_INTERNAL);
/* P5: Port D, CN25 */
pei_data_usb2_port(pei_data, 5, 0x0040, 1, 2,
USB_PORT_INTERNAL);
/* P6: Card Reader */
pei_data_usb2_port(pei_data, 6, 0x0040, 1, USB_OC_PIN_SKIP,
USB_PORT_INTERNAL);
/* P7: EMPTY */
pei_data_usb2_port(pei_data, 7, 0x0000, 0, 0,
USB_PORT_SKIP);
/* P1: CN22 */
pei_data_usb3_port(pei_data, 0, 1, 0, 0);
/* P2: CN23 */
pei_data_usb3_port(pei_data, 1, 1, 1, 0);
/* P3: CN25 */
pei_data_usb3_port(pei_data, 2, 1, 2, 0);
/* P4: CN25 */
pei_data_usb3_port(pei_data, 3, 1, 2, 0);
}
