uint32_t calchase_state::intel82371ab_pci_r(int function, int reg, uint32_t mem_mask) { uint32_t r = 0; if(reg == 0) return 0x30401106; // VT82C586B, VIA if (ACCESSING_BITS_24_31) { r |= piix4_config_r(function, reg + 3) << 24; } if (ACCESSING_BITS_16_23) { r |= piix4_config_r(function, reg + 2) << 16; } if (ACCESSING_BITS_8_15) { r |= piix4_config_r(function, reg + 1) << 8; } if (ACCESSING_BITS_0_7) { r |= piix4_config_r(function, reg + 0) << 0; } return r; }
static UINT32 intel82371ab_pci_r(device_t *busdevice, device_t *device, int function, int reg, UINT32 mem_mask) { UINT32 r = 0; if(reg == 0) return 0x30401106; // VT82C586B, VIA if (ACCESSING_BITS_24_31) { r |= piix4_config_r(busdevice, device, function, reg + 3) << 24; } if (ACCESSING_BITS_16_23) { r |= piix4_config_r(busdevice, device, function, reg + 2) << 16; } if (ACCESSING_BITS_8_15) { r |= piix4_config_r(busdevice, device, function, reg + 1) << 8; } if (ACCESSING_BITS_0_7) { r |= piix4_config_r(busdevice, device, function, reg + 0) << 0; } return r; }
static uint32_t intel82371ab_pci_r(device_t *busdevice, device_t *device, int function, int reg, uint32_t mem_mask) { uint32_t r = 0; if (ACCESSING_BITS_24_31) { r |= piix4_config_r(busdevice, device, function, reg + 3) << 24; } if (ACCESSING_BITS_16_23) { r |= piix4_config_r(busdevice, device, function, reg + 2) << 16; } if (ACCESSING_BITS_8_15) { r |= piix4_config_r(busdevice, device, function, reg + 1) << 8; } if (ACCESSING_BITS_0_7) { r |= piix4_config_r(busdevice, device, function, reg + 0) << 0; } return r; }
static UINT32 intel82371ab_pci_r(running_device *busdevice, running_device *device, int function, int reg, UINT32 mem_mask) { UINT32 r = 0; if (ACCESSING_BITS_24_31) { r |= piix4_config_r(busdevice, device, function, reg + 3) << 24; } if (ACCESSING_BITS_16_23) { r |= piix4_config_r(busdevice, device, function, reg + 2) << 16; } if (ACCESSING_BITS_8_15) { r |= piix4_config_r(busdevice, device, function, reg + 1) << 8; } if (ACCESSING_BITS_0_7) { r |= piix4_config_r(busdevice, device, function, reg + 0) << 0; } return r; }
uint32_t savquest_state::intel82371ab_pci_r(int function, int reg, uint32_t mem_mask) { uint32_t r = 0; if (ACCESSING_BITS_24_31) { r |= piix4_config_r(function, reg + 3) << 24; } if (ACCESSING_BITS_16_23) { r |= piix4_config_r(function, reg + 2) << 16; } if (ACCESSING_BITS_8_15) { r |= piix4_config_r(function, reg + 1) << 8; } if (ACCESSING_BITS_0_7) { r |= piix4_config_r(function, reg + 0) << 0; } return r; }