void reboot_device(unsigned reboot_reason)
{
uint32_t soc_ver = 0;
uint8_t reset_type = 0;
soc_ver = board_soc_version();
/* Write the reboot reason */
if (platform_is_8974() && BOARD_SOC_VERSION1(soc_ver))
writel(reboot_reason, RESTART_REASON_ADDR);
else
writel(reboot_reason, RESTART_REASON_ADDR_V2);
if(reboot_reason == FASTBOOT_MODE)
reset_type = PON_PSHOLD_WARM_RESET;
else
reset_type = PON_PSHOLD_HARD_RESET;
/* Configure PMIC for warm reset */
if (platform_is_8974() && (pmic_ver == PM8X41_VERSION_V2))
pm8x41_v2_reset_configure(reset_type);
else
pm8x41_reset_configure(reset_type);
/* Drop PS_HOLD for MSM */
writel(0x00, MPM2_MPM_PS_HOLD);
mdelay(5000);
dprintf(CRITICAL, "Rebooting failed\n");
}
void reboot_device(unsigned reboot_reason)
{
uint8_t reset_type = 0;
uint32_t ret = 0;
/* Need to clear the SW_RESET_ENTRY register and
* write to the BOOT_MISC_REG for known reset cases
*/
if(reboot_reason != DLOAD)
scm_dload_mode(NORMAL_MODE);
writel(reboot_reason, RESTART_REASON_ADDR);
/* For Reboot-bootloader and Dload cases do a warm reset
* For Reboot cases do a hard reset
*/
if((reboot_reason == FASTBOOT_MODE) || (reboot_reason == DLOAD) || (reboot_reason == RECOVERY_MODE))
reset_type = PON_PSHOLD_WARM_RESET;
else
reset_type = PON_PSHOLD_HARD_RESET;
pm8x41_reset_configure(reset_type);
ret = scm_halt_pmic_arbiter();
if (ret)
dprintf(CRITICAL , "Failed to halt pmic arbiter: %d\n", ret);
/* Drop PS_HOLD for MSM */
writel(0x00, MPM2_MPM_PS_HOLD);
mdelay(5000);
dprintf(CRITICAL, "Rebooting failed\n");
}
void reboot_device(unsigned reboot_reason)
{
uint32_t soc_ver = 0;
soc_ver = board_soc_version();
/* Write the reboot reason */
if (soc_ver >= BOARD_SOC_VERSION2)
writel(reboot_reason, RESTART_REASON_ADDR_V2);
else
writel(reboot_reason, RESTART_REASON_ADDR);
/* Configure PMIC for warm reset */
pm8x41_reset_configure(PON_PSHOLD_WARM_RESET);
/* Disable Watchdog Debug.
* Required becuase of a H/W bug which causes the system to
* reset partially even for non watchdog resets.
*/
writel(readl(GCC_WDOG_DEBUG) & ~(1 << WDOG_DEBUG_DISABLE_BIT), GCC_WDOG_DEBUG);
dsb();
/* Wait until the write takes effect. */
while(readl(GCC_WDOG_DEBUG) & (1 << WDOG_DEBUG_DISABLE_BIT));
/* Drop PS_HOLD for MSM */
writel(0x00, MPM2_MPM_PS_HOLD);
mdelay(5000);
dprintf(CRITICAL, "Rebooting failed\n");
}
void reboot_device(unsigned reboot_reason)
{
writel(reboot_reason, RESTART_REASON_ADDR);
/* Configure PMIC for warm reset */
pm8x41_reset_configure(PON_PSHOLD_WARM_RESET);
/* Drop PS_HOLD for MSM */
writel(0x00, MPM2_MPM_PS_HOLD);
mdelay(5000);
dprintf(CRITICAL, "Rebooting failed\n");
}
/* Configure PMIC and Drop PS_HOLD for shutdown */
void shutdown_device(void)
{
dprintf(CRITICAL, "Going down for shutdown.\n");
/* Configure PMIC for shutdown */
pm8x41_reset_configure(PON_PSHOLD_SHUTDOWN);
/* Drop PS_HOLD for MSM */
writel(0x00, MPM2_MPM_PS_HOLD);
mdelay(5000);
dprintf(CRITICAL, "shutdown failed\n");
ASSERT(0);
}
void shutdown_device()
{
dprintf(CRITICAL, "Going down for shutdown.\n");
/* Configure PMIC for shutdown. */
if (pmic_ver == PMIC_VERSION_V2)
pm8x41_v2_reset_configure(PON_PSHOLD_SHUTDOWN);
else
pm8x41_reset_configure(PON_PSHOLD_SHUTDOWN);
/* Drop PS_HOLD for MSM */
writel(0x00, MPM2_MPM_PS_HOLD);
mdelay(5000);
dprintf(CRITICAL, "Shutdown failed\n");
}
void reboot_device(unsigned reboot_reason)
{
int ret = 0;
writel(reboot_reason, RESTART_REASON_ADDR);
/* Configure PMIC for warm reset */
pm8x41_reset_configure(PON_PSHOLD_WARM_RESET);
ret = scm_halt_pmic_arbiter();
if (ret)
dprintf(CRITICAL , "Failed to halt pmic arbiter: %d\n", ret);
/* Drop PS_HOLD for MSM */
writel(0x00, MPM2_MPM_PS_HOLD);
mdelay(5000);
dprintf(CRITICAL, "Rebooting failed\n");
}
void reboot_device(unsigned reboot_reason)
{
uint8_t reset_type = 0;
/* Write the reboot reason */
writel(reboot_reason, RESTART_REASON_ADDR);
if(reboot_reason == FASTBOOT_MODE)
reset_type = PON_PSHOLD_WARM_RESET;
else
reset_type = PON_PSHOLD_HARD_RESET;
pm8x41_reset_configure(reset_type);
/* Drop PS_HOLD for MSM */
writel(0x00, MPM2_MPM_PS_HOLD);
mdelay(5000);
dprintf(CRITICAL, "Rebooting failed\n");
}
