unsigned long pcl_read_gplp(unsigned long gplp)
{
#ifndef AVR32_PM_VERSION_RESETVALUE
// Implementation for UC3A, UC3A3, UC3B parts.
return pm_read_gplp(&AVR32_PM,gplp);
#else
return scif_read_gplp(gplp);
#endif
}
/*! \brief Watchdog scheduler
*/
void wdt_scheduler(void)
{
volatile avr32_pm_t* pm = &AVR32_PM;
// If Reset Cause is due to a Watchdog reset just relaunch Watchdog and turn
// LED0 to 4 on to let user know that a new wdt reset has occurred.
if (pm->RCAUSE.wdt) {
wdt_reenable();
gpio_clr_gpio_pin(LED0_GPIO);
gpio_set_gpio_pin(LED1_GPIO);
gpio_set_gpio_pin(LED2_GPIO);
gpio_set_gpio_pin(LED3_GPIO);
cpu_delay_ms(300,FOSC0);
}
// If Reset Cause is due to a Power On reset, enable Watchdog with default value
else if (pm->RCAUSE.por) {
opt.us_timeout_period = WDT_MIN_VALUE_US ;
// Save current value in GPLP register
pm_write_gplp(pm, 0, opt.us_timeout_period);
wdt_enable(&opt);
}
// If Reset Cause is due to an External reset, increment opt.us_timeout_period
else if (pm->RCAUSE.ext) {
// Reload current value stored in GPLP register
opt.us_timeout_period = pm_read_gplp(pm, 0);
opt.us_timeout_period += WDT_CTRL_STEP_US;
if (opt.us_timeout_period >= WDT_MAX_VALUE_US)
opt.us_timeout_period = WDT_MIN_VALUE_US;
wdt_enable(&opt);
// Save new value in GPLP register
pm_write_gplp(pm,0,opt.us_timeout_period);
}
// Else relaunch Watchdog and toggle GPIO to let user know that a new reset has occurred
else {
opt.us_timeout_period = WDT_MIN_VALUE_US;
// Save start value of watchdog in GPLP register
pm_write_gplp(pm, 0, opt.us_timeout_period);
wdt_enable(&opt);
}
}
