struct cpu_info *
cpu_info_alloc(struct pmap_tlb_info *ti, cpuid_t cpu_id, cpuid_t cpu_package_id,
cpuid_t cpu_core_id, cpuid_t cpu_smt_id)
{
KASSERT(cpu_id < MAXCPUS);
#ifdef MIPS64_OCTEON
vaddr_t exc_page = MIPS_UTLB_MISS_EXC_VEC + 0x1000*cpu_id;
__CTASSERT(sizeof(struct cpu_info) + sizeof(struct pmap_tlb_info) <= 0x1000 - 0x280);
struct cpu_info * const ci = ((struct cpu_info *)(exc_page + 0x1000)) - 1;
memset((void *)exc_page, 0, PAGE_SIZE);
if (ti == NULL) {
ti = ((struct pmap_tlb_info *)ci) - 1;
pmap_tlb_info_init(ti);
}
#else
const vaddr_t cpu_info_offset = (vaddr_t)&cpu_info_store & PAGE_MASK;
struct pglist pglist;
int error;
/*
* Grab a page from the first 512MB (mappable by KSEG0) to use to store
* exception vectors and cpu_info for this cpu.
*/
error = uvm_pglistalloc(PAGE_SIZE,
0, MIPS_KSEG1_START - MIPS_KSEG0_START,
PAGE_SIZE, PAGE_SIZE, &pglist, 1, false);
if (error)
return NULL;
const paddr_t pa = VM_PAGE_TO_PHYS(TAILQ_FIRST(&pglist));
const vaddr_t va = MIPS_PHYS_TO_KSEG0(pa);
struct cpu_info * const ci = (void *) (va + cpu_info_offset);
memset((void *)va, 0, PAGE_SIZE);
/*
* If we weren't passed a pmap_tlb_info to use, the caller wants us
* to take care of that for him. Since we have room left over in the
* page we just allocated, just use a piece of that for it.
*/
if (ti == NULL) {
if (cpu_info_offset >= sizeof(*ti)) {
ti = (void *) va;
} else {
KASSERT(PAGE_SIZE - cpu_info_offset + sizeof(*ci) >= sizeof(*ti));
ti = (struct pmap_tlb_info *)(va + PAGE_SIZE) - 1;
}
pmap_tlb_info_init(ti);
}
/*
* Attach its TLB info (which must be direct-mapped)
*/
#ifdef _LP64
KASSERT(MIPS_KSEG0_P(ti) || MIPS_XKPHYS_P(ti));
#else
KASSERT(MIPS_KSEG0_P(ti));
#endif
#endif /* MIPS64_OCTEON */
KASSERT(cpu_id != 0);
ci->ci_cpuid = cpu_id;
ci->ci_pmap_kern_segtab = &pmap_kern_segtab,
ci->ci_data.cpu_package_id = cpu_package_id;
ci->ci_data.cpu_core_id = cpu_core_id;
ci->ci_data.cpu_smt_id = cpu_smt_id;
ci->ci_cpu_freq = cpu_info_store.ci_cpu_freq;
ci->ci_cctr_freq = cpu_info_store.ci_cctr_freq;
ci->ci_cycles_per_hz = cpu_info_store.ci_cycles_per_hz;
ci->ci_divisor_delay = cpu_info_store.ci_divisor_delay;
ci->ci_divisor_recip = cpu_info_store.ci_divisor_recip;
ci->ci_cpuwatch_count = cpu_info_store.ci_cpuwatch_count;
pmap_md_alloc_ephemeral_address_space(ci);
mi_cpu_attach(ci);
pmap_tlb_info_attach(ti, ci);
return ci;
}
struct cpu_info *
cpu_info_alloc(struct pmap_tlb_info *ti, cpuid_t cpu_id, cpuid_t cpu_package_id,
cpuid_t cpu_core_id, cpuid_t cpu_smt_id)
{
vaddr_t cpu_info_offset = (vaddr_t)&cpu_info_store & PAGE_MASK;
struct pglist pglist;
int error;
/*
* Grab a page from the first 512MB (mappable by KSEG0) to use to store
* exception vectors and cpu_info for this cpu.
*/
error = uvm_pglistalloc(PAGE_SIZE,
0, MIPS_KSEG1_START - MIPS_KSEG0_START,
PAGE_SIZE, PAGE_SIZE, &pglist, 1, false);
if (error)
return NULL;
const paddr_t pa = VM_PAGE_TO_PHYS(TAILQ_FIRST(&pglist));
const vaddr_t va = MIPS_PHYS_TO_KSEG0(pa);
struct cpu_info * const ci = (void *) (va + cpu_info_offset);
memset((void *)va, 0, PAGE_SIZE);
/*
* If we weren't passed a pmap_tlb_info to use, the caller wants us
* to take care of that for him. Since we have room left over in the
* page we just allocated, just use a piece of that for it.
*/
if (ti == NULL) {
if (cpu_info_offset >= sizeof(*ti)) {
ti = (void *) va;
} else {
KASSERT(PAGE_SIZE - cpu_info_offset + sizeof(*ci) >= sizeof(*ti));
ti = (struct pmap_tlb_info *)(va + PAGE_SIZE) - 1;
}
pmap_tlb_info_init(ti);
}
ci->ci_cpuid = cpu_id;
ci->ci_data.cpu_package_id = cpu_package_id;
ci->ci_data.cpu_core_id = cpu_core_id;
ci->ci_data.cpu_smt_id = cpu_smt_id;
ci->ci_cpu_freq = cpu_info_store.ci_cpu_freq;
ci->ci_cctr_freq = cpu_info_store.ci_cctr_freq;
ci->ci_cycles_per_hz = cpu_info_store.ci_cycles_per_hz;
ci->ci_divisor_delay = cpu_info_store.ci_divisor_delay;
ci->ci_divisor_recip = cpu_info_store.ci_divisor_recip;
ci->ci_cpuwatch_count = cpu_info_store.ci_cpuwatch_count;
/*
* Attach its TLB info (which must be direct-mapped)
*/
#ifdef _LP64
KASSERT(MIPS_KSEG0_P(ti) || MIPS_XKPHYS_P(ti));
#else
KASSERT(MIPS_KSEG0_P(ti));
#endif
#ifndef _LP64
/*
* If we have more memory than can be mapped by KSEG0, we need to
* allocate enough VA so we can map pages with the right color
* (to avoid cache alias problems).
*/
if (mips_avail_end > MIPS_KSEG1_START - MIPS_KSEG0_START) {
ci->ci_pmap_dstbase = uvm_km_alloc(kernel_map,
uvmexp.ncolors * PAGE_SIZE, 0, UVM_KMF_VAONLY);
KASSERT(ci->ci_pmap_dstbase);
ci->ci_pmap_srcbase = uvm_km_alloc(kernel_map,
uvmexp.ncolors * PAGE_SIZE, 0, UVM_KMF_VAONLY);
KASSERT(ci->ci_pmap_srcbase);
}
#endif
mi_cpu_attach(ci);
pmap_tlb_info_attach(ti, ci);
return ci;
}
