static void
wdc_pnpbus_attach(device_t parent, device_t self, void *aux)
{
struct wdc_pnpbus_softc *sc = device_private(self);
struct wdc_regs *wdr;
struct pnpbus_dev_attach_args *pna = aux;
int cmd_iobase, cmd_len, aux_iobase, aux_len, i;
sc->sc_wdcdev.sc_atac.atac_dev = self;
sc->sc_wdcdev.regs = wdr = &sc->sc_wdc_regs;
wdr->cmd_iot = pna->pna_iot;
wdr->ctl_iot = pna->pna_iot;
pnpbus_getioport(&pna->pna_res, 0, &cmd_iobase, &cmd_len);
pnpbus_getioport(&pna->pna_res, 1, &aux_iobase, &aux_len);
if (pnpbus_io_map(&pna->pna_res, 0, &wdr->cmd_iot, &wdr->cmd_baseioh) ||
pnpbus_io_map(&pna->pna_res, 1, &wdr->ctl_iot, &wdr->ctl_ioh)) {
aprint_error_dev(self, "couldn't map registers\n");
}
for (i = 0; i < cmd_len; i++) {
if (bus_space_subregion(wdr->cmd_iot,
wdr->cmd_baseioh, i, i == 0 ? 4 : 1,
&wdr->cmd_iohs[i]) != 0) {
aprint_error(": couldn't subregion registers\n");
return;
}
}
wdr->data32iot = wdr->cmd_iot;
wdr->data32ioh = wdr->cmd_iohs[0];
sc->sc_wdcdev.cap |= WDC_CAPABILITY_PREATA;
sc->sc_wdcdev.sc_atac.atac_cap |= ATAC_CAP_DATA16;
if (device_cfdata(sc->sc_wdcdev.sc_atac.atac_dev)->cf_flags &
WDC_OPTIONS_32)
sc->sc_wdcdev.sc_atac.atac_cap |= ATAC_CAP_DATA32;
sc->sc_wdcdev.sc_atac.atac_pio_cap = 0;
sc->sc_chanlist[0] = &sc->sc_channel;
sc->sc_wdcdev.sc_atac.atac_channels = sc->sc_chanlist;
sc->sc_wdcdev.sc_atac.atac_nchannels = 1;
sc->sc_channel.ch_channel = 0;
sc->sc_channel.ch_atac = &sc->sc_wdcdev.sc_atac;
sc->sc_channel.ch_queue = &sc->sc_chqueue;
sc->sc_channel.ch_ndrive = 2;
wdc_init_shadow_regs(&sc->sc_channel);
sc->sc_ih = pnpbus_intr_establish(0, IPL_BIO, IST_PNP,
wdcintr, &sc->sc_channel, &pna->pna_res);
aprint_normal("\n");
wdcattach(&sc->sc_channel);
}
static void
mcclock_pnpbus_attach(device_t parent, device_t self, void *aux)
{
struct mc146818_softc *sc = device_private(self);
struct pnpbus_dev_attach_args *pna = aux;
sc->sc_dev = self;
sc->sc_bst = pna->pna_iot;
if (pnpbus_io_map(&pna->pna_res, 0, &sc->sc_bst, &sc->sc_bsh)) {
/* XXX should we panic instead? */
aprint_error(": couldn't map clock I/O space\n");
return;
}
if (pna->chipid == Dallas1585)
have_ds1585 = 1;
sc->sc_year0 = 1900;
sc->sc_mcread = mcclock_pnpbus_read;
sc->sc_mcwrite = mcclock_pnpbus_write;
sc->sc_flag = MC146818_BCD;
mc146818_attach(sc);
aprint_normal("\n");
(*sc->sc_mcwrite)(sc, MC_REGB, MC_REGB_24HR);
}
void
we_pnpbus_attach(device_t parent, device_t self, void *aux)
{
struct we_softc *wsc = device_private(self);
struct dp8390_softc *sc = &wsc->sc_dp8390;
struct pnpbus_dev_attach_args *pna = aux;
struct pnpbus_irq *irq;
bus_space_tag_t nict, asict, memt;
bus_space_handle_t nich, asich, memh;
bus_size_t memsize = 0x4000;
const char *typestr;
int memfound = 0, i, irqnum;
sc->sc_dev = self;
nict = asict = pna->pna_iot;
memt = pna->pna_memt;
aprint_normal("\n");
if (pnpbus_io_map(&pna->pna_res, 0, &asict, &asich)) {
aprint_error("%s: can't map nic i/o space\n",
device_xname(self));
return;
}
if (bus_space_subregion(asict, asich, WE_NIC_OFFSET, WE_NIC_NPORTS,
&nich)) {
aprint_error("%s: can't subregion i/o space\n",
device_xname(self));
return;
}
typestr = we_params(asict, asich, &wsc->sc_type, &memsize,
&wsc->sc_flags, &sc->is790);
if (typestr == NULL) {
aprint_error("%s: where did the card go?\n",
device_xname(self));
return;
}
/*
* Map memory space. See if any was allocated via PNP, if not, use
* the default.
*/
if (pnpbus_iomem_map(&pna->pna_res, 0, &memt, &memh) == 0)
memfound = 1;
else if (bus_space_map(memt, WE_DEFAULT_IOMEM, memsize, 0, &memh)) {
aprint_error("%s: can't map shared memory\n",
device_xname(self));
return;
}
wsc->sc_asict = asict;
wsc->sc_asich = asich;
sc->sc_regt = nict;
sc->sc_regh = nich;
sc->sc_buft = memt;
sc->sc_bufh = memh;
if (memfound)
pnpbus_getiomem(&pna->pna_res, 0, &wsc->sc_maddr,
&sc->mem_size);
else {
wsc->sc_maddr = WE_DEFAULT_IOMEM;
sc->mem_size = memsize;
}
/* Interface is always enabled. */
sc->sc_enabled = 1;
if (we_config(self, wsc, typestr))
return;
/*
* Enable the configured interrupt.
*/
#if 0
if (sc->is790)
bus_space_write_1(asict, asich, WE790_ICR,
bus_space_read_1(asict, asich, WE790_ICR) |
WE790_ICR_EIL);
else if (wsc->sc_type & WE_SOFTCONFIG)
bus_space_write_1(asict, asich, WE_IRR,
bus_space_read_1(asict, asich, WE_IRR) | WE_IRR_IEN);
#endif
/*
* Establish interrupt handler.
* Loop through all probed IRQs until one looks sane.
*/
for (i = 0, irq = SIMPLEQ_FIRST(&pna->pna_res.irq);
i < pna->pna_res.numirq; i++, irq = SIMPLEQ_NEXT(irq, next)) {
irqnum = ffs(irq->mask) - 1;
/* some cards think they are level. force them to edge */
if (irq->flags & 0x0c)
irq->flags = 0x01;
if (!LEGAL_HWIRQ_P(irqnum))
continue;
if (irqnum < 2)
continue;
break;
}
wsc->sc_ih = pnpbus_intr_establish(i, IPL_NET, IST_PNP, dp8390_intr, sc,
&pna->pna_res);
if (wsc->sc_ih == NULL)
aprint_error("%s: can't establish interrupt\n",
device_xname(self));
}