int vga_setpalvec(int start, int num, int *pal)
{
int i;
DTP((stderr,"setpalvec %i %i %x\n",start,num,pal));
if ((__svgalib_driverspecs->emul && __svgalib_driverspecs->emul->setpalette) ||
(__svgalib_outpal!=__svgalib_vga_outpal)) {
for (i = start; i < start + num; ++i) {
vga_setpalette(i, pal[0], pal[1], pal[2]);
pal += 3;
}
} else {
unsigned char string[768];
if ( num > 256 )
return 0;
for (i = 0; i < num * 3; i++)
string[i] = pal[i];
port_out ( start, 0x3c8 );
#if 0
port_rep_outb( string, num * 3, 0x3c9 );
#else
for(i=0;i<num*3;i++)port_out(string[i],0x3c9);
#endif
}
return num;
}
static void setregs(const unsigned char regs[], int mode)
{
/* Enable graphics register modification */
port_out(0x00, GRA_E0);
port_out(0x01, GRA_E1);
__svgalib_setregs(regs);
}
void trident_set_new_regs(void)
{
u_char dummy;
port_out(0x0b, SEQ_I);
port_out(0x00, SEQ_D);
dummy = port_in(SEQ_D);
return;
}
static void tvga8900_setpage(int page)
{
port_out(0x0b, SEQ_I);
port_out(port_in(SEQ_D), SEQ_D);
port_in(SEQ_D); /* select new mode regs */
port_out(0x0e, SEQ_I);
port_out(page ^ 0x02, SEQ_D); /* select the page */
}
/**
* Main LCD control routine
* \param register_select What to set the Register Select line to
* \param backlight What to set the Backlight line to
* \param data Data to send to LCD (char or instruction)
* \param usec Wait time in micro seconds
*
* This is the basic routine that controls the LCD. It interfaces with the
* parallel ports and contains the logic for flipping and holding the lines
* as required. It tries and be comprehensive enough to avoid spreading
* LPT port logic all over the code.
*
* The Register Select line determines if an output is to be understood as an
* instruction, or as data to be displayed.
* The Backlight line controls the backlight in a direct manner.
*
* The sequence is:
* Bring Enable up
* Output the data (command or character)
* Hold Enable for 450 nano sec (.45 micro sec)
* Bring Enable down
* Wait for the LCD to execute the command, typically 40 micro sec
*
* Take into account the hardware inversion of some control port bits.
*/
static inline void
_sdec_control_wait(unsigned char register_select, unsigned char backlight,
unsigned char data, int usec)
{
port_out(LPT_CONTROL, (register_select | backlight | SDEC_ENABLE) ^ LPT_CTRL_MASK);
port_out(LPT_DEFAULT, data);
timing_uPause(SDEC_HOLD_ENABLE);
port_out(LPT_CONTROL, (register_select | backlight) ^ LPT_CTRL_MASK);
timing_uPause(usec);
}
void trident_disallow_svga(void)
{
u_char dummy;
trident_set_old_regs();
port_out(0x0d, SEQ_I);
dummy = port_in(SEQ_D);
port_out(((dummy | 0x20) & ~0x10), SEQ_D);
trident_set_new_regs();
v_printf("Disallow SVGA Modes = 0x%02x\n", dummy & ~0x10);
return;
}
void trident_set_bank_write(u_char bank)
{
if (trident_get_svga()) {
trident_allow_svga();
port_out(0x0e, SEQ_I);
port_out(bank, SEQ_D);
}
else {
port_out(0x0e, SEQ_I);
port_out(0x02, SEQ_D);
}
v_printf("Trident set bank write= 0x%02x\n", bank);
return;
}
static void
stv5730_write8bit (unsigned int port, unsigned int flags, unsigned int value)
{
int i;
stv5730_upause(IODELAY);
port_out(port, STV5730_CSN + flags);
stv5730_upause(IODELAY);
port_out(port, STV5730_CSN + STV5730_CLK + flags);
stv5730_upause(IODELAY);
port_out(port, STV5730_CLK + flags);
for (i = 7; i >= 0; i--) {
char databit = ((value & (1 << i)) != 0) ? STV5730_DATA : 0;
port_out(port, databit + STV5730_CLK + flags);
stv5730_upause(IODELAY);
port_out(port, databit + flags);
stv5730_upause(IODELAY);
port_out(port, databit + STV5730_CLK + flags);
stv5730_upause(IODELAY);
}
stv5730_upause(IODELAY);
port_out(port, STV5730_CSN + STV5730_CLK + flags);
stv5730_upause(IODELAY);
port_out(port, STV5730_CSN + flags);
}
void trident_allow_svga(void)
{
u_char dummy;
trident_set_old_regs();
port_out(0x0d, SEQ_I);
dummy = port_in(SEQ_D);
v_printf("Dummy then = 0x%02x\n", dummy);
port_out(((dummy & ~0x20) | 0x10), SEQ_D);
dummy = port_in(SEQ_D);
v_printf("Dummy now = 0x%02x\n", dummy);
trident_set_new_regs();
return;
}
static void
stv5730_write0bit (unsigned int port, unsigned int flags)
{
stv5730_upause(IODELAY);
port_out(port, STV5730_CSN + flags);
stv5730_upause(IODELAY);
port_out(port, STV5730_CSN + STV5730_CLK + flags);
stv5730_upause(IODELAY);
port_out(port, STV5730_CLK + flags);
stv5730_upause(IODELAY);
port_out(port, STV5730_CSN + STV5730_CLK + flags);
stv5730_upause(IODELAY);
port_out(port, STV5730_CSN + flags);
}
static int saveregs(unsigned char *regs)
{
/* We can't read the registers from an EGA card. */
/* We just report the expected values. */
const unsigned char *r;
int i;
if (lastmode == TEXT)
r = text_regs;
else
r = LOOKUPMODE(ega_modes, lastmode);
if (r == NULL) {
printf("svgalib: egadrv.c/saveregs(): internal error\n");
exit(-1);
}
memcpy(regs, r, CRT_C + ATT_C + GRA_C + SEQ_C + MIS_C);
/* save all readable EGA registers; others are default */
/* is this correct (even in graphics mode) ?? */
for (i = 0x0C; i < 0x10; i++) {
port_out(i, __svgalib_CRT_I);
regs[CRT + i] = port_in(__svgalib_CRT_D);
}
return CRT_C + ATT_C + GRA_C + SEQ_C + MIS_C;
}
//写数据
void lcd1602_write_data(u8 dat)
{
// //lcd1602_busy();
// port_out();
// port_write(dat);
// RS_SET;
// RW_CLR;
// EN_CLR;
// EN_CLR;
// EN_SET;
// LCD1602_Wait_Ready();
RS_SET;
RW_CLR;
EN_CLR;
port_out();
asm("nop");
port_write(dat);
asm("nop");
// asm("nop");
EN_SET;
asm("nop");
// asm("nop");
EN_CLR;
}
//LCD_init
void Lcd_init()
{
RS->DDR |= RSP;//输出模式
RS->CR1 |= RSP;//推挽输出
RW->DDR |= RWP;//输出模式
RW->CR1 |= RWP;//推挽输出
EN->DDR |= ENP;//输出模式
EN->CR1 |= ENP;//推挽输出
delay_ms(100);
port_out();
port_write(0x00);
lcd1602_write_com_nobusy(0x38);
delay_ms(5);
lcd1602_write_com_nobusy(0x38);
delay_ms(5);
lcd1602_write_com_nobusy(0x38);
delay_ms(5);
lcd1602_write_com_nobusy(0x38);
delay_ms(5);
//lcd1602_write_com_nobusy(0x08);
//delay_ms(5);
lcd1602_write_com_nobusy(0x01);
delay_ms(5);
lcd1602_write_com_nobusy(0x0c);
delay_ms(5);
lcd1602_write_com_nobusy(0x06);
delay_ms(5);
}
/////////////////////////////////////////////////////////////////
// This function returns true if a powered and working STV5730
// hardware is present at p->port
static int
stv5730_detect (unsigned int port)
{
int i;
for (i = 0; i < 10; i++) {
port_out(port, STV5730_TEST_O);
stv5730_upause(IODELAY);
if ((port_in(port + 1) & STV5730_TEST_I) == 0)
return -1;
port_out(port, 0);
stv5730_upause(IODELAY);
if ((port_in(port + 1) & STV5730_TEST_I) != 0)
return -1;
}
return 0;
}
/**
* Write bytes to the parallel port.
*
* Timing can be modified by inserting additional delays according to the
* \c PortWait setting in \c LCDd.conf: \n
* Portwait = 0; no delays, only BUSY bit checked\n
* Portwait = 1; additional WR off to check BUSY delay\n
* Portwait = 2; as 1 + additional WR pulse width\n
* Portwait = 3; as 2 + additional WR setup delay\n
* Portwait >= 4; as 3 + additional wait delay to next command
*
* \param drvthis Pointer to driver
* \param dat Pointer to array storing the data
* \param length Number of bytes to write
*/
void
serialVFD_write_parallel (Driver *drvthis, unsigned char *dat, size_t length)
{
#ifdef HAVE_PCSTYLE_LPT_CONTROL
PrivateData *p = drvthis->private_data;
int i_para, j_para;
if (length <= 0)
return;
for (i_para = 0; i_para < length; i_para++) {
port_out(p->port, dat[i_para]);
/* data to WR enable delay */
if (p->para_wait > 2)
port_in(p->port+1);
port_out(p->port+2, WR_on);
/* additional WR pulse width */
if (p->para_wait > 1)
port_in(p->port+1);
port_out(p->port+2, WR_off);
/* additional BUSY delay time */
if (p->para_wait > 0)
port_in(p->port+1);
/*
* Check MAXBUSY times if the BUSY bit is set. Note: BUSY bit
* on parallel port is hardware inverted, but VFD is ready
* if its BUSY bit is cleared (thus high on PC).
*/
for (j_para = 0; j_para < MAXBUSY; j_para++) {
if ((port_in(p->port+1)) & BUSY)
break;
}
/* wait time of next WR */
for (j_para = 3; j_para < p->para_wait; j_para++)
port_in(p->port+1);
}
#endif
}
//写指令
void lcd1602_write_com(u8 com)
{
//lcd1602_busy();
port_out();
port_write(com);
RS_CLR;
RW_CLR;
EN_CLR;
EN_CLR;
EN_SET;
}
u_char trident_get_svga(void)
{
u_char dummy;
trident_set_old_regs();
port_out(0x0d, SEQ_I);
dummy = port_in(SEQ_D) & 0x10;
trident_set_new_regs();
v_printf("Trident get SVGA, dummy = 0x%02x\n", dummy);
return (dummy);
}
void
serialVFD_write_parallel (Driver *drvthis, unsigned char *dat, size_t length)
{
#ifdef HAVE_PCSTYLE_LPT_CONTROL
PrivateData *p = drvthis->private_data;
int i_para, j_para;
for (i_para = 0; i_para < length; i_para++) {
port_out(p->port, dat[i_para]);
// port_in(p->port+1);
port_out(p->port+2, WR_on);
port_in(p->port+1);
port_out(p->port+2, WR_off);
port_in(p->port+1);
for (j_para = 0; j_para < MAXBUSY; j_para++) {
if ((port_in(p->port+1)) & Busy)
break;
}
}
#endif
}
void write_portB(unsigned char byte) {
/* No read or write */
nRD_disable;
nWR_disable;
/* Select "B" register of 8255 */
A0_high;
A1_low;
/* Write control register contents */
port_write;
port_out(byte);
/* Strobe write signal */
nWR_enable;
nWR_disable;
}
/* Set initial port state */
void init_state() {
/* No read or write */
nRD_disable;
nWR_disable;
/* Select CONTROL register of 8255 */
A0_high;
A1_high;
/* Write control register contents */
port_write;
port_out(IO8255_CONFIG);
/* Strobe write signal */
nWR_enable;
nWR_disable;
}
/* These are trident Specific calls to get at banks */
void vga_init_trident(void)
{
port_out(0x0b, SEQ_I);
port_out(0x00, SEQ_D);
if (port_in(SEQ_D) >= 0x03) {
save_ext_regs = trident_save_ext_regs;
restore_ext_regs = trident_restore_ext_regs;
set_bank_read = trident_set_bank_read;
set_bank_write = trident_set_bank_write;
ext_video_port_in = trident_ext_video_port_in;
ext_video_port_out = trident_ext_video_port_out;
v_printf("Trident is 8900+\n");
}
else {
save_ext_regs = trident_save_ext_regs;
restore_ext_regs = trident_restore_ext_regs;
set_bank_read = trident_set_bank_read;
set_bank_write = trident_set_bank_write;
ext_video_port_in = trident_ext_video_port_in;
ext_video_port_out = trident_ext_video_port_out;
v_printf("Trident is 8800\n");
}
return;
}
int cmos_read(int port)
{
unsigned char holder;
h_printf("CMOS read. from add: 0x%02x\n", cmos.address);
switch(cmos.address)
{
case 0: /* RTC seconds */
case 2: /* minutes */
case 4: /* hours */
case 6: /* day of week */
case 7: /* day of month */
case 8: /* month */
case 9: /* year */
return (cmos_date(cmos.address));
case 1: /* RTC seconds alarm */
case 3: /* minutes alarm */
case 5: /* hours alarm */
h_printf("CMOS alarm read %d...UNIMPLEMENTED!\n", cmos.address);
return cmos.subst[cmos.address];
}
/* date functions return, so hereafter all values should be static
* after boot time...
*/
if (cmos.flag[cmos.address]) /* this reg has been written to */
{
holder=cmos.subst[cmos.address];
h_printf("CMOS: substituting written value 0x%02x for read\n",holder);
}
#ifdef DANGEROUS_CMOS
else if (!ioperm(0x70,2,1))
{
h_printf("CMOS: really reading!\n");
port_out((cmos.address & ~0xc0)|0x80, 0x70);
holder=port_in(0x71);
ioperm(0x70,2,0);
}
#endif
else error("CMOS: Can't get permissions for true I/O to 0x70, 0x71\n");
h_printf("CMOS read. add: 0x%02x = 0x%02x\n", cmos.address, holder);
return holder;
}
void trident_save_ext_regs(u_char xregs[], u_short xregs16[])
{
port_out(0x0c, SEQ_I);
xregs[0] = port_in(SEQ_D) & 0xff;
trident_set_old_regs();
port_out(0x0d, SEQ_I);
xregs[1] = port_in(SEQ_D) & 0xff;
port_out(0x0e, SEQ_I);
xregs[2] = port_in(SEQ_D) & 0xff;
trident_set_new_regs();
port_out(0x0d, SEQ_I);
xregs[3] = port_in(SEQ_D) & 0xff;
port_out(0x0e, SEQ_I);
xregs[4] = port_in(SEQ_D) & 0xff;
port_out(0x0f, SEQ_I);
xregs[5] = port_in(SEQ_D) & 0xff;
port_out(0x1e, CRT_I);
xregs[6] = port_in(CRT_D) & 0xff;
port_out(0x1f, CRT_I);
xregs[7] = port_in(CRT_D) & 0xff;
port_out(0x0f, GRA_I);
xregs[8] = port_in(GRA_D) & 0xff;
return;
}
void safe_port_out_byte(const unsigned short port, const unsigned char byte)
{
if (i_am_root) {
int result;
result = set_ioperm(port, 1, 1);
if (result) {
dprintf("failed to enable port %x\n", port);
leaveemu(ERR_IO);
}
port_out(byte, port);
result = set_ioperm(port, 1, 0);
if (result) {
dprintf("failed to disable port %x\n", port);
leaveemu(ERR_IO);
}
} else
i_printf("want to ");
i_printf("out(%x, 0x%x)\n", port, byte);
}
int write_port(unsigned int value, unsigned short port)
{
int i = find_port(port, IO_WRITE);
if (i == -1)
return (0);
if (!video_port_io) {
value &= ports[i].andmask;
value |= ports[i].ormask;
}
i_printf("write port 0x%x value %02x at %04x:%04x\n",
port, (value & 0xff), LWORD(cs), LWORD(eip));
LOG_IO(port, value, '<', 0xff);
if (!video_port_io)
enter_priv_on();
if (port <= 0x3ff)
set_ioperm(port, 1, 1);
else
priv_iopl(3);
if (!video_port_io)
leave_priv_setting();
port_out(value, port);
if (!video_port_io)
enter_priv_on();
if (port <= 0x3ff)
set_ioperm(port, 1, 0);
else
priv_iopl(0);
if (!video_port_io)
leave_priv_setting();
video_port_io = 0;
return (1);
}
//写指令。不判忙
void lcd1602_write_com_nobusy(u8 com)
{
// //while(lcd1602_busy());
// port_out();
// port_write(com);
// RS_CLR;
// RW_CLR;
// EN_CLR;
// EN_CLR;
// EN_SET;
RS_CLR;
RW_CLR;
EN_CLR;
asm("nop");
// asm("nop");
port_out();
port_write(com);
asm("nop");
// asm("nop");
EN_SET;
asm("nop");
// asm("nop");
EN_CLR;
}
/*{{{ set_regs*/
static int set_regs(char regs[])
{
int i;
port_out(0x00,GRA_I);
port_out(0x00,GRA_D); /* set/reset */
port_in(IS1_R); /* clear flip-flop */
port_out(0x00,SEQ_I);
port_out(0x01,SEQ_D); /* synchronous reset on */
port_out(regs[MIS+0], MIS_W); /* update misc output register */
port_out(0x1, SEQ_I);
port_out(regs[SEQ+1], SEQ_D); /* update clocking mode */
for (i = 2; i < SEQ_C; i++) { /* sequencer registers */
port_out(i, SEQ_I);
port_out(regs[SEQ+i], SEQ_D);
}
port_out(0x11, CRT_I);
port_out(regs[CRT+0x11]&0x7F, CRT_D); /* deprotect registers 0-7 */
for (i = 0; i < CRT_C; i++) { /* CRT controller registers */
port_out(i, CRT_I);
port_out(regs[CRT+i], CRT_D);
}
for (i = 0; i < GRA_C; i++) { /* graphics controller registers */
port_out(i, GRA_I);
port_out(regs[GRA+i], GRA_D);
}
for (i = 0; i < ATT_C; i++) { /* attribute controller registers */
port_in(IS1_R); /* reset flip-flop */
port_out(i, ATT_IW);
port_out(regs[ATT+i],ATT_IW);
}
port_out(0x00, SEQ_I);
port_out(0x03, SEQ_D); /* synchronous reset off */
return 0;
}
/*{{{ screenoff*/
void screenoff(){ port_in(IS1_R); port_out(0x00,ATT_IW);}
/*{{{ screenon*/
void screenon(){ port_in(IS1_R); port_out(0x20,ATT_IW);}
void trident_set_old_regs(void)
{
port_out(0x0b, SEQ_I);
port_out(0x00, SEQ_D);
return;
}