void nes_racermate_device::pcb_reset() { // m_chr_source = m_vrom_chunks ? CHRROM : CHRRAM; prg16_89ab(0); prg16_cdef(m_prg_chunks - 1); chr4_0(0, CHRRAM); chr4_4(0, CHRRAM); m_latch = 0; }
void nes_konami_vrc2_device::pcb_reset() { m_chr_source = m_vrom_chunks ? CHRROM : CHRRAM; prg16_89ab(0); prg16_cdef(m_prg_chunks - 1); chr8(0, m_chr_source); m_latch = 0; memset(m_mmc_vrom_bank, 0, sizeof(m_mmc_vrom_bank)); }
void nes_sunsoft_3_device::pcb_reset() { m_chr_source = m_vrom_chunks ? CHRROM : CHRRAM; prg16_89ab(0); prg16_cdef(m_prg_chunks - 1); chr8(0, m_chr_source); m_irq_toggle = 0; m_irq_count = 0; m_irq_enable = 0; }
void nes_namcot3425_device::pcb_reset() { m_chr_source = m_vrom_chunks ? CHRROM : CHRRAM; prg16_89ab(0); prg16_cdef(m_prg_chunks - 1); chr8(0, m_chr_source); m_latch = 0; memset(m_reg, 0, sizeof(m_reg)); }
void nes_daou306_device::pcb_reset() { m_chr_source = m_vrom_chunks ? CHRROM : CHRRAM; prg16_89ab(m_prg_chunks - 2); prg16_cdef(m_prg_chunks - 1); chr8(0, m_chr_source); set_nt_mirroring(PPU_MIRROR_LOW); memset(m_reg, 0, sizeof(m_reg)); }
void nes_tc0190fmc_pal16r4_device::pcb_reset() { m_chr_source = m_vrom_chunks ? CHRROM : CHRRAM; prg16_89ab(0); prg16_cdef(m_prg_chunks - 1); chr8(0, m_chr_source); m_irq_enable = 0; m_irq_count = 0; m_irq_count_latch = 0; }
void nes_fxrom_device::pcb_reset() { m_chr_source = m_vrom_chunks ? CHRROM : CHRRAM; prg16_89ab(0); prg16_cdef(m_prg_chunks - 1); chr8(0, m_chr_source); m_reg[0] = m_reg[2] = 0; m_reg[1] = m_reg[3] = 0; m_latch1 = m_latch2 = 0xfe; }
void nes_lz93d50_24c01_device::pcb_reset() { m_chr_source = m_vrom_chunks ? CHRROM : CHRRAM; prg16_89ab(0); prg16_cdef(m_prg_chunks - 1); chr8(0, m_chr_source); m_irq_enable = 0; m_irq_count = 0; m_i2c_dir = 0; }
void nes_futuremedia_device::pcb_reset() { m_chr_source = m_vrom_chunks ? CHRROM : CHRRAM; prg16_89ab(0); prg16_cdef(m_prg_chunks - 1); chr8(0, m_chr_source); m_irq_clear = 0; m_irq_enable = 0; m_irq_count = m_irq_count_latch = 0; }
void nes_namcot340_device::pcb_reset() { m_chr_source = m_vrom_chunks ? CHRROM : CHRRAM; prg16_89ab(0); prg16_cdef(m_prg_chunks - 1); chr8(0, m_chr_source); set_nt_mirroring(PPU_MIRROR_VERT); m_irq_enable = 0; m_irq_count = 0; }
void nes_ks7017_device::pcb_reset() { m_chr_source = m_vrom_chunks ? CHRROM : CHRRAM; prg16_89ab(0); prg16_cdef(2); chr8(0, m_chr_source); m_latch = 0; m_irq_enable = 0; m_irq_count = 0; m_irq_status = 0; }
void nes_sunsoft_4_device::pcb_reset() { m_chr_source = m_vrom_chunks ? CHRROM : CHRRAM; prg16_89ab(0); prg16_cdef(m_prg_chunks - 1); chr8(0, m_chr_source); m_reg = 0; m_latch1 = 0; m_latch2 = 0; m_wram_enable = 0; }
void nes_tam_s1_device::write_h(offs_t offset, uint8_t data) { LOG_MMC(("tam s1 write_h, offset: %04x, data: %02x\n", offset, data)); if (offset < 0x4000) { // this pcb is subject to bus conflict data = account_bus_conflict(offset, data); set_nt_mirroring(BIT(data, 7) ? PPU_MIRROR_VERT : PPU_MIRROR_HORZ); prg16_cdef(data); } }
void nes_ks7032_device::pcb_reset() { m_chr_source = m_vrom_chunks ? CHRROM : CHRRAM; prg16_89ab(0); prg16_cdef(m_prg_chunks - 1); chr8(0, m_chr_source); m_latch = 0; m_irq_enable = 0; m_irq_count = 0; memset(m_reg, 0, sizeof(m_reg)); prg_update(); }
void nes_cityfight_device::pcb_reset() { m_chr_source = m_vrom_chunks ? CHRROM : CHRRAM; prg16_89ab(0); prg16_cdef(m_prg_chunks - 1); chr8(0, m_chr_source); memset(m_mmc_vrom_bank, 0, sizeof(m_mmc_vrom_bank)); m_prg_reg = 0; m_prg_mode = 0; m_irq_enable = 0; m_irq_count = 0; }
void nes_nanjing_device::pcb_reset() { m_chr_source = m_vrom_chunks ? CHRROM : CHRRAM; prg16_89ab(m_prg_chunks - 2); prg16_cdef(m_prg_chunks - 1); chr8(0, m_chr_source); m_count = 0xff; m_latch1 = 0; m_latch2 = 0; m_reg[0] = 0xff; m_reg[1] = 0; }
void nes_konami_vrc3_device::pcb_reset() { m_chr_source = m_vrom_chunks ? CHRROM : CHRRAM; prg16_89ab(0); prg16_cdef(m_prg_chunks - 1); chr8(0, m_chr_source); m_irq_mode = 0; m_irq_enable = 0; m_irq_enable_latch = 0; m_irq_count = 0; m_irq_count_latch = 0; }
void nes_ffe4_device::pcb_reset() { m_chr_source = m_vrom_chunks ? CHRROM : CHRRAM; prg16_89ab(0); prg16_cdef(7); chr8(0, m_chr_source); m_exram_enabled = 0; m_exram_bank = 0; m_latch = 0; m_irq_enable = 0; m_irq_count = 0; }
void nes_exrom_device::pcb_reset() { m_chr_source = m_vrom_chunks ? CHRROM : CHRRAM; prg16_89ab(m_prg_chunks - 2); prg16_cdef(m_prg_chunks - 1); chr8(0, m_chr_source); m_irq_count = 0; m_irq_status = 0; m_irq_enable = 0; m_mult1 = m_mult2 = 0; m_vrom_page_a = m_vrom_page_b = 0; m_floodtile = m_floodattr = 0; m_prg_mode = 3; m_chr_mode = 0; m_wram_base = 0; m_wram_protect_1 = 0; m_wram_protect_2 = 0; m_high_chr = 0; m_split_scr = 0; m_split_rev = 0; m_split_ctrl = 0; m_split_yst = 0; m_split_bank = 0; m_last_chr = LAST_CHR_REG_A; m_ex1_chr = 0; m_split_chr = 0; m_ex1_bank = 0; m_vcount = 0; for (auto & elem : m_vrom_bank) elem = 0x3ff; m_prg_regs[0] = 0xfc; m_prg_regs[1] = 0xfd; m_prg_regs[2] = 0xfe; m_prg_regs[3] = 0xff; m_prg_ram_mapped[0] = 0; m_prg_ram_mapped[1] = 0; m_prg_ram_mapped[2] = 0; m_prg_ram_mapped[3] = 0; m_ram_hi_banks[0] = 0; m_ram_hi_banks[1] = 0; m_ram_hi_banks[2] = 0; m_ram_hi_banks[3] = 0; }
void nes_tf1201_device::pcb_reset() { m_chr_source = m_vrom_chunks ? CHRROM : CHRRAM; prg16_89ab(0); prg16_cdef(m_prg_chunks - 1); chr8(0, m_chr_source); memset(m_mmc_vrom_bank, 0, sizeof(m_mmc_vrom_bank)); m_prg = 0; m_swap = 0; m_irq_enable = 0; m_irq_enable_latch = 0; m_irq_count = 0; }
void nes_ffe8_device::pcb_reset() { m_chr_source = m_vrom_chunks ? CHRROM : CHRRAM; prg16_89ab(0); prg16_cdef(0xff); chr8(0, m_chr_source); // extra vram is not used by this board, so these will remain always zero m_exram_enabled = 0; m_exram_bank = 0; m_latch = 0; m_irq_enable = 0; m_irq_count = 0; }
void nes_hengg_shjy3_device::pcb_reset() { m_chr_source = m_vrom_chunks ? CHRROM : CHRRAM; prg16_89ab(0); prg16_cdef(m_prg_chunks - 1); chr8(0, m_chr_source); m_irq_enable = 0; m_irq_count = m_irq_count_latch = 0; m_chr_mode = 0; memset(m_mmc_prg_bank, 0, sizeof(m_mmc_prg_bank)); memset(m_mmc_vrom_bank, 0, sizeof(m_mmc_vrom_bank)); memset(m_mmc_extra_bank, 0, sizeof(m_mmc_extra_bank)); }
void nes_konami_vrc4_device::pcb_reset() { m_chr_source = m_vrom_chunks ? CHRROM : CHRRAM; prg16_89ab(0); prg16_cdef(m_prg_chunks - 1); chr8(0, m_chr_source); m_irq_mode = 0; m_irq_prescale = 341; m_irq_enable = 0; m_irq_enable_latch = 0; m_irq_count = 0; m_irq_count_latch = 0; m_latch = 0; m_mmc_prg_bank = 0; memset(m_mmc_vrom_bank, 0, sizeof(m_mmc_vrom_bank)); }
void nes_exrom_device::update_prg() { int bank0, bank1, bank2, bank3; switch (m_prg_mode) { case 0: // 32k banks bank3 = m_prg_regs[3]; prg32(bank3 >> 2); break; case 1: // 16k banks bank1 = m_prg_regs[1]; bank3 = m_prg_regs[3]; if (!BIT(bank1, 7)) // PRG RAM { prgram_bank8_x(0, (bank1 & 0x06)); prgram_bank8_x(1, (bank1 & 0x06) + 1); } else prg16_89ab(bank1 >> 1); prg16_cdef(bank3); break; case 2: // 16k-8k banks bank1 = m_prg_regs[1]; bank2 = m_prg_regs[2]; bank3 = m_prg_regs[3]; if (!BIT(bank1, 7)) { prgram_bank8_x(0, (bank1 & 0x06)); prgram_bank8_x(1, (bank1 & 0x06) + 1); } else prg16_89ab((bank1 & 0x7f) >> 1); if (!BIT(bank2, 7)) prgram_bank8_x(2, bank2 & 0x07); else prg8_cd(bank2 & 0x7f); prg8_ef(bank3); break; case 3: // 8k banks bank0 = m_prg_regs[0]; bank1 = m_prg_regs[1]; bank2 = m_prg_regs[2]; bank3 = m_prg_regs[3]; if (!BIT(bank0, 7)) prgram_bank8_x(0, bank0 & 0x07); else prg8_89(bank0 & 0x7f); if (!BIT(bank1, 7)) prgram_bank8_x(1, bank1 & 0x07); else prg8_ab(bank1 & 0x7f); if (!BIT(bank2, 7)) prgram_bank8_x(2, bank2 & 0x07); else prg8_cd(bank2 & 0x7f); prg8_ef(bank3); break; } }
void nes_exrom_device::update_prg() { int bank0, bank1, bank2, bank3; switch (m_prg_mode) { case 0: // 32k banks bank3 = m_prg_regs[3] >> 2; prg32(bank3); break; case 1: // 16k banks bank1 = m_prg_regs[1] >> 1; bank3 = m_prg_regs[3] >> 1; if (m_prg_ram_mapped[1]) { m_ram_hi_banks[0] = ((bank1 << 1) & 0x07); m_ram_hi_banks[1] = ((bank1 << 1) & 0x07) | 1; } else prg16_89ab(bank1); prg16_cdef(bank3); break; case 2: // 16k-8k banks bank1 = m_prg_regs[1] >> 1; bank2 = m_prg_regs[2]; bank3 = m_prg_regs[3]; if (m_prg_ram_mapped[1]) { m_ram_hi_banks[0] = ((bank1 << 1) & 0x07); m_ram_hi_banks[1] = ((bank1 << 1) & 0x07) | 1; } else prg16_89ab(bank1); if (m_prg_ram_mapped[2]) m_ram_hi_banks[2] = (bank2 & 0x07); else prg8_cd(bank2); prg8_ef(bank3); break; case 3: // 8k banks bank0 = m_prg_regs[0]; bank1 = m_prg_regs[1]; bank2 = m_prg_regs[2]; bank3 = m_prg_regs[3]; if (m_prg_ram_mapped[0]) m_ram_hi_banks[0] = (bank0 & 0x07); else prg8_89(bank0); if (m_prg_ram_mapped[1]) m_ram_hi_banks[1] = (bank1 & 0x07); else prg8_ab(bank1); if (m_prg_ram_mapped[2]) m_ram_hi_banks[2] = (bank2 & 0x07); else prg8_cd(bank2); prg8_ef(bank3); break; } }