void
sparc_store_inferior_registers (struct target_ops *ops,
struct regcache *regcache, int regnum)
{
struct gdbarch *gdbarch = get_regcache_arch (regcache);
int pid;
/* NOTE: cagney/2002-12-02: See comment in fetch_inferior_registers
about threaded assumptions. */
pid = ptid_get_lwp (inferior_ptid);
if (pid == 0)
pid = ptid_get_pid (inferior_ptid);
if (regnum == -1 || sparc_gregset_supplies_p (gdbarch, regnum))
{
gregset_t regs;
if (ptrace (PTRACE_GETREGS, pid, (PTRACE_TYPE_ARG3) ®s, 0) == -1)
perror_with_name (_("Couldn't get registers"));
sparc_collect_gregset (sparc_gregmap, regcache, regnum, ®s);
if (ptrace (PTRACE_SETREGS, pid, (PTRACE_TYPE_ARG3) ®s, 0) == -1)
perror_with_name (_("Couldn't write registers"));
/* Deal with the stack regs. */
if (regnum == -1 || regnum == SPARC_SP_REGNUM
|| (regnum >= SPARC_L0_REGNUM && regnum <= SPARC_I7_REGNUM))
{
ULONGEST sp;
regcache_cooked_read_unsigned (regcache, SPARC_SP_REGNUM, &sp);
sparc_collect_rwindow (regcache, sp, regnum);
}
if (regnum != -1)
return;
}
if (regnum == -1 || sparc_fpregset_supplies_p (gdbarch, regnum))
{
fpregset_t fpregs, saved_fpregs;
if (ptrace (PTRACE_GETFPREGS, pid, (PTRACE_TYPE_ARG3) &fpregs, 0) == -1)
perror_with_name (_("Couldn't get floating-point registers"));
memcpy (&saved_fpregs, &fpregs, sizeof (fpregs));
sparc_collect_fpregset (sparc_fpregmap, regcache, regnum, &fpregs);
/* Writing the floating-point registers will fail on NetBSD with
EINVAL if the inferior process doesn't have an FPU state
(i.e. if it didn't use the FPU yet). Therefore we don't try
to write the registers if nothing changed. */
if (memcmp (&saved_fpregs, &fpregs, sizeof (fpregs)) != 0)
{
if (ptrace (PTRACE_SETFPREGS, pid,
(PTRACE_TYPE_ARG3) &fpregs, 0) == -1)
perror_with_name (_("Couldn't write floating-point registers"));
}
if (regnum != -1)
return;
}
}
static LONGEST
rs6000_xfer_partial (struct target_ops *ops, enum target_object object,
const char *annex, gdb_byte *readbuf,
const gdb_byte *writebuf,
ULONGEST offset, LONGEST len)
{
pid_t pid = ptid_get_pid (inferior_ptid);
int arch64 = ARCH64 ();
switch (object)
{
case TARGET_OBJECT_LIBRARIES_AIX:
return rs6000_xfer_shared_libraries (ops, object, annex,
readbuf, writebuf,
offset, len);
case TARGET_OBJECT_MEMORY:
{
union
{
PTRACE_TYPE_RET word;
gdb_byte byte[sizeof (PTRACE_TYPE_RET)];
} buffer;
ULONGEST rounded_offset;
LONGEST partial_len;
/* Round the start offset down to the next long word
boundary. */
rounded_offset = offset & -(ULONGEST) sizeof (PTRACE_TYPE_RET);
/* Since ptrace will transfer a single word starting at that
rounded_offset the partial_len needs to be adjusted down to
that (remember this function only does a single transfer).
Should the required length be even less, adjust it down
again. */
partial_len = (rounded_offset + sizeof (PTRACE_TYPE_RET)) - offset;
if (partial_len > len)
partial_len = len;
if (writebuf)
{
/* If OFFSET:PARTIAL_LEN is smaller than
ROUNDED_OFFSET:WORDSIZE then a read/modify write will
be needed. Read in the entire word. */
if (rounded_offset < offset
|| (offset + partial_len
< rounded_offset + sizeof (PTRACE_TYPE_RET)))
{
/* Need part of initial word -- fetch it. */
if (arch64)
buffer.word = rs6000_ptrace64 (PT_READ_I, pid,
rounded_offset, 0, NULL);
else
buffer.word = rs6000_ptrace32 (PT_READ_I, pid,
(int *) (uintptr_t)
rounded_offset,
0, NULL);
}
/* Copy data to be written over corresponding part of
buffer. */
memcpy (buffer.byte + (offset - rounded_offset),
writebuf, partial_len);
errno = 0;
if (arch64)
rs6000_ptrace64 (PT_WRITE_D, pid,
rounded_offset, buffer.word, NULL);
else
rs6000_ptrace32 (PT_WRITE_D, pid,
(int *) (uintptr_t) rounded_offset,
buffer.word, NULL);
if (errno)
return 0;
}
if (readbuf)
{
errno = 0;
if (arch64)
buffer.word = rs6000_ptrace64 (PT_READ_I, pid,
rounded_offset, 0, NULL);
else
buffer.word = rs6000_ptrace32 (PT_READ_I, pid,
(int *)(uintptr_t)rounded_offset,
0, NULL);
if (errno)
return 0;
/* Copy appropriate bytes out of the buffer. */
memcpy (readbuf, buffer.byte + (offset - rounded_offset),
partial_len);
}
return partial_len;
}
default:
return -1;
}
}
void
kgdb_trgt_fetch_registers(int regno __unused)
{
struct kthr *kt;
struct pcb pcb;
uint64_t r;
kt = kgdb_thr_lookup_tid(ptid_get_pid(inferior_ptid));
if (kt == NULL)
return;
if (kvm_read(kvm, kt->pcb, &pcb, sizeof(pcb)) != sizeof(pcb)) {
warnx("kvm_read: %s", kvm_geterr(kvm));
memset(&pcb, 0, sizeof(pcb));
}
/* Registers 0-127: general registers. */
supply_register(IA64_GR1_REGNUM, (char *)&pcb.pcb_special.gp);
supply_register(IA64_GR4_REGNUM, (char *)&pcb.pcb_preserved.gr4);
supply_register(IA64_GR5_REGNUM, (char *)&pcb.pcb_preserved.gr5);
supply_register(IA64_GR6_REGNUM, (char *)&pcb.pcb_preserved.gr6);
supply_register(IA64_GR7_REGNUM, (char *)&pcb.pcb_preserved.gr7);
supply_register(IA64_GR12_REGNUM, (char *)&pcb.pcb_special.sp);
supply_register(IA64_GR12_REGNUM+1, (char *)&pcb.pcb_special.tp);
/* Registers 128-255: floating-point registers. */
supply_register(IA64_FR2_REGNUM, (char *)&pcb.pcb_preserved_fp.fr2);
supply_register(IA64_FR2_REGNUM+1, (char *)&pcb.pcb_preserved_fp.fr3);
supply_register(IA64_FR2_REGNUM+2, (char *)&pcb.pcb_preserved_fp.fr4);
supply_register(IA64_FR2_REGNUM+3, (char *)&pcb.pcb_preserved_fp.fr5);
supply_register(IA64_FR16_REGNUM, (char *)&pcb.pcb_preserved_fp.fr16);
supply_register(IA64_FR16_REGNUM+1, (char*)&pcb.pcb_preserved_fp.fr17);
supply_register(IA64_FR16_REGNUM+2, (char*)&pcb.pcb_preserved_fp.fr18);
supply_register(IA64_FR16_REGNUM+3, (char*)&pcb.pcb_preserved_fp.fr19);
supply_register(IA64_FR16_REGNUM+4, (char*)&pcb.pcb_preserved_fp.fr20);
supply_register(IA64_FR16_REGNUM+5, (char*)&pcb.pcb_preserved_fp.fr21);
supply_register(IA64_FR16_REGNUM+6, (char*)&pcb.pcb_preserved_fp.fr22);
supply_register(IA64_FR16_REGNUM+7, (char*)&pcb.pcb_preserved_fp.fr23);
supply_register(IA64_FR16_REGNUM+8, (char*)&pcb.pcb_preserved_fp.fr24);
supply_register(IA64_FR16_REGNUM+9, (char*)&pcb.pcb_preserved_fp.fr25);
supply_register(IA64_FR16_REGNUM+10,(char*)&pcb.pcb_preserved_fp.fr26);
supply_register(IA64_FR16_REGNUM+11,(char*)&pcb.pcb_preserved_fp.fr27);
supply_register(IA64_FR16_REGNUM+12,(char*)&pcb.pcb_preserved_fp.fr28);
supply_register(IA64_FR16_REGNUM+13,(char*)&pcb.pcb_preserved_fp.fr29);
supply_register(IA64_FR16_REGNUM+14,(char*)&pcb.pcb_preserved_fp.fr30);
supply_register(IA64_FR16_REGNUM+15,(char*)&pcb.pcb_preserved_fp.fr31);
/* Registers 320-327: branch registers. */
if (pcb.pcb_special.__spare == ~0UL)
supply_register(IA64_BR0_REGNUM, (char *)&pcb.pcb_special.rp);
supply_register(IA64_BR1_REGNUM, (char *)&pcb.pcb_preserved.br1);
supply_register(IA64_BR2_REGNUM, (char *)&pcb.pcb_preserved.br2);
supply_register(IA64_BR3_REGNUM, (char *)&pcb.pcb_preserved.br3);
supply_register(IA64_BR4_REGNUM, (char *)&pcb.pcb_preserved.br4);
supply_register(IA64_BR5_REGNUM, (char *)&pcb.pcb_preserved.br5);
/* Registers 328-333: misc. other registers. */
supply_register(IA64_PR_REGNUM, (char *)&pcb.pcb_special.pr);
if (pcb.pcb_special.__spare == ~0UL) {
r = pcb.pcb_special.iip + ((pcb.pcb_special.psr >> 41) & 3);
supply_register(IA64_IP_REGNUM, (char *)&r);
supply_register(IA64_CFM_REGNUM, (char *)&pcb.pcb_special.cfm);
} else {
static void
store_register (struct regcache *regcache, int regno)
{
struct gdbarch *gdbarch = get_regcache_arch (regcache);
int addr[MAX_REGISTER_SIZE];
int nr, isfloat;
/* Fetch the register's value from the register cache. */
regcache_raw_collect (regcache, regno, addr);
/* -1 can be a successful return value, so infer errors from errno. */
errno = 0;
nr = regmap (gdbarch, regno, &isfloat);
/* Floating-point registers. */
if (isfloat)
rs6000_ptrace32 (PT_WRITE_FPR, ptid_get_pid (inferior_ptid), addr, nr, 0);
/* Bogus register number. */
else if (nr < 0)
{
if (regno >= gdbarch_num_regs (gdbarch))
fprintf_unfiltered (gdb_stderr,
"gdb error: register no %d not implemented.\n",
regno);
}
/* Fixed-point registers. */
else
{
if (regno == gdbarch_sp_regnum (gdbarch))
/* Execute one dummy instruction (which is a breakpoint) in inferior
process to give kernel a chance to do internal housekeeping.
Otherwise the following ptrace(2) calls will mess up user stack
since kernel will get confused about the bottom of the stack
(%sp). */
exec_one_dummy_insn (regcache);
/* The PT_WRITE_GPR operation is rather odd. For 32-bit inferiors,
the register's value is passed by value, but for 64-bit inferiors,
the address of a buffer containing the value is passed. */
if (!ARCH64 ())
rs6000_ptrace32 (PT_WRITE_GPR, ptid_get_pid (inferior_ptid),
(int *) nr, *addr, 0);
else
{
/* PT_WRITE_GPR requires the buffer parameter to point to an 8-byte
area, even if the register is really only 32 bits. */
long long buf;
if (register_size (gdbarch, regno) == 8)
memcpy (&buf, addr, 8);
else
buf = *addr;
rs6000_ptrace64 (PT_WRITE_GPR, ptid_get_pid (inferior_ptid),
nr, 0, &buf);
}
}
if (errno)
{
perror (_("ptrace write"));
errno = 0;
}
}