static void shift_out_bits(struct _adapter *padapter, u16 data, u16 count)
{
u16 x, mask;
if (padapter->bSurpriseRemoved == true)
goto out;
mask = 0x01 << (count - 1);
x = r8712_read8(padapter, EE_9346CR);
x &= ~(_EEDO | _EEDI);
do {
x &= ~_EEDI;
if (data & mask)
x |= _EEDI;
if (padapter->bSurpriseRemoved == true)
goto out;
r8712_write8(padapter, EE_9346CR, (u8)x);
udelay(CLOCK_RATE);
up_clk(padapter, &x);
down_clk(padapter, &x);
mask = mask >> 1;
} while (mask);
if (padapter->bSurpriseRemoved == true)
goto out;
x &= ~_EEDI;
r8712_write8(padapter, EE_9346CR, (u8)x);
out:;
}
void r8712_eeprom_write16(struct _adapter *padapter, u16 reg, u16 data)
{
u8 x;
u8 tmp8_ori, tmp8_new, tmp8_clk_ori, tmp8_clk_new;
tmp8_ori = r8712_read8(padapter, 0x102502f1);
tmp8_new = tmp8_ori & 0xf7;
if (tmp8_ori != tmp8_new)
r8712_write8(padapter, 0x102502f1, tmp8_new);
tmp8_clk_ori = r8712_read8(padapter, 0x10250003);
tmp8_clk_new = tmp8_clk_ori | 0x20;
if (tmp8_clk_new != tmp8_clk_ori)
r8712_write8(padapter, 0x10250003, tmp8_clk_new);
x = r8712_read8(padapter, EE_9346CR);
x &= ~(_EEDI | _EEDO | _EESK | _EEM0);
x |= _EEM1 | _EECS;
r8712_write8(padapter, EE_9346CR, x);
shift_out_bits(padapter, EEPROM_EWEN_OPCODE, 5);
if (padapter->EepromAddressSize == 8) /*CF+ and SDIO*/
shift_out_bits(padapter, 0, 6);
else /* USB */
shift_out_bits(padapter, 0, 4);
standby(padapter);
/* Erase this particular word. Write the erase opcode and register
* number in that order. The opcode is 3bits in length; reg is 6
* bits long.
*/
standby(padapter);
/* write the new word to the EEPROM
* send the write opcode the EEPORM
*/
shift_out_bits(padapter, EEPROM_WRITE_OPCODE, 3);
/* select which word in the EEPROM that we are writing to. */
shift_out_bits(padapter, reg, padapter->EepromAddressSize);
/* write the data to the selected EEPROM word. */
shift_out_bits(padapter, data, 16);
if (wait_eeprom_cmd_done(padapter)) {
standby(padapter);
shift_out_bits(padapter, EEPROM_EWDS_OPCODE, 5);
shift_out_bits(padapter, reg, 4);
eeprom_clean(padapter);
}
if (tmp8_clk_new != tmp8_clk_ori)
r8712_write8(padapter, 0x10250003, tmp8_clk_ori);
if (tmp8_new != tmp8_ori)
r8712_write8(padapter, 0x102502f1, tmp8_ori);
}
static void standby(struct _adapter *padapter)
{
u8 x;
x = r8712_read8(padapter, EE_9346CR);
x &= ~(_EECS | _EESK);
r8712_write8(padapter, EE_9346CR, x);
udelay(CLOCK_RATE);
x |= _EECS;
r8712_write8(padapter, EE_9346CR, x);
udelay(CLOCK_RATE);
}
static void check_hw_pbc(struct _adapter *padapter)
{
u8 tmp1byte;
r8712_write8(padapter, MAC_PINMUX_CTRL, (GPIOMUX_EN | GPIOSEL_GPIO));
tmp1byte = r8712_read8(padapter, GPIO_IO_SEL);
tmp1byte &= ~(HAL_8192S_HW_GPIO_WPS_BIT);
r8712_write8(padapter, GPIO_IO_SEL, tmp1byte);
tmp1byte = r8712_read8(padapter, GPIO_CTRL);
if (tmp1byte == 0xff)
return;
if (tmp1byte&HAL_8192S_HW_GPIO_WPS_BIT) {
/* Here we only set bPbcPressed to true
* After trigger PBC, the variable will be set to false */
DBG_8712("CheckPbcGPIO - PBC is pressed !!!!\n");
/* 0 is the default value and it means the application monitors
* the HW PBC doesn't provide its pid to driver. */
if (padapter->pid == 0)
return;
kill_pid(find_vpid(padapter->pid), SIGUSR1, 1);
}
}
u16 r8712_eeprom_read16(struct _adapter *padapter, u16 reg) /*ReadEEprom*/
{
u16 x;
u16 data = 0;
u8 tmp8_ori, tmp8_new, tmp8_clk_ori, tmp8_clk_new;
tmp8_ori = r8712_read8(padapter, 0x102502f1);
tmp8_new = tmp8_ori & 0xf7;
if (tmp8_ori != tmp8_new)
r8712_write8(padapter, 0x102502f1, tmp8_new);
tmp8_clk_ori = r8712_read8(padapter, 0x10250003);
tmp8_clk_new = tmp8_clk_ori | 0x20;
if (tmp8_clk_new != tmp8_clk_ori)
r8712_write8(padapter, 0x10250003, tmp8_clk_new);
if (padapter->bSurpriseRemoved == true)
goto out;
/* select EEPROM, reset bits, set _EECS */
x = r8712_read8(padapter, EE_9346CR);
if (padapter->bSurpriseRemoved == true)
goto out;
x &= ~(_EEDI | _EEDO | _EESK | _EEM0);
x |= _EEM1 | _EECS;
r8712_write8(padapter, EE_9346CR, (unsigned char)x);
/* write the read opcode and register number in that order
* The opcode is 3bits in length, reg is 6 bits long
*/
shift_out_bits(padapter, EEPROM_READ_OPCODE, 3);
shift_out_bits(padapter, reg, padapter->EepromAddressSize);
/* Now read the data (16 bits) in from the selected EEPROM word */
data = shift_in_bits(padapter);
eeprom_clean(padapter);
out:
if (tmp8_clk_new != tmp8_clk_ori)
r8712_write8(padapter, 0x10250003, tmp8_clk_ori);
if (tmp8_new != tmp8_ori)
r8712_write8(padapter, 0x102502f1, tmp8_ori);
return data;
}
static void rpwm_workitem_callback(struct work_struct *work)
{
struct pwrctrl_priv *pwrpriv = container_of(work,
struct pwrctrl_priv, rpwm_workitem);
struct _adapter *padapter = container_of(pwrpriv,
struct _adapter, pwrctrlpriv);
if (pwrpriv->cpwm != pwrpriv->rpwm) {
_enter_pwrlock(&pwrpriv->lock);
r8712_read8(padapter, SDIO_HCPWM);
pwrpriv->rpwm_retry = 1;
r8712_set_rpwm(padapter, pwrpriv->rpwm);
up(&pwrpriv->lock);
}
}
static u16 shift_in_bits(struct _adapter *padapter)
{
u16 x, d = 0, i;
if (padapter->bSurpriseRemoved == true)
goto out;
x = r8712_read8(padapter, EE_9346CR);
x &= ~(_EEDO | _EEDI);
d = 0;
for (i = 0; i < 16; i++) {
d = d << 1;
up_clk(padapter, &x);
if (padapter->bSurpriseRemoved == true)
goto out;
x = r8712_read8(padapter, EE_9346CR);
x &= ~(_EEDI);
if (x & _EEDO)
d |= 1;
down_clk(padapter, &x);
}
out:
return d;
}
static u16 wait_eeprom_cmd_done(struct _adapter *padapter)
{
u8 x;
u16 i;
standby(padapter);
for (i = 0; i < 200; i++) {
x = r8712_read8(padapter, EE_9346CR);
if (x & _EEDO)
return true;
udelay(CLOCK_RATE);
}
return false;
}
static void eeprom_clean(struct _adapter *padapter)
{
u16 x;
if (padapter->bSurpriseRemoved == true)
return;
x = r8712_read8(padapter, EE_9346CR);
if (padapter->bSurpriseRemoved == true)
return;
x &= ~(_EECS | _EEDI);
r8712_write8(padapter, EE_9346CR, (u8)x);
if (padapter->bSurpriseRemoved == true)
return;
up_clk(padapter, &x);
if (padapter->bSurpriseRemoved == true)
return;
down_clk(padapter, &x);
}
static void SwLedOn(struct _adapter *padapter, struct LED_871x *pLed)
{
u8 LedCfg;
if ((padapter->bSurpriseRemoved == true) ||
(padapter->bDriverStopped == true))
return;
LedCfg = r8712_read8(padapter, LEDCFG);
switch (pLed->LedPin) {
case LED_PIN_GPIO0:
break;
case LED_PIN_LED0:
r8712_write8(padapter, LEDCFG, LedCfg&0xf0);
break;
case LED_PIN_LED1:
r8712_write8(padapter, LEDCFG, LedCfg&0x0f);
break;
default:
break;
}
pLed->bLedOn = true;
}
/*
* drv_init() - a device potentially for us
*
* notes: drv_init() is called when the bus driver has located a card for us
* to support. We accept the new device by returning 0.
*/
static int r871xu_drv_init(struct usb_interface *pusb_intf,
const struct usb_device_id *pdid)
{
uint status;
struct _adapter *padapter = NULL;
struct dvobj_priv *pdvobjpriv;
struct net_device *pnetdev;
struct usb_device *udev;
/* In this probe function, O.S. will provide the usb interface pointer
* to driver. We have to increase the reference count of the usb device
* structure by using the usb_get_dev function.
*/
udev = interface_to_usbdev(pusb_intf);
usb_get_dev(udev);
pintf = pusb_intf;
/* step 1. */
pnetdev = r8712_init_netdev();
if (!pnetdev)
goto error;
padapter = netdev_priv(pnetdev);
disable_ht_for_spec_devid(pdid, padapter);
pdvobjpriv = &padapter->dvobjpriv;
pdvobjpriv->padapter = padapter;
padapter->dvobjpriv.pusbdev = udev;
padapter->pusb_intf = pusb_intf;
usb_set_intfdata(pusb_intf, pnetdev);
SET_NETDEV_DEV(pnetdev, &pusb_intf->dev);
pnetdev->dev.type = &wlan_type;
/* step 2. */
padapter->dvobj_init = r8712_usb_dvobj_init;
padapter->dvobj_deinit = r8712_usb_dvobj_deinit;
padapter->halpriv.hal_bus_init = r8712_usb_hal_bus_init;
padapter->dvobjpriv.inirp_init = r8712_usb_inirp_init;
padapter->dvobjpriv.inirp_deinit = r8712_usb_inirp_deinit;
/* step 3.
* initialize the dvobj_priv
*/
if (!padapter->dvobj_init) {
goto error;
} else {
status = padapter->dvobj_init(padapter);
if (status != _SUCCESS)
goto error;
}
/* step 4. */
status = r8712_init_drv_sw(padapter);
if (status == _FAIL)
goto error;
/* step 5. read efuse/eeprom data and get mac_addr */
{
int i, offset;
u8 mac[6];
u8 tmpU1b, AutoloadFail, eeprom_CustomerID;
u8 *pdata = padapter->eeprompriv.efuse_eeprom_data;
tmpU1b = r8712_read8(padapter, EE_9346CR);/*CR9346*/
/* To check system boot selection.*/
dev_info(&udev->dev, "r8712u: Boot from %s: Autoload %s\n",
(tmpU1b & _9356SEL) ? "EEPROM" : "EFUSE",
(tmpU1b & _EEPROM_EN) ? "OK" : "Failed");
/* To check autoload success or not.*/
if (tmpU1b & _EEPROM_EN) {
AutoloadFail = true;
/* The following operations prevent Efuse leakage by
* turning on 2.5V.
*/
tmpU1b = r8712_read8(padapter, EFUSE_TEST + 3);
r8712_write8(padapter, EFUSE_TEST + 3, tmpU1b | 0x80);
msleep(20);
r8712_write8(padapter, EFUSE_TEST + 3,
(tmpU1b & (~BIT(7))));
/* Retrieve Chip version.
* Recognize IC version by Reg0x4 BIT15.
*/
tmpU1b = (u8)((r8712_read32(padapter, PMC_FSM) >> 15) &
0x1F);
if (tmpU1b == 0x3)
padapter->registrypriv.chip_version =
RTL8712_3rdCUT;
else
padapter->registrypriv.chip_version =
(tmpU1b >> 1) + 1;
switch (padapter->registrypriv.chip_version) {
case RTL8712_1stCUT:
case RTL8712_2ndCUT:
case RTL8712_3rdCUT:
break;
default:
padapter->registrypriv.chip_version =
RTL8712_2ndCUT;
break;
}
for (i = 0, offset = 0; i < 128; i += 8, offset++)
r8712_efuse_pg_packet_read(padapter, offset,
&pdata[i]);
if (!r8712_initmac || !mac_pton(r8712_initmac, mac)) {
/* Use the mac address stored in the Efuse
* offset = 0x12 for usb in efuse
*/
ether_addr_copy(mac, &pdata[0x12]);
}
eeprom_CustomerID = pdata[0x52];
switch (eeprom_CustomerID) {
case EEPROM_CID_ALPHA:
padapter->eeprompriv.CustomerID =
RT_CID_819x_ALPHA;
break;
case EEPROM_CID_CAMEO:
padapter->eeprompriv.CustomerID =
RT_CID_819x_CAMEO;
break;
case EEPROM_CID_SITECOM:
padapter->eeprompriv.CustomerID =
RT_CID_819x_Sitecom;
break;
case EEPROM_CID_COREGA:
padapter->eeprompriv.CustomerID =
RT_CID_COREGA;
break;
case EEPROM_CID_Senao:
padapter->eeprompriv.CustomerID =
RT_CID_819x_Senao;
break;
case EEPROM_CID_EDIMAX_BELKIN:
padapter->eeprompriv.CustomerID =
RT_CID_819x_Edimax_Belkin;
break;
case EEPROM_CID_SERCOMM_BELKIN:
padapter->eeprompriv.CustomerID =
RT_CID_819x_Sercomm_Belkin;
break;
case EEPROM_CID_WNC_COREGA:
padapter->eeprompriv.CustomerID =
RT_CID_819x_WNC_COREGA;
break;
case EEPROM_CID_WHQL:
break;
case EEPROM_CID_NetCore:
padapter->eeprompriv.CustomerID =
RT_CID_819x_Netcore;
break;
case EEPROM_CID_CAMEO1:
padapter->eeprompriv.CustomerID =
RT_CID_819x_CAMEO1;
break;
case EEPROM_CID_CLEVO:
padapter->eeprompriv.CustomerID =
RT_CID_819x_CLEVO;
break;
default:
padapter->eeprompriv.CustomerID =
RT_CID_DEFAULT;
break;
}
dev_info(&udev->dev, "r8712u: CustomerID = 0x%.4x\n",
padapter->eeprompriv.CustomerID);
/* Led mode */
switch (padapter->eeprompriv.CustomerID) {
case RT_CID_DEFAULT:
case RT_CID_819x_ALPHA:
case RT_CID_819x_CAMEO:
padapter->ledpriv.LedStrategy = SW_LED_MODE1;
padapter->ledpriv.bRegUseLed = true;
break;
case RT_CID_819x_Sitecom:
padapter->ledpriv.LedStrategy = SW_LED_MODE2;
padapter->ledpriv.bRegUseLed = true;
break;
case RT_CID_COREGA:
case RT_CID_819x_Senao:
padapter->ledpriv.LedStrategy = SW_LED_MODE3;
padapter->ledpriv.bRegUseLed = true;
break;
case RT_CID_819x_Edimax_Belkin:
padapter->ledpriv.LedStrategy = SW_LED_MODE4;
padapter->ledpriv.bRegUseLed = true;
break;
case RT_CID_819x_Sercomm_Belkin:
padapter->ledpriv.LedStrategy = SW_LED_MODE5;
padapter->ledpriv.bRegUseLed = true;
break;
case RT_CID_819x_WNC_COREGA:
padapter->ledpriv.LedStrategy = SW_LED_MODE6;
padapter->ledpriv.bRegUseLed = true;
break;
default:
padapter->ledpriv.LedStrategy = SW_LED_MODE0;
padapter->ledpriv.bRegUseLed = false;
break;
}
} else {
u8 r8712_usb_hal_bus_init(struct _adapter *padapter)
{
u8 val8 = 0;
u8 ret = _SUCCESS;
int PollingCnt = 20;
struct registry_priv *pregistrypriv = &padapter->registrypriv;
if (pregistrypriv->chip_version == RTL8712_FPGA) {
val8 = 0x01;
/* switch to 80M clock */
r8712_write8(padapter, SYS_CLKR, val8);
val8 = r8712_read8(padapter, SPS1_CTRL);
val8 = val8 | 0x01;
/* enable VSPS12 LDO Macro block */
r8712_write8(padapter, SPS1_CTRL, val8);
val8 = r8712_read8(padapter, AFE_MISC);
val8 = val8 | 0x01;
/* Enable AFE Macro Block's Bandgap */
r8712_write8(padapter, AFE_MISC, val8);
val8 = r8712_read8(padapter, LDOA15_CTRL);
val8 = val8 | 0x01;
/* enable LDOA15 block */
r8712_write8(padapter, LDOA15_CTRL, val8);
val8 = r8712_read8(padapter, SPS1_CTRL);
val8 = val8 | 0x02;
/* Enable VSPS12_SW Macro Block */
r8712_write8(padapter, SPS1_CTRL, val8);
val8 = r8712_read8(padapter, AFE_MISC);
val8 = val8 | 0x02;
/* Enable AFE Macro Block's Mbias */
r8712_write8(padapter, AFE_MISC, val8);
val8 = r8712_read8(padapter, SYS_ISO_CTRL + 1);
val8 = val8 | 0x08;
/* isolate PCIe Analog 1.2V to PCIe 3.3V and PCIE Digital */
r8712_write8(padapter, SYS_ISO_CTRL + 1, val8);
val8 = r8712_read8(padapter, SYS_ISO_CTRL + 1);
val8 = val8 & 0xEF;
/* attatch AFE PLL to MACTOP/BB/PCIe Digital */
r8712_write8(padapter, SYS_ISO_CTRL + 1, val8);
val8 = r8712_read8(padapter, AFE_XTAL_CTRL + 1);
val8 = val8 & 0xFB;
/* enable AFE clock */
r8712_write8(padapter, AFE_XTAL_CTRL + 1, val8);
val8 = r8712_read8(padapter, AFE_PLL_CTRL);
val8 = val8 | 0x01;
/* Enable AFE PLL Macro Block */
r8712_write8(padapter, AFE_PLL_CTRL, val8);
val8 = 0xEE;
/* release isolation AFE PLL & MD */
r8712_write8(padapter, SYS_ISO_CTRL, val8);
val8 = r8712_read8(padapter, SYS_CLKR + 1);
val8 = val8 | 0x08;
/* enable MAC clock */
r8712_write8(padapter, SYS_CLKR + 1, val8);
val8 = r8712_read8(padapter, SYS_FUNC_EN + 1);
val8 = val8 | 0x08;
/* enable Core digital and enable IOREG R/W */
r8712_write8(padapter, SYS_FUNC_EN + 1, val8);
val8 = val8 | 0x80;
/* enable REG_EN */
r8712_write8(padapter, SYS_FUNC_EN + 1, val8);
val8 = r8712_read8(padapter, SYS_CLKR + 1);
val8 = (val8 | 0x80) & 0xBF;
/* switch the control path */
r8712_write8(padapter, SYS_CLKR + 1, val8);
val8 = 0xFC;
r8712_write8(padapter, CR, val8);
val8 = 0x37;
r8712_write8(padapter, CR + 1, val8);
/* reduce EndPoint & init it */
r8712_write8(padapter, 0x102500ab, r8712_read8(padapter,
0x102500ab) | BIT(6) | BIT(7));
/* consideration of power consumption - init */
r8712_write8(padapter, 0x10250008, r8712_read8(padapter,
0x10250008) & 0xfffffffb);
} else if (pregistrypriv->chip_version == RTL8712_1stCUT) {
/* Initialization for power on sequence, */
r8712_write8(padapter, SPS0_CTRL + 1, 0x53);
r8712_write8(padapter, SPS0_CTRL, 0x57);
/* Enable AFE Macro Block's Bandgap and Enable AFE Macro
* Block's Mbias
*/
val8 = r8712_read8(padapter, AFE_MISC);
r8712_write8(padapter, AFE_MISC, (val8 | AFE_MISC_BGEN |
AFE_MISC_MBEN));
/* Enable LDOA15 block */
val8 = r8712_read8(padapter, LDOA15_CTRL);
r8712_write8(padapter, LDOA15_CTRL, (val8 | LDA15_EN));
val8 = r8712_read8(padapter, SPS1_CTRL);
r8712_write8(padapter, SPS1_CTRL, (val8 | SPS1_LDEN));
msleep(20);
/* Enable Switch Regulator Block */
val8 = r8712_read8(padapter, SPS1_CTRL);
r8712_write8(padapter, SPS1_CTRL, (val8 | SPS1_SWEN));
r8712_write32(padapter, SPS1_CTRL, 0x00a7b267);
val8 = r8712_read8(padapter, SYS_ISO_CTRL + 1);
r8712_write8(padapter, SYS_ISO_CTRL + 1, (val8 | 0x08));
/* Engineer Packet CP test Enable */
val8 = r8712_read8(padapter, SYS_FUNC_EN + 1);
r8712_write8(padapter, SYS_FUNC_EN + 1, (val8 | 0x20));
val8 = r8712_read8(padapter, SYS_ISO_CTRL + 1);
r8712_write8(padapter, SYS_ISO_CTRL + 1, (val8 & 0x6F));
/* Enable AFE clock */
val8 = r8712_read8(padapter, AFE_XTAL_CTRL + 1);
r8712_write8(padapter, AFE_XTAL_CTRL + 1, (val8 & 0xfb));
/* Enable AFE PLL Macro Block */
val8 = r8712_read8(padapter, AFE_PLL_CTRL);
r8712_write8(padapter, AFE_PLL_CTRL, (val8 | 0x11));
/* Attach AFE PLL to MACTOP/BB/PCIe Digital */
val8 = r8712_read8(padapter, SYS_ISO_CTRL);
r8712_write8(padapter, SYS_ISO_CTRL, (val8 & 0xEE));
/* Switch to 40M clock */
val8 = r8712_read8(padapter, SYS_CLKR);
r8712_write8(padapter, SYS_CLKR, val8 & (~SYS_CLKSEL));
/* SSC Disable */
val8 = r8712_read8(padapter, SYS_CLKR);
/* Enable MAC clock */
val8 = r8712_read8(padapter, SYS_CLKR + 1);
r8712_write8(padapter, SYS_CLKR + 1, (val8 | 0x18));
/* Revised POS, */
r8712_write8(padapter, PMC_FSM, 0x02);
/* Enable Core digital and enable IOREG R/W */
val8 = r8712_read8(padapter, SYS_FUNC_EN + 1);
r8712_write8(padapter, SYS_FUNC_EN + 1, (val8 | 0x08));
/* Enable REG_EN */
val8 = r8712_read8(padapter, SYS_FUNC_EN + 1);
r8712_write8(padapter, SYS_FUNC_EN + 1, (val8 | 0x80));
/* Switch the control path to FW */
val8 = r8712_read8(padapter, SYS_CLKR + 1);
r8712_write8(padapter, SYS_CLKR + 1, (val8 | 0x80) & 0xBF);
r8712_write8(padapter, CR, 0xFC);
r8712_write8(padapter, CR + 1, 0x37);
/* Fix the RX FIFO issue(usb error), */
val8 = r8712_read8(padapter, 0x1025FE5c);
r8712_write8(padapter, 0x1025FE5c, (val8 | BIT(7)));
val8 = r8712_read8(padapter, 0x102500ab);
r8712_write8(padapter, 0x102500ab, (val8 | BIT(6) | BIT(7)));
/* For power save, used this in the bit file after 970621 */
val8 = r8712_read8(padapter, SYS_CLKR);
r8712_write8(padapter, SYS_CLKR, val8 & (~CPU_CLKSEL));
} else if (pregistrypriv->chip_version == RTL8712_2ndCUT ||
pregistrypriv->chip_version == RTL8712_3rdCUT) {
/* Initialization for power on sequence,
* E-Fuse leakage prevention sequence
*/
r8712_write8(padapter, 0x37, 0xb0);
msleep(20);
r8712_write8(padapter, 0x37, 0x30);
/* Set control path switch to HW control and reset Digital Core,
* CPU Core and MAC I/O to solve FW download fail when system
* from resume sate.
*/
val8 = r8712_read8(padapter, SYS_CLKR + 1);
if (val8 & 0x80) {
val8 &= 0x3f;
r8712_write8(padapter, SYS_CLKR + 1, val8);
}
val8 = r8712_read8(padapter, SYS_FUNC_EN + 1);
val8 &= 0x73;
r8712_write8(padapter, SYS_FUNC_EN + 1, val8);
msleep(20);
/* Revised POS, */
/* Enable AFE Macro Block's Bandgap and Enable AFE Macro
* Block's Mbias
*/
r8712_write8(padapter, SPS0_CTRL + 1, 0x53);
r8712_write8(padapter, SPS0_CTRL, 0x57);
val8 = r8712_read8(padapter, AFE_MISC);
/*Bandgap*/
r8712_write8(padapter, AFE_MISC, (val8 | AFE_MISC_BGEN));
r8712_write8(padapter, AFE_MISC, (val8 | AFE_MISC_BGEN |
AFE_MISC_MBEN | AFE_MISC_I32_EN));
/* Enable PLL Power (LDOA15V) */
val8 = r8712_read8(padapter, LDOA15_CTRL);
r8712_write8(padapter, LDOA15_CTRL, (val8 | LDA15_EN));
/* Enable LDOV12D block */
val8 = r8712_read8(padapter, LDOV12D_CTRL);
r8712_write8(padapter, LDOV12D_CTRL, (val8 | LDV12_EN));
val8 = r8712_read8(padapter, SYS_ISO_CTRL + 1);
r8712_write8(padapter, SYS_ISO_CTRL + 1, (val8 | 0x08));
/* Engineer Packet CP test Enable */
val8 = r8712_read8(padapter, SYS_FUNC_EN + 1);
r8712_write8(padapter, SYS_FUNC_EN + 1, (val8 | 0x20));
/* Support 64k IMEM */
val8 = r8712_read8(padapter, SYS_ISO_CTRL + 1);
r8712_write8(padapter, SYS_ISO_CTRL + 1, (val8 & 0x68));
/* Enable AFE clock */
val8 = r8712_read8(padapter, AFE_XTAL_CTRL + 1);
r8712_write8(padapter, AFE_XTAL_CTRL + 1, (val8 & 0xfb));
/* Enable AFE PLL Macro Block */
val8 = r8712_read8(padapter, AFE_PLL_CTRL);
r8712_write8(padapter, AFE_PLL_CTRL, (val8 | 0x11));
/* Some sample will download fw failure. The clock will be
* stable with 500 us delay after reset the PLL
* TODO: When usleep is added to kernel, change next 3
* udelay(500) to usleep(500)
*/
udelay(500);
r8712_write8(padapter, AFE_PLL_CTRL, (val8 | 0x51));
udelay(500);
r8712_write8(padapter, AFE_PLL_CTRL, (val8 | 0x11));
udelay(500);
/* Attach AFE PLL to MACTOP/BB/PCIe Digital */
val8 = r8712_read8(padapter, SYS_ISO_CTRL);
r8712_write8(padapter, SYS_ISO_CTRL, (val8 & 0xEE));
/* Switch to 40M clock */
r8712_write8(padapter, SYS_CLKR, 0x00);
/* CPU Clock and 80M Clock SSC Disable to overcome FW download
* fail timing issue.
*/
val8 = r8712_read8(padapter, SYS_CLKR);
r8712_write8(padapter, SYS_CLKR, (val8 | 0xa0));
/* Enable MAC clock */
val8 = r8712_read8(padapter, SYS_CLKR + 1);
r8712_write8(padapter, SYS_CLKR + 1, (val8 | 0x18));
/* Revised POS, */
r8712_write8(padapter, PMC_FSM, 0x02);
/* Enable Core digital and enable IOREG R/W */
val8 = r8712_read8(padapter, SYS_FUNC_EN + 1);
r8712_write8(padapter, SYS_FUNC_EN + 1, (val8 | 0x08));
/* Enable REG_EN */
val8 = r8712_read8(padapter, SYS_FUNC_EN + 1);
r8712_write8(padapter, SYS_FUNC_EN + 1, (val8 | 0x80));
/* Switch the control path to FW */
val8 = r8712_read8(padapter, SYS_CLKR + 1);
r8712_write8(padapter, SYS_CLKR + 1, (val8 | 0x80) & 0xBF);
r8712_write8(padapter, CR, 0xFC);
r8712_write8(padapter, CR + 1, 0x37);
/* Fix the RX FIFO issue(usb error), 970410 */
val8 = r8712_read8(padapter, 0x1025FE5c);
r8712_write8(padapter, 0x1025FE5c, (val8 | BIT(7)));
/* For power save, used this in the bit file after 970621 */
val8 = r8712_read8(padapter, SYS_CLKR);
r8712_write8(padapter, SYS_CLKR, val8 & (~CPU_CLKSEL));
/* Revised for 8051 ROM code wrong operation. */
r8712_write8(padapter, 0x1025fe1c, 0x80);
/* To make sure that TxDMA can ready to download FW.
* We should reset TxDMA if IMEM RPT was not ready.
*/
do {
val8 = r8712_read8(padapter, TCR);
if ((val8 & _TXDMA_INIT_VALUE) == _TXDMA_INIT_VALUE)
break;
udelay(5); /* PlatformStallExecution(5); */
} while (PollingCnt--); /* Delay 1ms */
if (PollingCnt <= 0) {
val8 = r8712_read8(padapter, CR);
r8712_write8(padapter, CR, val8 & (~_TXDMA_EN));
udelay(2); /* PlatformStallExecution(2); */
/* Reset TxDMA */
r8712_write8(padapter, CR, val8 | _TXDMA_EN);
}
} else {
ret = _FAIL;
}
return ret;
}
static int r871xu_drv_init(struct usb_interface *pusb_intf,
const struct usb_device_id *pdid)
{
uint status;
struct _adapter *padapter = NULL;
struct dvobj_priv *pdvobjpriv;
struct net_device *pnetdev;
struct usb_device *udev;
printk(KERN_INFO "r8712u: DriverVersion: %s\n", DRVER);
udev = interface_to_usbdev(pusb_intf);
usb_get_dev(udev);
pintf = pusb_intf;
pnetdev = r8712_init_netdev();
if (!pnetdev)
goto error;
padapter = netdev_priv(pnetdev);
disable_ht_for_spec_devid(pdid, padapter);
pdvobjpriv = &padapter->dvobjpriv;
pdvobjpriv->padapter = padapter;
padapter->dvobjpriv.pusbdev = udev;
padapter->pusb_intf = pusb_intf;
usb_set_intfdata(pusb_intf, pnetdev);
SET_NETDEV_DEV(pnetdev, &pusb_intf->dev);
padapter->dvobj_init = &r8712_usb_dvobj_init;
padapter->dvobj_deinit = &r8712_usb_dvobj_deinit;
padapter->halpriv.hal_bus_init = &r8712_usb_hal_bus_init;
padapter->dvobjpriv.inirp_init = &r8712_usb_inirp_init;
padapter->dvobjpriv.inirp_deinit = &r8712_usb_inirp_deinit;
if (padapter->dvobj_init == NULL)
goto error;
else {
status = padapter->dvobj_init(padapter);
if (status != _SUCCESS)
goto error;
}
status = r8712_init_drv_sw(padapter);
if (status == _FAIL)
goto error;
{
int i, offset;
u8 mac[6];
u8 tmpU1b, AutoloadFail, eeprom_CustomerID;
u8 *pdata = padapter->eeprompriv.efuse_eeprom_data;
tmpU1b = r8712_read8(padapter, EE_9346CR);
printk(KERN_INFO "r8712u: Boot from %s: Autoload %s\n",
(tmpU1b & _9356SEL) ? "EEPROM" : "EFUSE",
(tmpU1b & _EEPROM_EN) ? "OK" : "Failed");
if (tmpU1b & _EEPROM_EN) {
AutoloadFail = true;
tmpU1b = r8712_read8(padapter, EFUSE_TEST+3);
r8712_write8(padapter, EFUSE_TEST + 3, tmpU1b | 0x80);
msleep(20);
r8712_write8(padapter, EFUSE_TEST + 3,
(tmpU1b & (~BIT(7))));
tmpU1b = (u8)((r8712_read32(padapter, PMC_FSM) >> 15) &
0x1F);
if (tmpU1b == 0x3)
padapter->registrypriv.chip_version =
RTL8712_3rdCUT;
else
padapter->registrypriv.chip_version =
(tmpU1b >> 1) + 1;
switch (padapter->registrypriv.chip_version) {
case RTL8712_1stCUT:
case RTL8712_2ndCUT:
case RTL8712_3rdCUT:
break;
default:
padapter->registrypriv.chip_version =
RTL8712_2ndCUT;
break;
}
for (i = 0, offset = 0; i < 128; i += 8, offset++)
r8712_efuse_pg_packet_read(padapter, offset,
&pdata[i]);
if (r8712_initmac) {
int jj, kk;
for (jj = 0, kk = 0; jj < ETH_ALEN;
jj++, kk += 3)
mac[jj] =
key_2char2num(r8712_initmac[kk],
r8712_initmac[kk + 1]);
} else {
memcpy(mac, &pdata[0x12], ETH_ALEN);
}
eeprom_CustomerID = pdata[0x52];
switch (eeprom_CustomerID) {
case EEPROM_CID_ALPHA:
padapter->eeprompriv.CustomerID =
RT_CID_819x_ALPHA;
break;
case EEPROM_CID_CAMEO:
padapter->eeprompriv.CustomerID =
RT_CID_819x_CAMEO;
break;
case EEPROM_CID_SITECOM:
padapter->eeprompriv.CustomerID =
RT_CID_819x_Sitecom;
break;
case EEPROM_CID_COREGA:
padapter->eeprompriv.CustomerID =
RT_CID_COREGA;
break;
case EEPROM_CID_Senao:
padapter->eeprompriv.CustomerID =
RT_CID_819x_Senao;
break;
case EEPROM_CID_EDIMAX_BELKIN:
padapter->eeprompriv.CustomerID =
RT_CID_819x_Edimax_Belkin;
break;
case EEPROM_CID_SERCOMM_BELKIN:
padapter->eeprompriv.CustomerID =
RT_CID_819x_Sercomm_Belkin;
break;
case EEPROM_CID_WNC_COREGA:
padapter->eeprompriv.CustomerID =
RT_CID_819x_WNC_COREGA;
break;
case EEPROM_CID_WHQL:
break;
case EEPROM_CID_NetCore:
padapter->eeprompriv.CustomerID =
RT_CID_819x_Netcore;
break;
case EEPROM_CID_CAMEO1:
padapter->eeprompriv.CustomerID =
RT_CID_819x_CAMEO1;
break;
case EEPROM_CID_CLEVO:
padapter->eeprompriv.CustomerID =
RT_CID_819x_CLEVO;
break;
default:
padapter->eeprompriv.CustomerID =
RT_CID_DEFAULT;
break;
}
printk(KERN_INFO "r8712u: CustomerID = 0x%.4x\n",
padapter->eeprompriv.CustomerID);
switch (padapter->eeprompriv.CustomerID) {
case RT_CID_DEFAULT:
case RT_CID_819x_ALPHA:
case RT_CID_819x_CAMEO:
padapter->ledpriv.LedStrategy = SW_LED_MODE1;
padapter->ledpriv.bRegUseLed = true;
break;
case RT_CID_819x_Sitecom:
padapter->ledpriv.LedStrategy = SW_LED_MODE2;
padapter->ledpriv.bRegUseLed = true;
break;
case RT_CID_COREGA:
case RT_CID_819x_Senao:
padapter->ledpriv.LedStrategy = SW_LED_MODE3;
padapter->ledpriv.bRegUseLed = true;
break;
case RT_CID_819x_Edimax_Belkin:
padapter->ledpriv.LedStrategy = SW_LED_MODE4;
padapter->ledpriv.bRegUseLed = true;
break;
case RT_CID_819x_Sercomm_Belkin:
padapter->ledpriv.LedStrategy = SW_LED_MODE5;
padapter->ledpriv.bRegUseLed = true;
break;
case RT_CID_819x_WNC_COREGA:
padapter->ledpriv.LedStrategy = SW_LED_MODE6;
padapter->ledpriv.bRegUseLed = true;
break;
default:
padapter->ledpriv.LedStrategy = SW_LED_MODE0;
padapter->ledpriv.bRegUseLed = false;
break;
}
} else
