void interrupt_nsptimer(int irq, void *pregs, void *pdata ) { uint32_t ctl; struct arch_regs *regs = pregs; uart_print( "=======================================\n\r" ); HVMM_TRACE_ENTER(); /* Disable NS Physical Timer Interrupt */ ctl = read_cntp_ctl(); ctl &= ~(0x1); write_cntp_ctl(ctl); /* Trigger another interrupt */ test_start_timer(); /* Test guest context switch */ if ( (regs->cpsr & 0x1F) != 0x1A ) { /* Not from Hyp, switch the guest context */ context_dump_regs( regs ); context_switchto(sched_policy_determ_next()); } HVMM_TRACE_EXIT(); uart_print( "=======================================\n\r" ); }
void dump_timer_regs(void) { #if 0 unsigned int cntfrq = 0xFFFFFFFF; unsigned int cntkctl = 0xFFFFFFFF; #endif unsigned int cntpct_lo = 0xFFFFFFFF; unsigned int cntpct_hi = 0xFFFFFFFF; #if 0 unsigned int cntvct_lo = 0xFFFFFFFF; unsigned int cntvct_hi = 0xFFFFFFFF; #endif unsigned int cntp_ctl = 0xFFFFFFFF; unsigned int cntp_cval_lo = 0xFFFFFFFF; unsigned int cntp_cval_hi = 0xFFFFFFFF; unsigned int cntp_tval = 0xFFFFFFFF; #if 0 unsigned int cntv_ctl = 0xFFFFFFFF; unsigned int cntv_cval_lo = 0xFFFFFFFF; unsigned int cntv_cval_hi = 0xFFFFFFFF; unsigned int cntv_tval = 0xFFFFFFFF; #endif #if 0 read_cntfrq(cntfrq); read_cntkctl(cntkctl); #endif read_cntpct(cntpct_lo, cntpct_hi); #if 0 read_cntvct(cntvct_lo, cntvct_hi); #endif read_cntp_ctl(cntp_ctl); read_cntp_cval(cntp_cval_lo, cntp_cval_hi); read_cntp_tval(cntp_tval); #if 0 read_cntv_ctl(cntv_ctl); read_cntv_cval(cntv_cval_lo, cntv_cval_hi); read_cntv_tval(cntv_tval); #endif #if 0 printk("[ca7_timer]0. cntfrq = 0x%x\n", cntfrq); printk("[ca7_timer]1. cntkctl = 0x%x\n", cntkctl); #endif printk("[ca7_timer]2. cntpct_lo = 0x%08x, cntpct_hi = 0x%08x\n", cntpct_lo, cntpct_hi); #if 0 printk("[ca7_timer]3. cntvct_lo = 0x%08x, cntvct_hi = 0x%08x\n", cntvct_lo, cntvct_hi); #endif printk("[ca7_timer]4. cntp_ctl = 0x%x\n", cntp_ctl); printk("[ca7_timer]5. cntp_cval_lo = 0x%08x, cntp_cval_hi = 0x%08x\n", cntp_cval_lo, cntp_cval_hi); printk("[ca7_timer]6. cntp_tval = 0x%08x\n", cntp_tval); #if 0 printk("[ca7_timer]7. cntv_ctl = 0x%x\n", cntv_ctl); printk("[ca7_timer]8. cntv_cval_lo = 0x%08x, cntv_cval_hi = 0x%08x\n", cntv_cval_lo, cntv_cval_hi); printk("[ca7_timer]9. cntv_tval = 0x%08x\n", cntv_tval); #endif }
static void save_localtimer_info(unsigned long evt, int ext) { int cpu; unsigned int ctrl; cpu = smp_processor_id(); read_cntp_ctl(ctrl); save_data[cpu].evt = evt; save_data[cpu].ctrl = ctrl; save_data[cpu].ext = ext; save_data[cpu].timestamp = sched_clock(); }
/* * generic_timer_ack: checks for a local timer interrupt. * * If a local timer interrupt has occurred, acknowledge and return 1. * Otherwise, return 0. */ static int generic_timer_ack(void) { unsigned int cntp_ctl; read_cntp_ctl(cntp_ctl); if (cntp_ctl & CNTP_CTL_ISTATUS) { write_cntp_ctl(CNTP_CTL_IMASK); return 1; } printk("WARNING: Generic Timer CNTP_CTL = 0x%x\n", cntp_ctl); return 0; }
static int test_ack(void) { unsigned int cntp_ctl; read_cntp_ctl(cntp_ctl); printk("test_ack: CNTP_CTL = 0x%x\n", cntp_ctl); if (cntp_ctl & CNTP_CTL_ISTATUS) { write_cntp_ctl(CNTP_CTL_IMASK); return 1; } return 0; }
int dump_localtimer_register(char* buffer, int size) { int i; int len = 0; #define LOCAL_LEN 256 char fmt[LOCAL_LEN]; unsigned int cntp_ctl; unsigned int cntp_tval; unsigned int cntp_cval_lo, cntp_cval_hi; unsigned int cntpct_lo, cntpct_hi; if (!buffer || size <= 1) { return 0; } len += snprintf(fmt + len, LOCAL_LEN - len, "[localtimer]cpu evt ctl ext time\n"); for (i = 0; i < nr_cpu_ids; i++) { len += snprintf(fmt + len, LOCAL_LEN - len, "%d %lx %x %d %llx\n", i, save_data[i].evt, save_data[i].ctrl, save_data[i].ext, save_data[i].timestamp); } read_cntp_ctl(cntp_ctl); read_cntp_cval(cntp_cval_lo, cntp_cval_hi); read_cntp_tval(cntp_tval); read_cntpct(cntpct_lo, cntpct_hi); len += snprintf(fmt + len, LOCAL_LEN - len, "cpu ctl tval cval pct\n"); len += snprintf(fmt + len, LOCAL_LEN - len, "%d %x %x (%x,%x) (%x,%x)\n", smp_processor_id(), cntp_ctl, cntp_tval, cntp_cval_lo, cntp_cval_hi, cntpct_lo, cntpct_hi); len = min(len, size - 1); memcpy(buffer, fmt, len); *(buffer + len) = '\0'; return len; }
static void test_start_timer(void) { uint32_t ctl; uint32_t tval; uint64_t pct; HVMM_TRACE_ENTER(); /* every second */ tval = read_cntfrq(); write_cntp_tval(tval); pct = read_cntpct(); uart_print("cntpct:"); uart_print_hex64(pct); uart_print("\n\r"); uart_print("cntp_tval:"); uart_print_hex32(tval); uart_print("\n\r"); /* enable timer */ ctl = read_cntp_ctl(); ctl |= 0x1; write_cntp_ctl(ctl); HVMM_TRACE_EXIT(); }
static void write_cntp_ctl(uint32_t cntp_ctl) { LTRACEF_LEVEL(3, "cntp_ctl: 0x%x %x\n", cntp_ctl, read_cntp_ctl()); WRITE_TIMER_REG32(TIMER_REG_CTL, cntp_ctl); }