VMReg bias(int offset) {
assert(is_stack(), "must be");
// VMReg res = VMRegImpl::as_VMReg(value() + offset);
VMReg res = stack2reg(reg2stack() + offset);
assert(res->is_stack(), "must be");
return res;
}
void LIR_Assembler::roundfp_op(LIR_Opr src, LIR_Opr tmp, LIR_Opr dest, bool pop_fpu_stack) {
assert((src->is_single_fpu() && dest->is_single_stack()) ||
(src->is_double_fpu() && dest->is_double_stack()),
"round_fp: rounds register -> stack location");
reg2stack (src, dest, src->type(), pop_fpu_stack);
}
void LIR_Assembler::move_op(LIR_Opr src, LIR_Opr dest, LIR_Opr tmp1, LIR_Opr tmp2, LIR_Opr tmp3, BasicType type, LIR_PatchCode patch_code, CodeEmitInfo* info, bool unaligned) {
if (src->is_register()) {
if (dest->is_register()) {
assert(patch_code == lir_patch_none && info == NULL, "no patching and info allowed here");
assert(!tmp1->is_valid() && !tmp2->is_valid(), "unnecessary definition of temp operands");
reg2reg(src, dest);
} else if (dest->is_stack()) {
assert(patch_code == lir_patch_none && info == NULL, "no patching and info allowed here");
assert(!tmp1->is_valid() && !tmp2->is_valid(), "unnecessary definition of temp operands");
reg2stack(src,dest,type);
} else if (dest->is_address()) {
reg2mem(src,dest,tmp1,tmp2,tmp3,type,patch_code,info,unaligned);
} else {
ShouldNotReachHere();
}
} else if (src->is_stack()) {
assert(patch_code == lir_patch_none && info == NULL, "no patching and info allowed here");
if (dest->is_register()) {
assert(!tmp1->is_valid() && !tmp2->is_valid(), "unnecessary definition of temp operands");
stack2reg(src, dest, type);
} else if (dest->is_stack()) {
assert(!tmp2->is_valid(),"unnecessary definition of temp operands");
stack2stack(src, dest, tmp1, type);
} else {
ShouldNotReachHere();
}
} else if (src->is_constant()) {
if (dest->is_register()) {
assert(!tmp3->is_valid(),"unnecessary definition of temp operands");
const2reg(src, dest, patch_code, info, tmp1, tmp2); // patching is possible
} else if (dest->is_stack()) {
assert(patch_code == lir_patch_none && info == NULL, "no patching and info allowed here");
assert(!tmp3->is_valid(),"unnecessary definition of temp operands");
const2stack(src, dest, tmp1, tmp2);
} else if (dest->is_address()) {
assert(patch_code == lir_patch_none, "no patching allowed here");
const2mem(src, dest, tmp1, tmp2, tmp3, type, info);
} else {
ShouldNotReachHere();
}
} else if (src->is_address()) {
assert(!tmp2->is_valid(),"unnecessary definition of temp operand");
mem2reg(src, dest, tmp1, type, patch_code, info, unaligned);
} else {
ShouldNotReachHere();
}
}
void LIR_Assembler::move_op(LIR_Opr src, LIR_Opr dest, BasicType type, LIR_PatchCode patch_code, CodeEmitInfo* info, bool pop_fpu_stack, bool unaligned, bool wide) {
if (src->is_register()) {
if (dest->is_register()) {
assert(patch_code == lir_patch_none && info == NULL, "no patching and info allowed here");
reg2reg(src, dest);
} else if (dest->is_stack()) {
assert(patch_code == lir_patch_none && info == NULL, "no patching and info allowed here");
reg2stack(src, dest, type, pop_fpu_stack);
} else if (dest->is_address()) {
reg2mem(src, dest, type, patch_code, info, pop_fpu_stack, wide, unaligned);
} else {
ShouldNotReachHere();
}
} else if (src->is_stack()) {
assert(patch_code == lir_patch_none && info == NULL, "no patching and info allowed here");
if (dest->is_register()) {
stack2reg(src, dest, type);
} else if (dest->is_stack()) {
stack2stack(src, dest, type);
} else {
ShouldNotReachHere();
}
} else if (src->is_constant()) {
if (dest->is_register()) {
const2reg(src, dest, patch_code, info); // patching is possible
} else if (dest->is_stack()) {
assert(patch_code == lir_patch_none && info == NULL, "no patching and info allowed here");
const2stack(src, dest);
} else if (dest->is_address()) {
assert(patch_code == lir_patch_none, "no patching allowed here");
const2mem(src, dest, type, info, wide);
} else {
ShouldNotReachHere();
}
} else if (src->is_address()) {
mem2reg(src, dest, type, patch_code, info, wide, unaligned);
} else {
ShouldNotReachHere();
}
}
