void gptimer1_handler(int id) {
uint32_t irq = reg32r(GPTIMER1_BASE, GPT_TISR);
{
static int blink = 0;
if (blink & (1<<2)) {
LEDS_OFF(LED0);
LEDS_ON(LED1);
} else {
LEDS_ON(LED0);
LEDS_OFF(LED1);
}
blink++;
}
// check for overflow int
if (irq & OVF_IT_FLAG) {
Remove(&thistask->Node);
AddTail(&tasks, &thistask->Node);
thistask = (struct task *)tasks.Head;
irq_new_task(tcb_to_sp(&thistask->tcb));
}
// clear ints
reg32w(GPTIMER1_BASE, GPT_TISR, ~0);
}
static RETURN_CODE writeSerial(Driver_t *self, void *message) {
char *tmp = message;
while (*tmp){
while ((reg32r(UART3_BASE,LSR_REG) & 0x20) == 0);
reg32w(UART3_BASE,0,(*tmp++));
}
return SUCCESS;
}
void int_handler_function(void)
{
int irq = reg32r(GPTIMER1_BASE, GPT_TISR);
if (irq & OVF_IT_FLAG)
{
// console_put_char('#');
tick_handler_function();
// console_put_char('@');
}
reg32w(GPTIMER1_BASE, GPT_TISR, ~0);
}
// DSS IRQ handler (irq 25)
// Is also invoked for DSI interrupts
void dispc_handler(int id) {
uint32_t dssirq = reg32r(DSS_BASE, DSS_IRQSTATUS);
{
static int blink = 0;
if (blink & (1<<6)) {
LEDS_OFF(LED0);
LEDS_ON(LED1);
} else {
LEDS_ON(LED0);
LEDS_OFF(LED1);
}
blink++;
}
// see if we have any dispc interrupts
if (dssirq & DSS_DISPC_IRQ) {
uint32_t irqstatus = reg32r(DISPC_BASE, DISPC_IRQSTATUS);
if (1 && (irqstatus & DISPC_VSYNC)) {
// we do nothing special, just round-robin all tasks at every jiffy
Remove(&thistask->Node);
AddTail(&tasks, &thistask->Node);
thistask = (struct task *)tasks.Head;
irq_new_task(tcb_to_sp(&thistask->tcb));
}
// we handle no other interrrupts, so clear all interrupt status bits if any set
reg32w(DISPC_BASE, DISPC_IRQSTATUS, irqstatus);
}
// check for dsi ints (to clear them)
if (dssirq & DSS_DSI_IRQ) {
// not expecting this, just clear everything
reg32w(DSI_BASE, DSI_IRQSTATUS, ~0);
}
}