/* Fill GDB's register array with the floating-point register values
in *REGP. */
void
supply_fpregset (fpregset_t *regp)
{
int i;
for (i = 0; i < S390_NUM_REGS; i++)
if (regmap_fpregset[i] != -1)
regcache_raw_supply (current_regcache, i,
((char *)regp) + regmap_fpregset[i]);
}
static void
m68kbsd_supply_gregset (struct regcache *regcache, const void *gregs)
{
const char *regs = gregs;
int regnum;
for (regnum = M68K_D0_REGNUM; regnum <= M68K_PC_REGNUM; regnum++)
regcache_raw_supply (regcache, regnum, regs + regnum * 4);
}
void
mipsnbsd_supply_reg (struct regcache *regcache, const char *regs, int regno)
{
struct gdbarch *gdbarch = regcache->arch ();
int i;
for (i = 0; i <= gdbarch_pc_regnum (gdbarch); i++)
{
if (regno == i || regno == -1)
{
if (gdbarch_cannot_fetch_register (gdbarch, i))
regcache_raw_supply (regcache, i, NULL);
else
regcache_raw_supply (regcache, i,
regs + (i * mips_isa_regsize (gdbarch)));
}
}
}
/* Fill GDB's register array with the floating-point register values
in *REGP. */
void
supply_fpregset (struct regcache *regcache, const fpregset_t *regp)
{
int i;
for (i = 0; i < S390_NUM_REGS; i++)
if (regmap_fpregset[i] != -1)
regcache_raw_supply (regcache, i,
(const char *)regp + regmap_fpregset[i]);
}
static void
alpha_linux_supply_fpregset (const struct regset *regset,
struct regcache *regcache,
int regnum, const void *fpregs, size_t len)
{
const gdb_byte *regs = fpregs;
int i;
gdb_assert (len >= 32 * 8);
for (i = ALPHA_FP0_REGNUM; i < ALPHA_FP0_REGNUM + 31; i++)
{
if (regnum == i || regnum == -1)
regcache_raw_supply (regcache, i, regs + (i - ALPHA_FP0_REGNUM) * 8);
}
if (regnum == ALPHA_FPCR_REGNUM || regnum == -1)
regcache_raw_supply (regcache, ALPHA_FPCR_REGNUM, regs + 31 * 8);
}
static void
fetch_register (struct regcache *regcache, int regno)
{
struct gdbarch *gdbarch = get_regcache_arch (regcache);
int addr[MAX_REGISTER_SIZE];
int nr, isfloat;
/* Retrieved values may be -1, so infer errors from errno. */
errno = 0;
nr = regmap (gdbarch, regno, &isfloat);
/* Floating-point registers. */
if (isfloat)
rs6000_ptrace32 (PT_READ_FPR, ptid_get_pid (inferior_ptid), addr, nr, 0);
/* Bogus register number. */
else if (nr < 0)
{
if (regno >= gdbarch_num_regs (gdbarch))
fprintf_unfiltered (gdb_stderr,
"gdb error: register no %d not implemented.\n",
regno);
return;
}
/* Fixed-point registers. */
else
{
if (!ARCH64 ())
*addr = rs6000_ptrace32 (PT_READ_GPR, ptid_get_pid (inferior_ptid),
(int *) nr, 0, 0);
else
{
/* PT_READ_GPR requires the buffer parameter to point to long long,
even if the register is really only 32 bits. */
long long buf;
rs6000_ptrace64 (PT_READ_GPR, ptid_get_pid (inferior_ptid),
nr, 0, &buf);
if (register_size (gdbarch, regno) == 8)
memcpy (addr, &buf, 8);
else
*addr = buf;
}
}
if (!errno)
regcache_raw_supply (regcache, regno, (char *) addr);
else
{
#if 0
/* FIXME: this happens 3 times at the start of each 64-bit program. */
perror (_("ptrace read"));
#endif
errno = 0;
}
}
/* Fill GDB's register array with the general-purpose register values
in *REGP. */
void
supply_gregset (gregset_t *regp)
{
int i;
for (i = 0; i < S390_NUM_REGS; i++)
if (regmap_gregset[i] != -1)
regcache_raw_supply (current_regcache, i,
(char *)regp + regmap_gregset[i] + SUBOFF (i));
}
static void
sparc32obsd_supply_uthread (struct regcache *regcache,
int regnum, CORE_ADDR addr)
{
struct gdbarch *gdbarch = get_regcache_arch (regcache);
enum bfd_endian byte_order = gdbarch_byte_order (gdbarch);
CORE_ADDR fp, fp_addr = addr + SPARC32OBSD_UTHREAD_FP_OFFSET;
gdb_byte buf[4];
gdb_assert (regnum >= -1);
fp = read_memory_unsigned_integer (fp_addr, 4, byte_order);
if (regnum == SPARC_SP_REGNUM || regnum == -1)
{
store_unsigned_integer (buf, 4, byte_order, fp);
regcache_raw_supply (regcache, SPARC_SP_REGNUM, buf);
if (regnum == SPARC_SP_REGNUM)
return;
}
if (regnum == SPARC32_PC_REGNUM || regnum == SPARC32_NPC_REGNUM
|| regnum == -1)
{
CORE_ADDR i7, i7_addr = addr + SPARC32OBSD_UTHREAD_PC_OFFSET;
i7 = read_memory_unsigned_integer (i7_addr, 4, byte_order);
if (regnum == SPARC32_PC_REGNUM || regnum == -1)
{
store_unsigned_integer (buf, 4, byte_order, i7 + 8);
regcache_raw_supply (regcache, SPARC32_PC_REGNUM, buf);
}
if (regnum == SPARC32_NPC_REGNUM || regnum == -1)
{
store_unsigned_integer (buf, 4, byte_order, i7 + 12);
regcache_raw_supply (regcache, SPARC32_NPC_REGNUM, buf);
}
if (regnum == SPARC32_PC_REGNUM || regnum == SPARC32_NPC_REGNUM)
return;
}
sparc_supply_rwindow (regcache, fp, regnum);
}
static void
supply_32bit_reg (struct regcache *regcache, int regnum, const void *addr)
{
struct gdbarch *gdbarch = get_regcache_arch (regcache);
enum bfd_endian byte_order = gdbarch_byte_order (gdbarch);
gdb_byte buf[MAX_REGISTER_SIZE];
store_signed_integer (buf, register_size (gdbarch, regnum), byte_order,
extract_signed_integer (addr, 4, byte_order));
regcache_raw_supply (regcache, regnum, buf);
}
static void
fetch_core_registers (char *core_reg_sect, unsigned core_reg_size, int which,
CORE_ADDR ignore)
{
char *regs, *fpregs;
int regno;
/* Table to map a gdb register number to a trapframe register index. */
static const int regmap[] =
{
0, 1, 2, 3,
4, 5, 6, 7,
8, 9, 10, 11,
12, 13, 14, 15,
30, 31, 32, 16,
17, 18, 19, 20,
21, 22, 23, 24,
25, 29, 26
};
#define SIZEOF_TRAPFRAME (33 * 8)
/* We get everything from one section. */
if (which != 0)
return;
regs = core_reg_sect;
fpregs = core_reg_sect + SIZEOF_TRAPFRAME;
if (core_reg_size < (SIZEOF_TRAPFRAME + SIZEOF_STRUCT_FPREG))
{
warning (_("Wrong size register set in core file."));
return;
}
/* Integer registers. */
for (regno = 0; regno < ALPHA_ZERO_REGNUM; regno++)
regcache_raw_supply (current_regcache, regno, regs + (regmap[regno] * 8));
regcache_raw_supply (current_regcache, ALPHA_ZERO_REGNUM, NULL);
regcache_raw_supply (current_regcache, PC_REGNUM, regs + (28 * 8));
/* Floating point registers. */
alphabsd_supply_fpreg (fpregs, -1);
}
static void
amd64obsd_supply_uthread (struct regcache *regcache,
int regnum, CORE_ADDR addr)
{
struct gdbarch *gdbarch = get_regcache_arch (regcache);
enum bfd_endian byte_order = gdbarch_byte_order (gdbarch);
CORE_ADDR sp_addr = addr + AMD64OBSD_UTHREAD_RSP_OFFSET;
CORE_ADDR sp = 0;
gdb_byte buf[8];
int i;
gdb_assert (regnum >= -1);
if (regnum == -1 || regnum == AMD64_RSP_REGNUM)
{
int offset;
/* Fetch stack pointer from thread structure. */
sp = read_memory_unsigned_integer (sp_addr, 8, byte_order);
/* Adjust the stack pointer such that it looks as if we just
returned from _thread_machdep_switch. */
offset = amd64obsd_uthread_reg_offset[AMD64_RIP_REGNUM] + 8;
store_unsigned_integer (buf, 8, byte_order, sp + offset);
regcache_raw_supply (regcache, AMD64_RSP_REGNUM, buf);
}
for (i = 0; i < ARRAY_SIZE (amd64obsd_uthread_reg_offset); i++)
{
if (amd64obsd_uthread_reg_offset[i] != -1
&& (regnum == -1 || regnum == i))
{
/* Fetch stack pointer from thread structure (if we didn't
do so already). */
if (sp == 0)
sp = read_memory_unsigned_integer (sp_addr, 8, byte_order);
/* Read the saved register from the stack frame. */
read_memory (sp + amd64obsd_uthread_reg_offset[i], buf, 8);
regcache_raw_supply (regcache, i, buf);
}
}
}
static void
alphanbsd_supply_gregset (const struct regset *regset,
struct regcache *regcache,
int regnum, const void *gregs, size_t len)
{
const gdb_byte *regs = gregs;
int i;
gdb_assert (len >= ALPHANBSD_SIZEOF_GREGS);
for (i = 0; i < ALPHA_ZERO_REGNUM; i++)
{
if (regnum == i || regnum == -1)
regcache_raw_supply (regcache, i, regs + i * 8);
}
if (regnum == ALPHA_PC_REGNUM || regnum == -1)
regcache_raw_supply (regcache, ALPHA_PC_REGNUM, regs + 31 * 8);
}
static void
nios2_supply_gregset (const struct regset *regset,
struct regcache *regcache,
int regnum, const void *gregs_buf, size_t len)
{
const gdb_byte *gregs = gregs_buf;
int regno;
static const gdb_byte zero_buf[4] = {0, 0, 0, 0};
for (regno = NIOS2_Z_REGNUM; regno <= NIOS2_MPUACC_REGNUM; regno++)
if (regnum == -1 || regnum == regno)
{
if (reg_offsets[regno] != -1)
regcache_raw_supply (regcache, regno,
gregs + 4 * reg_offsets[regno]);
else
regcache_raw_supply (regcache, regno, zero_buf);
}
}
static void
ia64_linux_supply_fpregset (const struct regset *regset,
struct regcache *regcache,
int regnum, const void *regs, size_t len)
{
const gdb_byte f_zero[16] = { 0 };
const gdb_byte f_one[16] =
{ 0, 0, 0, 0, 0, 0, 0, 0x80, 0xff, 0xff, 0, 0, 0, 0, 0, 0 };
regcache_supply_regset (regset, regcache, regnum, regs, len);
/* Kernel generated cores have fr1==0 instead of 1.0. Older GDBs
did the same. So ignore whatever might be recorded in fpregset_t
for fr0/fr1 and always supply their expected values. */
if (regnum == -1 || regnum == IA64_FR0_REGNUM)
regcache_raw_supply (regcache, IA64_FR0_REGNUM, f_zero);
if (regnum == -1 || regnum == IA64_FR1_REGNUM)
regcache_raw_supply (regcache, IA64_FR1_REGNUM, f_one);
}
static void
m68kbsd_supply_fpregset (struct regcache *regcache, const void *fpregs)
{
const char *regs = fpregs;
int regnum;
for (regnum = M68K_FP0_REGNUM; regnum <= M68K_FPI_REGNUM; regnum++)
regcache_raw_supply (regcache, regnum,
regs + m68kbsd_fpreg_offset (regnum));
}
static void
sparc64obsd_supply_uthread (struct regcache *regcache,
int regnum, CORE_ADDR addr)
{
CORE_ADDR fp, fp_addr = addr + SPARC64OBSD_UTHREAD_FP_OFFSET;
gdb_byte buf[8];
gdb_assert (regnum >= -1);
fp = read_memory_unsigned_integer (fp_addr, 8);
if (regnum == SPARC_SP_REGNUM || regnum == -1)
{
store_unsigned_integer (buf, 8, fp);
regcache_raw_supply (regcache, SPARC_SP_REGNUM, buf);
if (regnum == SPARC_SP_REGNUM)
return;
}
if (regnum == SPARC64_PC_REGNUM || regnum == SPARC64_NPC_REGNUM
|| regnum == -1)
{
CORE_ADDR i7, i7_addr = addr + SPARC64OBSD_UTHREAD_PC_OFFSET;
i7 = read_memory_unsigned_integer (i7_addr, 8);
if (regnum == SPARC64_PC_REGNUM || regnum == -1)
{
store_unsigned_integer (buf, 8, i7 + 8);
regcache_raw_supply (regcache, SPARC64_PC_REGNUM, buf);
}
if (regnum == SPARC64_NPC_REGNUM || regnum == -1)
{
store_unsigned_integer (buf, 8, i7 + 12);
regcache_raw_supply (regcache, SPARC64_NPC_REGNUM, buf);
}
if (regnum == SPARC64_PC_REGNUM || regnum == SPARC64_NPC_REGNUM)
return;
}
sparc_supply_rwindow (regcache, fp, regnum);
}
static void
inf_ptrace_fetch_register (struct regcache *regcache, int regnum)
{
struct gdbarch *gdbarch = get_regcache_arch (regcache);
CORE_ADDR addr;
size_t size;
PTRACE_TYPE_RET *buf;
int pid, i;
/* This isn't really an address, but ptrace thinks of it as one. */
addr = inf_ptrace_register_u_offset (gdbarch, regnum, 0);
if (addr == (CORE_ADDR)-1
|| gdbarch_cannot_fetch_register (gdbarch, regnum))
{
regcache_raw_supply (regcache, regnum, NULL);
return;
}
/* Cater for systems like GNU/Linux, that implement threads as
separate processes. */
pid = ptid_get_lwp (inferior_ptid);
if (pid == 0)
pid = ptid_get_pid (inferior_ptid);
size = register_size (gdbarch, regnum);
gdb_assert ((size % sizeof (PTRACE_TYPE_RET)) == 0);
buf = alloca (size);
/* Read the register contents from the inferior a chunk at a time. */
for (i = 0; i < size / sizeof (PTRACE_TYPE_RET); i++)
{
errno = 0;
buf[i] = ptrace (PT_READ_U, pid, (PTRACE_TYPE_ARG3)(uintptr_t)addr, 0);
if (errno != 0)
error (_("Couldn't read register %s (#%d): %s."),
gdbarch_register_name (gdbarch, regnum),
regnum, safe_strerror (errno));
addr += sizeof (PTRACE_TYPE_RET);
}
regcache_raw_supply (regcache, regnum, buf);
}
static void
fetch_regs (struct regcache *regcache)
{
int ret, regno, tid;
elf_gregset_t regs;
/* Get the thread id for the ptrace call. */
tid = GET_THREAD_ID (inferior_ptid);
if (have_ptrace_getregset == TRIBOOL_TRUE)
{
struct iovec iov;
iov.iov_base = ®s;
iov.iov_len = sizeof (regs);
ret = ptrace (PTRACE_GETREGSET, tid, NT_PRSTATUS, &iov);
}
else
ret = ptrace (PTRACE_GETREGS, tid, 0, ®s);
if (ret < 0)
{
warning (_("Unable to fetch general registers."));
return;
}
for (regno = ARM_A1_REGNUM; regno < ARM_PC_REGNUM; regno++)
regcache_raw_supply (regcache, regno, (char *) ®s[regno]);
if (arm_apcs_32)
regcache_raw_supply (regcache, ARM_PS_REGNUM,
(char *) ®s[ARM_CPSR_GREGNUM]);
else
regcache_raw_supply (regcache, ARM_PS_REGNUM,
(char *) ®s[ARM_PC_REGNUM]);
regs[ARM_PC_REGNUM] = gdbarch_addr_bits_remove
(get_regcache_arch (regcache), regs[ARM_PC_REGNUM]);
regcache_raw_supply (regcache, ARM_PC_REGNUM,
(char *) ®s[ARM_PC_REGNUM]);
}
static void
fetch_register (int regno)
{
/* This isn't really an address. But ptrace thinks of it as one. */
CORE_ADDR regaddr;
char mess[128]; /* For messages */
int i;
unsigned int offset; /* Offset of registers within the u area. */
char buf[MAX_REGISTER_SIZE];
int tid;
if (CANNOT_FETCH_REGISTER (regno))
{
memset (buf, '\0', register_size (current_gdbarch, regno)); /* Supply zeroes */
regcache_raw_supply (current_regcache, regno, buf);
return;
}
/* Overload thread id onto process id */
tid = TIDGET (inferior_ptid);
if (tid == 0)
tid = PIDGET (inferior_ptid); /* no thread id, just use process id */
offset = U_REGS_OFFSET;
regaddr = register_addr (regno, offset);
for (i = 0; i < register_size (current_gdbarch, regno);
i += sizeof (PTRACE_XFER_TYPE))
{
errno = 0;
*(PTRACE_XFER_TYPE *) &buf[i] = ptrace (PT_READ_U, tid,
(PTRACE_ARG3_TYPE) regaddr, 0);
regaddr += sizeof (PTRACE_XFER_TYPE);
if (errno != 0)
{
sprintf (mess, "reading register %s (#%d)",
REGISTER_NAME (regno), regno);
perror_with_name (mess);
}
}
regcache_raw_supply (current_regcache, regno, buf);
}
/* Fill GDB's register array with the general-purpose register values
in *REGP. */
void
supply_gregset (struct regcache *regcache, const gregset_t *regp)
{
struct gdbarch *gdbarch = get_regcache_arch (regcache);
int i;
for (i = 0; i < S390_NUM_REGS; i++)
if (regmap_gregset[i] != -1)
regcache_raw_supply (regcache, i,
(const char *)regp + regmap_gregset[i]
+ SUBOFF (gdbarch, i));
}
void
supply_gregset (struct regcache* regcache,
const elf_gregset_t *gregsetp)
{
elf_greg_t *regp = (elf_greg_t *) gregsetp;
int i;
for (i = 0; i < sizeof (regmap) / sizeof (regmap[0]); i++)
if (regmap[i] >= 0)
regcache_raw_supply (regcache, i, regp + regmap[i]);
}
static void
hppa_hpux_fetch_register (int regnum)
{
CORE_ADDR addr;
size_t size;
PTRACE_TYPE_RET *buf;
pid_t pid;
int i;
pid = ptid_get_pid (inferior_ptid);
/* This isn't really an address, but ptrace thinks of it as one. */
addr = hppa_hpux_save_state_offset(current_regcache, regnum);
size = register_size (current_gdbarch, regnum);
gdb_assert (size == 4 || size == 8);
buf = alloca (size);
#ifdef HAVE_TTRACE
{
lwpid_t lwp = ptid_get_lwp (inferior_ptid);
if (ttrace (TT_LWP_RUREGS, pid, lwp, addr, size, (uintptr_t)buf) == -1)
error (_("Couldn't read register %s (#%d): %s"),
REGISTER_NAME (regnum), regnum, safe_strerror (errno));
}
#else
{
int i;
/* Read the register contents from the inferior a chuck at the time. */
for (i = 0; i < size / sizeof (PTRACE_TYPE_RET); i++)
{
errno = 0;
buf[i] = ptrace (PT_RUREGS, pid, (PTRACE_TYPE_ARG3) addr, 0, 0);
if (errno != 0)
error (_("Couldn't read register %s (#%d): %s"),
REGISTER_NAME (regnum), regnum, safe_strerror (errno));
addr += sizeof (PTRACE_TYPE_RET);
}
}
#endif
/* Take care with the "flags" register. It's stored as an `int' in
`struct save_state', even for 64-bit code. */
if (regnum == HPPA_FLAGS_REGNUM && size == 8)
{
ULONGEST flags = extract_unsigned_integer ((gdb_byte *)buf, 4);
store_unsigned_integer ((gdb_byte *)buf, 8, flags);
}
regcache_raw_supply (current_regcache, regnum, buf);
}
static void
m68kbsd_supply_fpregset (struct regcache *regcache, const void *fpregs)
{
struct gdbarch *gdbarch = get_regcache_arch (regcache);
const char *regs = (const char *)fpregs;
int regnum;
for (regnum = M68K_FP0_REGNUM; regnum <= M68K_FPI_REGNUM; regnum++)
regcache_raw_supply (regcache, regnum,
regs + m68kbsd_fpreg_offset (gdbarch, regnum));
}
static void
frv_linux_supply_gregset (const struct regset *regset,
struct regcache *regcache,
int regnum, const void *gregs, size_t len)
{
int regi;
char zerobuf[MAX_REGISTER_SIZE];
memset (zerobuf, 0, MAX_REGISTER_SIZE);
/* gr0 always contains 0. Also, the kernel passes the TBR value in
this slot. */
regcache_raw_supply (regcache, first_gpr_regnum, zerobuf);
/* Fill gr32, ..., gr63 with zeros. */
for (regi = first_gpr_regnum + 32; regi <= last_gpr_regnum; regi++)
regcache_raw_supply (regcache, regi, zerobuf);
regcache_supply_regset (regset, regcache, regnum, gregs, len);
}
void
sparc_fetch_inferior_registers (struct target_ops *ops,
struct regcache *regcache, int regnum)
{
struct gdbarch *gdbarch = get_regcache_arch (regcache);
int pid;
/* NOTE: cagney/2002-12-03: This code assumes that the currently
selected light weight processes' registers can be written
directly into the selected thread's register cache. This works
fine when given an 1:1 LWP:thread model (such as found on
GNU/Linux) but will, likely, have problems when used on an N:1
(userland threads) or N:M (userland multiple LWP) model. In the
case of the latter two, the LWP's registers do not necessarily
belong to the selected thread (the LWP could be in the middle of
executing the thread switch code).
These functions should instead be paramaterized with an explicit
object (struct regcache, struct thread_info?) into which the LWPs
registers can be written. */
pid = TIDGET (inferior_ptid);
if (pid == 0)
pid = PIDGET (inferior_ptid);
if (regnum == SPARC_G0_REGNUM)
{
gdb_byte zero[8] = { 0 };
regcache_raw_supply (regcache, SPARC_G0_REGNUM, &zero);
return;
}
if (regnum == -1 || sparc_gregset_supplies_p (gdbarch, regnum))
{
gregset_t regs;
if (ptrace (PTRACE_GETREGS, pid, (PTRACE_TYPE_ARG3) ®s, 0) == -1)
perror_with_name (_("Couldn't get registers"));
sparc_supply_gregset (sparc_gregset, regcache, -1, ®s);
if (regnum != -1)
return;
}
if (regnum == -1 || sparc_fpregset_supplies_p (gdbarch, regnum))
{
fpregset_t fpregs;
if (ptrace (PTRACE_GETFPREGS, pid, (PTRACE_TYPE_ARG3) &fpregs, 0) == -1)
perror_with_name (_("Couldn't get floating point status"));
sparc_supply_fpregset (regcache, -1, &fpregs);
}
}
static void
mips_fbsd_supply_reg (struct regcache *regcache, int regnum, const void *addr,
size_t len)
{
struct gdbarch *gdbarch = get_regcache_arch (regcache);
if (register_size (gdbarch, regnum) == len)
regcache_raw_supply (regcache, regnum, addr);
else
{
enum bfd_endian byte_order = gdbarch_byte_order (gdbarch);
gdb_byte buf[MAX_REGISTER_SIZE];
LONGEST val;
val = extract_signed_integer ((const gdb_byte *) addr, len, byte_order);
store_signed_integer (buf, register_size (gdbarch, regnum), byte_order,
val);
regcache_raw_supply (regcache, regnum, buf);
}
}
static int
i386obsd_supply_pcb (struct regcache *regcache, struct pcb *pcb)
{
struct gdbarch *gdbarch = get_regcache_arch (regcache);
enum bfd_endian byte_order = gdbarch_byte_order (gdbarch);
struct switchframe sf;
/* The following is true for OpenBSD 3.6:
The pcb contains %esp and %ebp at the point of the context switch
in cpu_switch(). At that point we have a stack frame as
described by `struct switchframe', which for OpenBSD 3.6 has the
following layout:
interrupt level
%edi
%esi
%ebx
%eip
we reconstruct the register state as it would look when we just
returned from cpu_switch(). */
/* The stack pointer shouldn't be zero. */
if (pcb->pcb_esp == 0)
return 0;
/* Read the stack frame, and check its validity. We do this by
checking if the saved interrupt priority level in the stack frame
looks reasonable.. */
#ifdef PCB_SAVECTX
if ((pcb->pcb_flags & PCB_SAVECTX) == 0)
{
/* Yes, we have a frame that matches cpu_switch(). */
read_memory (pcb->pcb_esp, (gdb_byte *) &sf, sizeof sf);
pcb->pcb_esp += sizeof (struct switchframe);
regcache_raw_supply (regcache, I386_EDI_REGNUM, &sf.sf_edi);
regcache_raw_supply (regcache, I386_ESI_REGNUM, &sf.sf_esi);
regcache_raw_supply (regcache, I386_EBX_REGNUM, &sf.sf_ebx);
regcache_raw_supply (regcache, I386_EIP_REGNUM, &sf.sf_eip);
}
else
#endif
{
/* No, the pcb must have been last updated by savectx(). */
pcb->pcb_esp = pcb->pcb_ebp;
pcb->pcb_ebp = read_memory_integer(pcb->pcb_esp, 4, byte_order);
sf.sf_eip = read_memory_integer(pcb->pcb_esp + 4, 4, byte_order);
regcache_raw_supply (regcache, I386_EIP_REGNUM, &sf.sf_eip);
}
regcache_raw_supply (regcache, I386_EBP_REGNUM, &pcb->pcb_ebp);
regcache_raw_supply (regcache, I386_ESP_REGNUM, &pcb->pcb_esp);
return 1;
}
void
supply_gregset (gdb_gregset_t *gregsetp)
{
int i;
greg_t *regp = (elf_greg_t *) gregsetp;
for (i = 0; i < sizeof (greg_map) / sizeof (greg_map[0]); i++, regp++)
{
int regno = greg_map[i];
regcache_raw_supply (current_regcache, regno, regp);
}
}
void
supply_fpregset (fpregset_t *fpregsetp)
{
int regi;
char zerobuf[MAX_REGISTER_SIZE];
memset (zerobuf, 0, MAX_REGISTER_SIZE);
for (regi = 0; regi < 32; regi++)
regcache_raw_supply (current_regcache,
mips_regnum (current_gdbarch)->fp0 + regi,
(char *) &fpregsetp->fp_r.fp_regs[regi]);
regcache_raw_supply (current_regcache,
mips_regnum (current_gdbarch)->fp_control_status,
(char *) &fpregsetp->fp_csr);
/* FIXME: how can we supply FCRIR? The ABI doesn't tell us. */
regcache_raw_supply (current_regcache,
mips_regnum (current_gdbarch)->fp_implementation_revision,
zerobuf);
}
static void
supply_register_at_address (struct regcache *regcache, int regnum,
CORE_ADDR register_addr)
{
struct gdbarch *gdbarch = get_regcache_arch (regcache);
int buf_size = register_size (gdbarch, regnum);
gdb_byte *buf;
buf = alloca (buf_size);
read_memory (register_addr, buf, buf_size);
regcache_raw_supply (regcache, regnum, buf);
}