int mxt_load_firmware(struct device *dev, const char *fn) { struct mxt_data *mxt = dev_get_drvdata(dev); unsigned int frame_size; unsigned int pos = 0; unsigned int retry; int ret; #if READ_FW_FROM_HEADER struct firmware *fw = NULL; fw = kzalloc(sizeof(struct firmware), GFP_KERNEL); fw->data = firmware_latest; fw->size = sizeof(firmware_latest); #else const struct firmware *fw = NULL; ret = request_firmware(&fw, fn, dev); if (ret < 0) { dev_err(&client->dev, "[TSP] Unable to open firmware %s\n", fn); return -ENOMEM; } #endif /* set resets into bootloader mode */ reset_chip(mxt, RESET_TO_BOOTLOADER); msleep(250); /* mdelay(100); */ /* change to slave address of bootloader */ if (mxt->client->addr == MXT_I2C_APP_ADDR) { pr_info("[TSP] I2C address: 0x%02X --> 0x%02X", MXT_I2C_APP_ADDR, MXT_I2C_BOOTLOADER_ADDR); mxt->client->addr = MXT_I2C_BOOTLOADER_ADDR; } ret = check_bootloader(mxt->client, WAITING_BOOTLOAD_COMMAND); if (ret < 0) { pr_err("[TSP] ... Waiting bootloader command: Failed"); goto err_fw; } /* unlock bootloader */ unlock_bootloader(mxt->client); msleep(200); /* mdelay(100); */ /* reading the information of the firmware */ pr_info("[TSP] Firmware info: version [0x%02X], build [0x%02X]", fw->data[0], fw->data[1]); pr_info("Updating progress: "); pos += 2; while (pos < fw->size) { retry = 0; ret = check_bootloader(mxt->client, WAITING_FRAME_DATA); if (ret < 0) { pr_err("... Waiting frame data: Failed"); goto err_fw; } frame_size = ((*(fw->data + pos) << 8) | *(fw->data + pos + 1)); /* We should add 2 at frame size as the the firmware data is not * included the CRC bytes. */ frame_size += 2; /* write one frame to device */ try_to_resend_the_last_frame: i2c_master_send(mxt->client, (u8 *)(fw->data + pos), frame_size); ret = check_bootloader(mxt->client, FRAME_CRC_PASS); if (ret < 0) { if (++retry < 10) { check_bootloader(mxt->client, WAITING_FRAME_DATA); /* recommendation from ATMEL */ pr_info("[TSP] We've got a FRAME_CRC_FAIL, so try again up to 10 times (count=%d)", retry); goto try_to_resend_the_last_frame; } pr_err("... CRC on the frame failed after 10 trials!"); goto err_fw; } pos += frame_size; pr_info("#"); pr_info("%zd / %zd (bytes) updated...", pos, fw->size); } pr_info("\n[TSP] Updating firmware completed!\n"); pr_info("[TSP] note: You may need to reset this target.\n"); err_fw: /* change to slave address of application */ if (mxt->client->addr == MXT_I2C_BOOTLOADER_ADDR) { pr_info("[TSP] I2C address: 0x%02X --> 0x%02X", MXT_I2C_BOOTLOADER_ADDR, MXT_I2C_APP_ADDR); mxt->client->addr = MXT_I2C_APP_ADDR; } #if READ_FW_FROM_HEADER kfree(fw); #endif return ret; }
static void init_chip(struct i2c_client *client,char *fw_file) { reset_chip(client); gsl_load_fw(client,fw_file); startup_chip(client); reset_chip(client); gslX680_shutdown_low(client); usleep(50000); gslX680_shutdown_high(client); usleep(30000); gslX680_shutdown_low(client); usleep(5000); gslX680_shutdown_high(client); usleep(20000); reset_chip(client); startup_chip(client); }
void reset_bus(struct bus *p_bus) { int i; for (i = 0; i < CHIPS_PER_BUS; i++) { reset_chip(&p_bus->chips[i]); } }
static int misc_cover_ioctl(struct inode *inode_p, struct file *fp, unsigned int cmd, unsigned long arg) { int ret = 0; DBGPRINTK(KERN_ERR "misc_cover_ioctl+\n"); if (_IOC_TYPE(cmd) != COVER_IOC_MAGIC) { DBGPRINTK(KERN_ERR "misc_cover_ioctl::Not COVER_IOC_MAGIC\n"); return -ENOTTY; } if (_IOC_DIR(cmd) & _IOC_READ) { ret = !access_ok(VERIFY_WRITE, (void __user*)arg, _IOC_SIZE(cmd)); if (ret) { DBGPRINTK(KERN_ERR "misc_cover_ioctl::access_ok check err\n"); return -EFAULT; } } if (_IOC_DIR(cmd) & _IOC_WRITE) { ret = !access_ok(VERIFY_READ, (void __user*)arg, _IOC_SIZE(cmd)); if (ret) { DBGPRINTK(KERN_ERR "misc_cover_ioctl::access_ok check err\n"); return -EFAULT; } } switch (cmd) { case COVER_IOC_DISABLE_DET: disable_irq(MSM_GPIO_TO_INT(cover_det_int_gpio)); break; case COVER_IOC_ENABLE_DET: enable_irq(MSM_GPIO_TO_INT(cover_det_int_gpio)); break; case COVER_IOC_TEST_RUN_CPO_SYNC_AND_RESETCHIP: #if defined(CONFIG_HW_AUSTIN) final_sync_files(); #endif reset_chip(); break; default: DBGPRINTK(KERN_ERR "back cover: unknown ioctl received! cmd=%d\n", cmd); break; } DBGPRINTK(KERN_ERR "misc_cover_ioctl-\n"); return ret; }
int options_proc(int msg, DIALOG *d, int c) { static int chip_was_reset = FALSE; int old_port; int ret; switch (msg) { case MSG_GOTMOUSE: // if we got mouse, display description sprintf(button_description, "Select system of measurements (US or Metric), and select serial port."); break; case MSG_IDLE: if (comport.number == -1 && comport.status != USER_IGNORED) display_options(); if (comport.status == NOT_OPEN) { if (alert("COM Port could not be opened.", "Please check that port settings are correct", "and that no other application is using it", "&Configure Port", "&Ignore", 'c', 'i') == 1) display_options(); else comport.status = USER_IGNORED; } else if ((comport.status == READY) && (chip_was_reset == FALSE)) // if the port is ready, { reset_chip(); chip_was_reset = TRUE; } break; } ret = nostretch_icon_proc(msg, d, c); // call the parent object if (ret == D_CLOSE) // trap the close value { old_port = comport.number; display_options(); // display options dialog if (comport.number != old_port) chip_was_reset = FALSE; return D_REDRAWME; } return ret; // return }
int mxt_config_settings(struct mxt_data *mxt) { int retryCount = 0; printk(KERN_DEBUG "[TSP] %s\n", __func__); retry_1: if (mxt_power_config(mxt) < 0) { printk(KERN_DEBUG "[TSP] mxt_power_config FAILED\n"); retryCount++; if(retryCount > 3 ) { printk(KERN_DEBUG "[TSP] mxt_power_config ALL RETRY FAILED\n"); return -1; } else goto retry_1; } retryCount = 0; retry_2: if (mxt_acquisition_config(mxt) < 0) { printk(KERN_DEBUG "[TSP] mxt_acquisition_config FAILED\n"); retryCount++; if(retryCount > 3 ) { printk(KERN_DEBUG "[TSP] mxt_acquisition_config ALL RETRY FAILED\n"); return -1; } else goto retry_2; } retryCount = 0; retry_3: if (mxt_multitouch_config(mxt) < 0) { printk(KERN_DEBUG "[TSP] mxt_multitouch_config FAILED\n"); retryCount++; if(retryCount > 3 ) { printk(KERN_DEBUG "[TSP] mxt_multitouch_config ALL RETRY FAILED\n"); return -1; } else goto retry_3; } retryCount = 0; retry_4: if (mxt_noise_suppression_config(mxt) < 0) { printk(KERN_DEBUG "[TSP] mxt_noise_suppression_config FAILED\n"); retryCount++; if(retryCount > 3 ) { printk(KERN_DEBUG "[TSP] mxt_noise_suppression_config ALL RETRY FAILED\n"); return -1; } else goto retry_4; } retryCount = 0; retry_5: if (mxt_cte_config(mxt) < 0) { printk(KERN_DEBUG "[TSP] mxt_cte_config FAILED\n"); retryCount++; if(retryCount > 3 ) { printk(KERN_DEBUG "[TSP] mxt_cte_config ALL RETRY FAILED\n"); return -1; } else goto retry_5; } retryCount = 0; retry_6: if (mxt_gripsuppression_config(mxt) < 0) { printk(KERN_DEBUG "[TSP] mxt_gripsuppression_config FAILED\n"); retryCount++; if(retryCount > 3 ) { printk(KERN_DEBUG "[TSP] mxt_gripsuppression_config ALL RETRY FAILED\n"); return -1; } else goto retry_6; } retryCount = 0; retry_7: if (mxt_palmsuppression_config(mxt) < 0) { printk(KERN_DEBUG "[TSP] mxt_palmsuppression_config FAILED\n"); retryCount++; if(retryCount > 3 ) { printk(KERN_DEBUG "[TSP] mxt_palmsuppression_config ALL RETRY FAILED\n"); return -1; } else goto retry_7; } retryCount = 0; retry_8: if (mxt_other_configs(mxt) < 0) { printk(KERN_DEBUG "[TSP] mxt_other_configs FAILED\n"); retryCount++; if(retryCount > 3 ) { printk(KERN_DEBUG "[TSP] mxt_other_configs ALL RETRY FAILED\n"); return -1; } else goto retry_8; } /* backup to nv memory */ // backup_to_nv(mxt); //////// retryCount = 0; retry_9: if (backup_to_nv(mxt) < 0) { printk(KERN_DEBUG "[TSP] backup_to_nv FAILED\n"); retryCount++; if(retryCount > 3 ) { printk(KERN_DEBUG "[TSP] backup_to_nv ALL RETRY FAILED\n"); return -1; } else goto retry_9; } //////////// /* forces a reset of the chipset */ reset_chip(mxt, RESET_TO_NORMAL); msleep(250); /*mxt1386 need 250ms*/ return 0; }
/* This is the real probe routine. */ static int cs89x0_probe1(struct device *dev, int ioaddr) { struct net_local *lp; static unsigned version_printed = 0; int i; unsigned rev_type = 0; irq2dev_map[0] = dev; #ifdef CONFIG_MWI /* chip select at 0x800000, 8kb */ *(volatile unsigned short *)0xfffa5c = 0x8001; *(volatile unsigned short *)0xfffa5e = 0x7970; #endif #ifdef CONFIG_UCSIMM /* set up the chip select */ *(volatile unsigned char *)0xfffff42b |= 0x01; /* output /sleep */ *(volatile unsigned short *)0xfffff428 |= 0x0101; /* not sleeping */ *(volatile unsigned char *)0xfffff42b &= ~0x02; /* input irq5 */ *(volatile unsigned short *)0xfffff428 &= ~0x0202; /* irq5 fcn on */ *(volatile unsigned short *)0xfffff102 = 0x8000; /* 0x04000000 */ *(volatile unsigned short *)0xfffff112 = 0x01e1; /* 128k, 2ws, FLASH, en */ #endif #ifdef CONFIG_ARCH_ATMEL /* Fixme -- set up the chip, irq, etc... */ #endif #ifdef CONFIG_ALMA_ANS /* * Make sure the chip select (CSA1) is enabled * Note, that we don't have to program the base address, since * it is programmed once for both CSA0 and CSA1 in *-head.S */ PFSEL &= ~PF_CSA1; PFDIR |= PF_CSA1; /* Make sure that interrupt line (irq3) is enabled too */ PDSEL &= ~PD_IRQ3; PDDIR &= ~PD_IRQ3; PDKBEN |= PD_IRQ3; #endif /* Initialize the device structure. */ if (dev->priv == NULL) { dev->priv = kmalloc(sizeof(struct net_local), GFP_KERNEL); memset(dev->priv, 0, sizeof(struct net_local)); } dev->base_addr = ioaddr; lp = (struct net_local *)dev->priv; if (readreg(dev, PP_ChipID) != CHIP_EISA_ID_SIG) { printk("cs89x0.c: No CrystalLan device found.\n"); return ENODEV; } /* get the chip type */ rev_type = readreg(dev, PRODUCT_ID_ADD); lp->chip_type = rev_type &~ REVISON_BITS; lp->chip_revision = ((rev_type & REVISON_BITS) >> 8) + 'A'; /* Check the chip type and revision in order to set the correct send command CS8920 revision C and CS8900 revision F can use the faster send. */ lp->send_cmd = TX_AFTER_ALL; #if 0 if (lp->chip_type == CS8900 && lp->chip_revision >= 'F') lp->send_cmd = TX_NOW; if (lp->chip_type != CS8900 && lp->chip_revision >= 'C') lp->send_cmd = TX_NOW; #endif if (net_debug && version_printed++ == 0) printk(version); printk("%s: cs89%c0%s rev %c found at 0x%.8x %s", dev->name, lp->chip_type==CS8900?'0':'2', lp->chip_type==CS8920M?"M":"", lp->chip_revision, dev->base_addr, readreg(dev, PP_SelfST) & ACTIVE_33V ? "3.3Volts " : "5Volts "); reset_chip(dev); /* Fill this in, we don't have an EEPROM */ lp->adapter_cnf = A_CNF_10B_T | A_CNF_MEDIA_10B_T; lp->auto_neg_cnf = EE_AUTO_NEG_ENABLE; printk(" media %s%s%s", (lp->adapter_cnf & A_CNF_10B_T)?"RJ-45,":"", (lp->adapter_cnf & A_CNF_AUI)?"AUI,":"", (lp->adapter_cnf & A_CNF_10B_2)?"BNC,":""); lp->irq_map = 0xffff; #ifdef CONFIG_MWI dev->dev_addr[0] = 0x00; dev->dev_addr[1] = 0x30; dev->dev_addr[2] = 0x0f; dev->dev_addr[3] = 0x00; dev->dev_addr[4] = 0x01; dev->dev_addr[5] = 0x0b; #endif #ifdef CONFIG_ALMA_ANS /* Bad hack, has to be fixed, since we have the SEEPROM on board */ dev->dev_addr[0] = 0x00; dev->dev_addr[1] = 0x00; dev->dev_addr[2] = 0xc0; dev->dev_addr[3] = 0xff; dev->dev_addr[4] = 0xee; dev->dev_addr[5] = 0x01; #endif #ifdef CONFIG_UCSIMM { extern unsigned char *cs8900a_hwaddr; memcpy(dev->dev_addr, cs8900a_hwaddr, 6); } #endif #ifdef CONFIG_ARCH_ATMEL { memcpy(dev->dev_addr, (unsigned long)CS8900_BASE, 6); } #endif /* print the ethernet address. */ printk("mac = %.2x", dev->dev_addr[0]); for (i = 1; i < ETH_ALEN; i++) printk(":%.2x", dev->dev_addr[i]); #ifdef FIXME /* Grab the region so we can find another board if autoIRQ fails. */ request_region(ioaddr, NETCARD_IO_EXTENT,"cs89x0"); #endif dev->open = net_open; dev->stop = net_close; dev->hard_start_xmit = net_send_packet; dev->get_stats = net_get_stats; dev->set_multicast_list = &set_multicast_list; dev->set_mac_address = &set_mac_address; /* Fill in the fields of the device structure with ethernet values. */ ether_setup(dev); printk("\n"); return 0; }
static int __init cs89x0_probe1(struct net_device *dev, int ioaddr) { struct net_local *lp; static unsigned version_printed = 0; int i; unsigned rev_type = 0; /* irq2dev_map[0] = dev; */ #ifdef CONFIG_UCSIMM /* set up the chip select */ *(volatile unsigned char *)0xfffff42b |= 0x01; /* output /sleep */ *(volatile unsigned short *)0xfffff428 |= 0x0101; /* not sleeping */ *(volatile unsigned char *)0xfffff42b &= ~0x02; /* input irq5 */ *(volatile unsigned short *)0xfffff428 &= ~0x0202; /* irq5 fcn on */ *(volatile unsigned short *)0xfffff102 = 0x8000; /* 0x04000000 */ *(volatile unsigned short *)0xfffff112 = 0x01e1; /* 128k, 2ws, FLASH, en */ #endif #ifdef CONFIG_ARCH_ATMEL *(volatile unsigned int *) AIC_IDCR = AIC_IRQ1; /* disable interrupt IRQ1 */ #ifdef CONFIG_EB40LS *(volatile unsigned int *) PIO_DISABLE_REGISTER = (1 << 10); /* disable PIO for IRQ1 */ #endif *(volatile unsigned int *) AIC_ICCR = AIC_IRQ1; /* clear interrupt IRQ1 */ *(volatile unsigned int *) AIC_IECR = AIC_IRQ1; /* enable interrupt IRQ1 */ #endif #ifdef CONFIG_ALMA_ANS /* * Make sure the chip select (CSA1) is enabled * Note, that we don't have to program the base address, since * it is programmed once for both CSA0 and CSA1 in *-head.S */ PFSEL &= ~PF_CSA1; PFDIR |= PF_CSA1; /* Make sure that interrupt line (irq3) is enabled too */ PDSEL &= ~PD_IRQ3; PDDIR &= ~PD_IRQ3; PDKBEN |= PD_IRQ3; #endif /* Initialize the device structure. */ if (dev->priv == NULL) { dev->priv = kmalloc(sizeof(struct net_local), GFP_KERNEL); memset(dev->priv, 0, sizeof(struct net_local)); } dev->base_addr = ioaddr; lp = (struct net_local *)dev->priv; if (readreg(dev, PP_ChipID) != CHIP_EISA_ID_SIG) { printk("cs89x0.c: No CrystalLan device found.\n"); return ENODEV; } /* get the chip type */ rev_type = readreg(dev, PRODUCT_ID_ADD); lp->chip_type = rev_type &~ REVISON_BITS; lp->chip_revision = ((rev_type & REVISON_BITS) >> 8) + 'A'; /* Check the chip type and revision in order to set the correct send command CS8920 revision C and CS8900 revision F can use the faster send. */ lp->send_cmd = TX_AFTER_ALL; #if 0 if (lp->chip_type == CS8900 && lp->chip_revision >= 'F') lp->send_cmd = TX_NOW; if (lp->chip_type != CS8900 && lp->chip_revision >= 'C') lp->send_cmd = TX_NOW; #endif if (net_debug && version_printed++ == 0) printk(version); printk("%s: cs89%c0%s rev %c found at 0x%.8lx %s", dev->name, lp->chip_type==CS8900?'0':'2', lp->chip_type==CS8920M?"M":"", lp->chip_revision, dev->base_addr, readreg(dev, PP_SelfST) & ACTIVE_33V ? "3.3Volts" : "5Volts"); reset_chip(dev); /* Fill this in, we don't have an EEPROM */ lp->adapter_cnf = A_CNF_10B_T | A_CNF_MEDIA_10B_T; lp->auto_neg_cnf = EE_AUTO_NEG_ENABLE | IMM_BIT; printk(" media %s%s%s", (lp->adapter_cnf & A_CNF_10B_T)?"RJ-45,":"", (lp->adapter_cnf & A_CNF_AUI)?"AUI,":"", (lp->adapter_cnf & A_CNF_10B_2)?"BNC,":""); lp->irq_map = 0xffff; /* dev->dev_addr[0] through dev->dev_addr[6] holds the mac address * of this ethernet device. This can be set to anything we want it * to be. But care should be taken to make this number unique... */ #if defined(CONFIG_UCSIMM) || defined(CONFIG_EB40LS) || \ defined(CONFIG_BLIP) || defined(CONFIG_UCLINKII) { extern unsigned char *cs8900a_hwaddr; memcpy(dev->dev_addr, cs8900a_hwaddr, 6); } #elif defined (CONFIG_BOARD_UCLINKII) || \ defined (CONFIG_BOARD_EVS3C4530LII) || \ defined (CONFIG_BOARD_EVS3C4530HEI) memcpy(dev->dev_addr, get_MAC_address("dev1"), 6); #else #error MAC address is not defined #endif /* print the ethernet address. */ for (i = 0; i < ETH_ALEN; i++) printk(" %2.2x", dev->dev_addr[i]); #ifdef FIXME /* Grab the region so we can find another board if autoIRQ fails. */ request_region(ioaddr, NETCARD_IO_EXTENT,"cs89x0"); #endif dev->open = net_open; dev->stop = net_close; dev->hard_start_xmit = net_send_packet; dev->get_stats = net_get_stats; dev->set_multicast_list = &set_multicast_list; dev->set_mac_address = &set_mac_address; /* Fill in the fields of the device structure with ethernet values. */ ether_setup(dev); printk("\n"); return 0; }
static int __init cs89x0_probe1(struct net_device *dev, int ioaddr) { struct net_local *lp; static unsigned version_printed = 0; int i; unsigned rev_type = 0; /* irq2dev_map[0] = dev; */ #if defined(CONFIG_UCSIMM) /* set up PF1 as sleep control */ PFSEL |= 0x01; /* IO, not LCONTRAST */ PFDIR |= 0x01; /* output */ PFDATA |= 0x01; /* not sleeping */ #elif defined(CONFIG_UCDIMM) /* set up PG3 (~HiZ/P/~D) as sleep control */ PGSEL |= 0x08; /* IO */ PGDIR |= 0x08; /* output */ PGDATA |= 0x08; /* not sleeping */ #endif #if defined(CONFIG_UCSIMM) || defined(CONFIG_UCDIMM) *(volatile unsigned char *)PFSEL_ADDR &= ~0x02; /* input irq5 */ *(volatile unsigned short *)PFDIR_ADDR &= ~0x0202; /* irq5 fcn on */ *(volatile unsigned short *)CSGBB_ADDR = 0x8000; /* 0x10000000 */ *(volatile unsigned short *)CSB_ADDR = 0x01e1; /* 128k, 2ws, FLASH, en */ #endif #ifdef CONFIG_ARCH_ATMEL *(volatile unsigned int *) AIC_IDCR = AIC_IRQ1; /* disable interrupt IRQ1 */ #ifdef CONFIG_EB40LS *(volatile unsigned int *) PIO_DISABLE_REGISTER = (1 << 10); /* disable PIO for IRQ1 */ #endif *(volatile unsigned int *) AIC_ICCR = AIC_IRQ1; /* clear interrupt IRQ1 */ *(volatile unsigned int *) AIC_IECR = AIC_IRQ1; /* enable interrupt IRQ1 */ #endif #ifdef CONFIG_ARCH_DM270 printk("uCcs89x0: Setting up TI TMS320DM270 CS8900A IRQ ioaddr = 0x%X\n",ioaddr); /* Set GIO port to input */ outw(inw(DM270_GIO_DIR(DM270_INTERRUPT_EXT4)) | (1<<DM270_GIO_DIR_SHIFT(DM270_INTERRUPT_EXT4)), DM270_GIO_DIR(DM270_INTERRUPT_EXT4)); /* Set GIO as interrupt port */ outw(inw(DM270_GIO_IRQPORT) | (1<<DM270_GIO_IRQPORT_SHIFT(DM270_INTERRUPT_EXT4)), DM270_GIO_IRQPORT); /* * CS8900A INTRQ goes high when an enabled interrupt is triggered * and goes low after ISQ is read as all 0's */ /* Trigger on rising edge */ outw(inw(DM270_GIO_INV(DM270_INTERRUPT_EXT4)) | (1<<DM270_GIO_INV_SHIFT(DM270_INTERRUPT_EXT4)), DM270_GIO_INV(DM270_INTERRUPT_EXT4)); /* Use single-sided edge interrupts */ outw(inw(DM270_GIO_IRQEDGE) & ~(1<<DM270_GIO_IRQEDGE_SHIFT(DM270_INTERRUPT_EXT4)), DM270_GIO_IRQEDGE); #endif #ifdef CONFIG_ALMA_ANS /* * Make sure the chip select (CSA1) is enabled * Note, that we don't have to program the base address, since * it is programmed once for both CSA0 and CSA1 in *-head.S */ PFSEL &= ~PF_CSA1; PFDIR |= PF_CSA1; /* Make sure that interrupt line (irq3) is enabled too */ PDSEL &= ~PD_IRQ3; PDDIR &= ~PD_IRQ3; PDKBEN |= PD_IRQ3; #endif /* Initialize the device structure. */ if (dev->priv == NULL) { dev->priv = kmalloc(sizeof(struct net_local), GFP_KERNEL); memset(dev->priv, 0, sizeof(struct net_local)); } dev->base_addr = ioaddr; lp = (struct net_local *)dev->priv; if (readreg(dev, PP_ChipID) != CHIP_EISA_ID_SIG) { printk("cs89x0.c: No CrystalLan device found.\n"); return ENODEV; } /* get the chip type */ printk ("CrystalLAN EISA ID: 0x%04x\n", readreg(dev, 0)); rev_type = readreg(dev, PRODUCT_ID_ADD); lp->chip_type = rev_type &~ REVISON_BITS; lp->chip_revision = ((rev_type & REVISON_BITS) >> 8) + 'A'; /* Check the chip type and revision in order to set the correct send command CS8920 revision C and CS8900 revision F can use the faster send. */ lp->send_cmd = TX_AFTER_ALL; #if 0 if (lp->chip_type == CS8900 && lp->chip_revision >= 'F') lp->send_cmd = TX_NOW; if (lp->chip_type != CS8900 && lp->chip_revision >= 'C') lp->send_cmd = TX_NOW; #endif if (net_debug && version_printed++ == 0) printk(version); printk("%s: cs89%c0%s rev %c found at 0x%.8lx %s", dev->name, lp->chip_type==CS8900?'0':'2', lp->chip_type==CS8920M?"M":"", lp->chip_revision, dev->base_addr, readreg(dev, PP_SelfST) & ACTIVE_33V ? "3.3Volts" : "5Volts"); reset_chip(dev); /* Fill this in, we don't have an EEPROM */ lp->adapter_cnf = A_CNF_10B_T | A_CNF_MEDIA_10B_T; lp->auto_neg_cnf = EE_AUTO_NEG_ENABLE | IMM_BIT; printk(" media %s%s%s", (lp->adapter_cnf & A_CNF_10B_T)?"RJ-45,":"", (lp->adapter_cnf & A_CNF_AUI)?"AUI,":"", (lp->adapter_cnf & A_CNF_10B_2)?"BNC,":""); lp->irq_map = 0xffff; /* dev->dev_addr[0] through dev->dev_addr[6] holds the mac address * of this ethernet device. This can be set to anything we want it * to be. But care should be taken to make this number unique... */ #if defined (CONFIG_UCBOOTSTRAP) memcpy(dev->dev_addr, cs8900a_hwaddr, 6); #elif defined (CONFIG_ARCH_DM270) memcpy(dev->dev_addr, get_MAC_address("dev1"), 6); #else #warning MAC address is not defined - uxing 00:de:ad:be:ef:53 { dev->dev_addr[0] = 0x00; dev->dev_addr[1] = 0xde; dev->dev_addr[2] = 0xad; dev->dev_addr[3] = 0xbe; dev->dev_addr[4] = 0xef; dev->dev_addr[5] = 0x53; } #endif /* print the ethernet address. */ for (i = 0; i < ETH_ALEN; i++) printk(" %2.2x", dev->dev_addr[i]); #ifdef FIXME /* Grab the region so we can find another board if autoIRQ fails. */ request_region(ioaddr, NETCARD_IO_EXTENT,"cs89x0"); #endif dev->open = net_open; dev->stop = net_close; dev->hard_start_xmit = net_send_packet; dev->get_stats = net_get_stats; dev->set_multicast_list = &set_multicast_list; dev->set_mac_address = &set_mac_address; /* Fill in the fields of the device structure with ethernet values. */ ether_setup(dev); printk("\n"); return 0; }