/*---------------------------------------------------------------------------*/
void
rf_core_setup_interrupts()
{
bool interrupts_disabled;
/* We are already turned on by the caller, so this should not happen */
if(!rf_core_is_accessible()) {
PRINTF("setup_interrupts: No access\n");
return;
}
/* Disable interrupts */
interrupts_disabled = ti_lib_int_master_disable();
/* Set all interrupt channels to CPE0 channel, error to CPE1 */
HWREG(RFC_DBELL_NONBUF_BASE + RFC_DBELL_O_RFCPEISL) = ERROR_IRQ;
/* Acknowledge configured interrupts */
HWREG(RFC_DBELL_NONBUF_BASE + RFC_DBELL_O_RFCPEIEN) = ENABLED_IRQS;
/* Clear interrupt flags, active low clear(?) */
HWREG(RFC_DBELL_NONBUF_BASE + RFC_DBELL_O_RFCPEIFG) = 0x0;
ti_lib_int_pend_clear(INT_RF_CPE0);
ti_lib_int_pend_clear(INT_RF_CPE1);
ti_lib_int_enable(INT_RF_CPE0);
ti_lib_int_enable(INT_RF_CPE1);
if(!interrupts_disabled) {
ti_lib_int_master_enable();
}
}
/*---------------------------------------------------------------------------*/
void
cc26xx_rf_cpe0_isr(void)
{
ENERGEST_ON(ENERGEST_TYPE_IRQ);
if(!rf_core_is_accessible()) {
printf("RF ISR called but RF not ready... PANIC!!\n");
if(rf_core_power_up() != RF_CORE_CMD_OK) {
PRINTF("rf_core_power_up() failed\n");
return;
}
}
ti_lib_int_master_disable();
if(HWREG(RFC_DBELL_NONBUF_BASE + RFC_DBELL_O_RFCPEIFG) & RX_FRAME_IRQ) {
process_poll(&rf_core_process);
}
if(RF_CORE_DEBUG_CRC) {
if(HWREG(RFC_DBELL_NONBUF_BASE + RFC_DBELL_O_RFCPEIFG) & RX_NOK_IRQ) {
rx_nok_isr();
}
}
/* Clear interrupt flags */
HWREG(RFC_DBELL_NONBUF_BASE + RFC_DBELL_O_RFCPEIFG) = 0x0;
ti_lib_int_master_enable();
ENERGEST_OFF(ENERGEST_TYPE_IRQ);
}
/*---------------------------------------------------------------------------*/
void
rf_core_power_down()
{
bool interrupts_disabled = ti_lib_int_master_disable();
ti_lib_int_disable(INT_RF_CPE0);
ti_lib_int_disable(INT_RF_CPE1);
if(rf_core_is_accessible()) {
HWREG(RFC_DBELL_NONBUF_BASE + RFC_DBELL_O_RFCPEIFG) = 0x0;
HWREG(RFC_DBELL_NONBUF_BASE + RFC_DBELL_O_RFCPEIEN) = 0x0;
/* need to send FS_POWERDOWN or analog components will use power */
fs_powerdown();
}
/* Shut down the RFCORE clock domain in the MCU VD */
ti_lib_prcm_domain_disable(PRCM_DOMAIN_RFCORE);
ti_lib_prcm_load_set();
while(!ti_lib_prcm_load_get());
/* Turn off RFCORE PD */
ti_lib_prcm_power_domain_off(PRCM_DOMAIN_RFCORE);
while(ti_lib_prcm_power_domain_status(PRCM_DOMAIN_RFCORE)
!= PRCM_DOMAIN_POWER_OFF);
ti_lib_int_pend_clear(INT_RF_CPE0);
ti_lib_int_pend_clear(INT_RF_CPE1);
ti_lib_int_enable(INT_RF_CPE0);
ti_lib_int_enable(INT_RF_CPE1);
if(!interrupts_disabled) {
ti_lib_int_master_enable();
}
}
/*---------------------------------------------------------------------------*/
uint_fast8_t
rf_core_send_cmd(uint32_t cmd, uint32_t *status)
{
uint32_t timeout_count = 0;
bool interrupts_disabled;
bool is_radio_op = false;
/* If cmd is 4-byte aligned, then it's a radio OP. Clear the status field */
if((cmd & 0x03) == 0) {
is_radio_op = true;
((rfc_radioOp_t *)cmd)->status = RF_CORE_RADIO_OP_STATUS_IDLE;
}
/*
* Make sure ContikiMAC doesn't turn us off from within an interrupt while
* we are accessing RF Core registers
*/
interrupts_disabled = ti_lib_int_master_disable();
if(!rf_core_is_accessible()) {
PRINTF("rf_core_send_cmd: RF was off\n");
if(!interrupts_disabled) {
ti_lib_int_master_enable();
}
return RF_CORE_CMD_ERROR;
}
if(is_radio_op) {
uint16_t command_no = ((rfc_radioOp_t *)cmd)->commandNo;
if((command_no & RF_CORE_COMMAND_PROTOCOL_MASK) != RF_CORE_COMMAND_PROTOCOL_COMMON &&
(command_no & RF_CORE_COMMAND_TYPE_MASK) == RF_CORE_COMMAND_TYPE_RADIO_OP) {
last_radio_op = (rfc_radioOp_t *)cmd;
}
}
HWREG(RFC_DBELL_BASE + RFC_DBELL_O_CMDR) = cmd;
do {
*status = HWREG(RFC_DBELL_BASE + RFC_DBELL_O_CMDSTA);
if(++timeout_count > 50000) {
PRINTF("rf_core_send_cmd: 0x%08lx Timeout\n", cmd);
if(!interrupts_disabled) {
ti_lib_int_master_enable();
}
return RF_CORE_CMD_ERROR;
}
} while(*status == RF_CORE_CMDSTA_PENDING);
if(!interrupts_disabled) {
ti_lib_int_master_enable();
}
/*
* If we reach here the command is no longer pending. It is either completed
* successfully or with error
*/
return (*status & RF_CORE_CMDSTA_RESULT_MASK) == RF_CORE_CMDSTA_DONE;
}
/*---------------------------------------------------------------------------*/
void
cc26xx_rf_cpe1_isr(void)
{
ENERGEST_ON(ENERGEST_TYPE_IRQ);
PRINTF("RF Error\n");
if(!rf_core_is_accessible()) {
if(rf_core_power_up() != RF_CORE_CMD_OK) {
return;
}
}
/* Clear interrupt flags */
HWREG(RFC_DBELL_NONBUF_BASE + RFC_DBELL_O_RFCPEIFG) = 0x0;
ENERGEST_OFF(ENERGEST_TYPE_IRQ);
}
/*---------------------------------------------------------------------------*/
int
rf_core_power_up()
{
uint32_t cmd_status;
bool interrupts_disabled = ti_lib_int_master_disable();
ti_lib_int_pend_clear(INT_RF_CPE0);
ti_lib_int_pend_clear(INT_RF_CPE1);
ti_lib_int_disable(INT_RF_CPE0);
ti_lib_int_disable(INT_RF_CPE1);
/* Enable RF Core power domain */
ti_lib_prcm_power_domain_on(PRCM_DOMAIN_RFCORE);
while(ti_lib_prcm_power_domain_status(PRCM_DOMAIN_RFCORE)
!= PRCM_DOMAIN_POWER_ON);
ti_lib_prcm_domain_enable(PRCM_DOMAIN_RFCORE);
ti_lib_prcm_load_set();
while(!ti_lib_prcm_load_get());
while(!rf_core_is_accessible()) {
PRINTF("rf_core_power_up: Not ready\n");
}
HWREG(RFC_DBELL_NONBUF_BASE + RFC_DBELL_O_RFCPEIFG) = 0x0;
HWREG(RFC_DBELL_NONBUF_BASE + RFC_DBELL_O_RFCPEIEN) = 0x0;
ti_lib_int_enable(INT_RF_CPE0);
ti_lib_int_enable(INT_RF_CPE1);
if(!interrupts_disabled) {
ti_lib_int_master_enable();
}
/* Let CPE boot */
HWREG(RFC_PWR_NONBUF_BASE + RFC_PWR_O_PWMCLKEN) = RF_CORE_CLOCKS_MASK;
/* Send ping (to verify RFCore is ready and alive) */
if(rf_core_send_cmd(CMDR_DIR_CMD(CMD_PING), &cmd_status) != RF_CORE_CMD_OK) {
PRINTF("rf_core_power_up: CMD_PING fail, CMDSTA=0x%08lx\n", cmd_status);
return RF_CORE_CMD_ERROR;
}
return RF_CORE_CMD_OK;
}
/*---------------------------------------------------------------------------*/
void
cc26xx_rf_cpe0_isr(void)
{
ENERGEST_ON(ENERGEST_TYPE_IRQ);
if(!rf_core_is_accessible()) {
printf("RF ISR called but RF not ready... PANIC!!\n");
if(rf_core_power_up() != RF_CORE_CMD_OK) {
PRINTF("rf_core_power_up() failed\n");
return;
}
}
ti_lib_int_master_disable();
if(HWREG(RFC_DBELL_NONBUF_BASE + RFC_DBELL_O_RFCPEIFG) & RX_FRAME_IRQ) {
/* Clear the RX_ENTRY_DONE interrupt flag */
HWREG(RFC_DBELL_NONBUF_BASE + RFC_DBELL_O_RFCPEIFG) = 0xFF7FFFFF;
process_poll(&rf_core_process);
}
if(RF_CORE_DEBUG_CRC) {
if(HWREG(RFC_DBELL_NONBUF_BASE + RFC_DBELL_O_RFCPEIFG) & RX_NOK_IRQ) {
/* Clear the RX_NOK interrupt flag */
HWREG(RFC_DBELL_NONBUF_BASE + RFC_DBELL_O_RFCPEIFG) = 0xFFFDFFFF;
rx_nok_isr();
}
}
if(HWREG(RFC_DBELL_NONBUF_BASE + RFC_DBELL_O_RFCPEIFG) &
(IRQ_LAST_FG_COMMAND_DONE | IRQ_LAST_COMMAND_DONE)) {
/* Clear the two TX-related interrupt flags */
HWREG(RFC_DBELL_NONBUF_BASE + RFC_DBELL_O_RFCPEIFG) = 0xFFFFFFF5;
}
ti_lib_int_master_enable();
ENERGEST_OFF(ENERGEST_TYPE_IRQ);
}
