static int rk30_i2c_xfer(struct i2c_adapter *adap,
struct i2c_msg *msgs, int num)
{
int ret = 0, state, retry = 10;
unsigned long scl_rate;
struct rk30_i2c *i2c = (struct rk30_i2c *)adap->algo_data;
clk_enable(i2c->clk);
#ifdef I2C_CHECK_IDLE
printk("wax->%d\n",__LINE__); //add by nition for test
while(retry-- && ((state = rk30_i2c_check_idle(i2c)) != I2C_IDLE)){
printk("wax->%d\n",__LINE__); //add by nition for test
msleep(10);
printk("wax->%d\n",__LINE__); //add by nition for test
}
printk("wax->%d\n",__LINE__); //add by nition for test
if(retry == 0){
printk("wax->%d\n",__LINE__); //add by nition for test
dev_err(i2c->dev, "i2c is not in idle(state = %d)\n", state);
return -EIO;
}
#endif
if(msgs[0].scl_rate <= 400000 && msgs[0].scl_rate >= 10000)
scl_rate = msgs[0].scl_rate;
else if(msgs[0].scl_rate > 400000){
dev_warn(i2c->dev, "Warning: addr[0x%x] msg[0].scl_rate( = %dKhz) is too high!",
msgs[0].addr, msgs[0].scl_rate/1000);
scl_rate = 400000;
}
else{
dev_warn(i2c->dev, "Warning: addr[0x%x] msg[0].scl_rate( = %dKhz) is too low!",
msgs[0].addr, msgs[0].scl_rate/1000);
scl_rate = 10000;
}
if(i2c->is_div_from_arm[i2c->adap.nr]){
mutex_lock(&i2c->m_lock);
}
rk30_i2c_set_clk(i2c, scl_rate);
i2c_dbg(i2c->dev, "i2c transfer start: addr: 0x%x, scl_reate: %ldKhz, len: %d\n", msgs[0].addr, scl_rate/1000, num);
ret = rk30_i2c_doxfer(i2c, msgs, num);
i2c_dbg(i2c->dev, "i2c transfer stop: addr: 0x%x, state: %d, ret: %d\n", msgs[0].addr, ret, i2c->state);
if(i2c->is_div_from_arm[i2c->adap.nr]){
mutex_unlock(&i2c->m_lock);
}
clk_disable(i2c->clk);
return (ret < 0)?ret:num;
}
static void rk30_i2c_init_hw(struct rk30_i2c *i2c, unsigned long scl_rate)
{
i2c->scl_rate = 0;
rk30_i2c_set_clk(i2c, scl_rate);
return;
}