void spl_board_init(void) { int ret; struct rk3399_cru *cru = rockchip_get_cru(); /* * The RK3399 resets only 'almost all logic' (see also in the TRM * "3.9.4 Global software reset"), when issuing a software reset. * This may cause issues during boot-up for some configurations of * the application software stack. * * To work around this, we test whether the last reset reason was * a power-on reset and (if not) issue an overtemp-reset to reset * the entire module. * * While this was previously fixed by modifying the various places * that could generate a software reset (e.g. U-Boot's sysreset * driver, the ATF or Linux), we now have it here to ensure that * we no longer have to track this through the various components. */ if (cru->glb_rst_st != 0) rk3399_force_power_on_reset(); /* * Turning the eMMC and SPI back on (if disabled via the Qseven * BIOS_ENABLE) signal is done through a always-on regulator). */ ret = regulators_enable_boot_on(false); if (ret) debug("%s: Cannot enable boot on regulator\n", __func__); preloader_console_init(); }
int rk3036_sysreset_request(struct udevice *dev, enum sysreset_t type) { struct rk3036_cru *cru = rockchip_get_cru(); if (IS_ERR(cru)) return PTR_ERR(cru); switch (type) { case SYSRESET_WARM: writel(0xeca8, &cru->cru_glb_srst_snd_value); break; case SYSRESET_COLD: writel(0xfdb9, &cru->cru_glb_srst_fst_value); break; default: return -EPROTONOSUPPORT; } return -EINPROGRESS; }
int rk3288_reset_request(struct udevice *dev, enum reset_t type) { struct rk3288_cru *cru = rockchip_get_cru(); if (IS_ERR(cru)) return PTR_ERR(cru); switch (type) { case RESET_WARM: rk_clrreg(&cru->cru_mode_con, 0xffff); writel(0xeca8, &cru->cru_glb_srst_snd_value); break; case RESET_COLD: rk_clrreg(&cru->cru_mode_con, 0xffff); writel(0xfdb9, &cru->cru_glb_srst_fst_value); break; default: return -EPROTONOSUPPORT; } return -EINPROGRESS; }
static void rk3288_detect_reset_reason(void) { struct rk3288_cru *cru = rockchip_get_cru(); const char *reason; if (IS_ERR(cru)) return; switch (cru->cru_glb_rst_st) { case GLB_POR_RST: reason = "POR"; break; case FST_GLB_RST_ST: case SND_GLB_RST_ST: reason = "RST"; break; case FST_GLB_TSADC_RST_ST: case SND_GLB_TSADC_RST_ST: reason = "THERMAL"; break; case FST_GLB_WDT_RST_ST: case SND_GLB_WDT_RST_ST: reason = "WDOG"; break; default: reason = "unknown reset"; } env_set("reset_reason", reason); /* * Clear cru_glb_rst_st, so we can determine the last reset cause * for following resets. */ rk_clrreg(&cru->cru_glb_rst_st, GLB_RST_ST_MASK); }