rt_err_t at24cxx_init(const char * device_name, const char * i2c_bus_name)
{
int i;
struct rt_i2c_bus_device* i2c_bus_device;
/* initialize mutex */
if (rt_mutex_init(&at24cxx_device.lock, device_name, RT_IPC_FLAG_FIFO) != RT_EOK)
{
rt_kprintf("init lock mutex failed\n");
return -RT_ENOSYS;
}
/* we got i2c bus */
i2c_bus_device = rt_i2c_bus_device_find(i2c_bus_name);
if(i2c_bus_device == RT_NULL)
{
AT24CXX_TRACE("i2c device %s not found!\r\n", i2c_bus_device);
return -RT_ENOSYS;
}
at24cxx_device.bus = i2c_bus_device;
/* find match */
for(i=0;i<ARRAY_SIZE(at24cxx_attr_table);i++)
{
if(!rt_strcmp(at24cxx_attr_table[i].name, device_name))
{
AT24CXX_TRACE("%s supported hardware:%s\r\n", __func__, device_name);
at24cxx_device.attr = at24cxx_attr_table[i];
break;
}
}
/* devices not supported */
if( i == ARRAY_SIZE(at24cxx_attr_table))
{
return RT_ERROR;
}
at24cxx_device.geometry.bytes_per_sector = at24cxx_device.attr.page_size;
at24cxx_device.geometry.block_size = at24cxx_device.attr.page_size;
at24cxx_device.geometry.sector_count = at24cxx_device.attr.total_size/at24cxx_device.attr.page_size;
/* register device */
at24cxx_device.parent.type = RT_Device_Class_Block;
at24cxx_device.parent.init = init;
at24cxx_device.parent.open = open;
at24cxx_device.parent.close = close;
at24cxx_device.parent.read = read;
at24cxx_device.parent.write = write_page;
at24cxx_device.parent.control = control;
/* no private */
at24cxx_device.parent.user_data = RT_NULL;
rt_device_register(&at24cxx_device.parent, device_name,
RT_DEVICE_FLAG_RDWR | RT_DEVICE_FLAG_STANDALONE);
return RT_EOK;
}
rt_err_t l3g4200d_init(const char * i2c_bus_device_name)
{
i2c_device = rt_i2c_bus_device_find(i2c_bus_device_name);
if(i2c_device == RT_NULL)
{
rt_kprintf("i2c bus device %s not found!\r\n", i2c_bus_device_name);
return -RT_ENOSYS;
}
// RCC_Configuration();
// NVIC_Configuration();
// GPIO_Configuration();
Single_Write(CTRL_REG1, 0x0f);
Single_Write(CTRL_REG2, 0x00);
Single_Write(CTRL_REG3, 0x08);
Single_Write(CTRL_REG4, 0x30); //+-2000dps
Single_Write(CTRL_REG5, 0x00);
// rt_sem_init(&l3g4200d_int2,"l3g_INT2",0,RT_IPC_FLAG_FIFO);
return RT_EOK;
}
