static void __exit scc_enet_cleanup(void)
{
struct rtnet_device *rtdev = rtdev_root;
struct scc_enet_private *cep = (struct scc_enet_private *)rtdev->priv;
volatile cpm8xx_t *cp = cpmp;
volatile scc_enet_t *ep;
if (rtdev) {
rtdm_irq_disable(&cep->irq_handle);
rtdm_irq_free(&cep->irq_handle);
ep = (scc_enet_t *)(&cp->cp_dparam[PROFF_ENET]);
m8xx_cpm_dpfree(ep->sen_genscc.scc_rbase);
m8xx_cpm_dpfree(ep->sen_genscc.scc_tbase);
rt_stack_disconnect(rtdev);
rt_unregister_rtnetdev(rtdev);
rt_rtdev_disconnect(rtdev);
printk("%s: unloaded\n", rtdev->name);
rtskb_pool_release(&cep->skb_pool);
rtdev_free(rtdev);
rtdev_root = NULL;
}
}
static void tulip_remove_one (struct pci_dev *pdev)
{
struct rtnet_device *rtdev = (struct rtnet_device *) pci_get_drvdata (pdev);
struct tulip_private *tp;
if (!rtdev || !rtdev->priv)
return;
tp = rtdev->priv;
pci_free_consistent (pdev,
sizeof (struct tulip_rx_desc) * RX_RING_SIZE +
sizeof (struct tulip_tx_desc) * TX_RING_SIZE,
tp->rx_ring, tp->rx_ring_dma);
rt_unregister_rtnetdev (rtdev);
if (tp->mtable)
kfree (tp->mtable);
#ifndef USE_IO_OPS
iounmap((void *)rtdev->base_addr);
#endif
/*RTnet*/
rt_rtdev_disconnect(rtdev);
rtdev_free (rtdev);
/*RTnet*/
pci_release_regions (pdev);
pci_set_drvdata (pdev, NULL);
/* pci_power_off (pdev, -1); */
}
/***
* loopback_init
*/
static int __init loopback_init(void)
{
int err;
struct rtnet_device *rtdev;
printk("initializing loopback...\n");
if ((rtdev = rt_alloc_etherdev(0)) == NULL)
return -ENODEV;
rt_rtdev_connect(rtdev, &RTDEV_manager);
RTNET_SET_MODULE_OWNER(rtdev);
strcpy(rtdev->name, "rtlo");
rtdev->vers = RTDEV_VERS_2_0;
rtdev->open = &rt_loopback_open;
rtdev->stop = &rt_loopback_close;
rtdev->hard_start_xmit = &rt_loopback_xmit;
rtdev->flags |= IFF_LOOPBACK;
rtdev->flags &= ~IFF_BROADCAST;
rtdev->features |= RTNETIF_F_NON_EXCLUSIVE_XMIT;
if ((err = rt_register_rtnetdev(rtdev)) != 0)
{
rtdev_free(rtdev);
return err;
}
rt_loopback_dev = rtdev;
return 0;
}
/***
* loopback_init
*/
static int __init loopback_init(void)
{
int err;
struct rtnet_device *rtdev;
rt_printk("initializing loopback...\n");
if ((rtdev = rt_alloc_etherdev(0)) == NULL)
return -ENODEV;
rt_rtdev_connect(rtdev, &RTDEV_manager);
SET_MODULE_OWNER(rtdev);
strcpy(rtdev->name, "rtlo");
rtdev->open = &rt_loopback_open;
rtdev->stop = &rt_loopback_close;
rtdev->hard_header = rt_eth_header;
rtdev->hard_start_xmit = &rt_loopback_xmit;
if ((err = rt_register_rtnetdev(rtdev)) != 0)
{
rtdev_free(rtdev);
return err;
}
rt_loopback_dev = rtdev;
return 0;
}
/***
* loopback_cleanup
*/
static void __exit loopback_cleanup(void)
{
struct rtnet_device *rtdev = rt_loopback_dev;
printk("removing loopback...\n");
rt_unregister_rtnetdev(rtdev);
rt_rtdev_disconnect(rtdev);
rtdev_free(rtdev);
}
void rt2x00_core_remove(struct rtnet_device * rtnet_dev) {
struct rtwlan_device * rtwlan_dev = rtnetdev_priv(rtnet_dev);
rtskb_pool_release(&rtwlan_dev->skb_pool);
rt_unregister_rtnetdev(rtnet_dev);
rt_rtdev_disconnect(rtnet_dev);
rtdev_free(rtnet_dev);
}
/* Initialize the CPM Ethernet on SCC. If EPPC-Bug loaded us, or performed
* some other network I/O, a whole bunch of this has already been set up.
* It is no big deal if we do it again, we just have to disable the
* transmit and receive to make sure we don't catch the CPM with some
* inconsistent control information.
*/
int __init scc_enet_init(void)
{
struct rtnet_device *rtdev = NULL;
struct scc_enet_private *cep;
int i, j, k;
unsigned char *eap, *ba;
dma_addr_t mem_addr;
bd_t *bd;
volatile cbd_t *bdp;
volatile cpm8xx_t *cp;
volatile scc_t *sccp;
volatile scc_enet_t *ep;
volatile immap_t *immap;
cp = cpmp; /* Get pointer to Communication Processor */
immap = (immap_t *)(mfspr(IMMR) & 0xFFFF0000); /* and to internal registers */
bd = (bd_t *)__res;
/* Configure the SCC parameters (this has formerly be done
* by macro definitions).
*/
switch (rtnet_scc) {
case 3:
CPM_CR_ENET = CPM_CR_CH_SCC3;
PROFF_ENET = PROFF_SCC3;
SCC_ENET = 2; /* Index, not number! */
CPMVEC_ENET = CPMVEC_SCC3;
break;
case 2:
CPM_CR_ENET = CPM_CR_CH_SCC2;
PROFF_ENET = PROFF_SCC2;
SCC_ENET = 1; /* Index, not number! */
CPMVEC_ENET = CPMVEC_SCC2;
break;
case 1:
CPM_CR_ENET = CPM_CR_CH_SCC1;
PROFF_ENET = PROFF_SCC1;
SCC_ENET = 0; /* Index, not number! */
CPMVEC_ENET = CPMVEC_SCC1;
break;
default:
printk(KERN_ERR "enet: SCC%d doesn't exit (check rtnet_scc)\n", rtnet_scc);
return -1;
}
/* Allocate some private information and create an Ethernet device instance.
*/
rtdev = rtdev_root = rt_alloc_etherdev(sizeof(struct scc_enet_private));
if (rtdev == NULL) {
printk(KERN_ERR "enet: Could not allocate ethernet device.\n");
return -1;
}
rtdev_alloc_name(rtdev, "rteth%d");
rt_rtdev_connect(rtdev, &RTDEV_manager);
RTNET_SET_MODULE_OWNER(rtdev);
rtdev->vers = RTDEV_VERS_2_0;
cep = (struct scc_enet_private *)rtdev->priv;
rtdm_lock_init(&cep->lock);
/* Get pointer to SCC area in parameter RAM.
*/
ep = (scc_enet_t *)(&cp->cp_dparam[PROFF_ENET]);
/* And another to the SCC register area.
*/
sccp = (volatile scc_t *)(&cp->cp_scc[SCC_ENET]);
cep->sccp = (scc_t *)sccp; /* Keep the pointer handy */
/* Disable receive and transmit in case EPPC-Bug started it.
*/
sccp->scc_gsmrl &= ~(SCC_GSMRL_ENR | SCC_GSMRL_ENT);
/* Cookbook style from the MPC860 manual.....
* Not all of this is necessary if EPPC-Bug has initialized
* the network.
* So far we are lucky, all board configurations use the same
* pins, or at least the same I/O Port for these functions.....
* It can't last though......
*/
#if (defined(PA_ENET_RXD) && defined(PA_ENET_TXD))
/* Configure port A pins for Txd and Rxd.
*/
immap->im_ioport.iop_papar |= (PA_ENET_RXD | PA_ENET_TXD);
immap->im_ioport.iop_padir &= ~(PA_ENET_RXD | PA_ENET_TXD);
immap->im_ioport.iop_paodr &= ~PA_ENET_TXD;
#elif (defined(PB_ENET_RXD) && defined(PB_ENET_TXD))
/* Configure port B pins for Txd and Rxd.
*/
immap->im_cpm.cp_pbpar |= (PB_ENET_RXD | PB_ENET_TXD);
immap->im_cpm.cp_pbdir &= ~(PB_ENET_RXD | PB_ENET_TXD);
immap->im_cpm.cp_pbodr &= ~PB_ENET_TXD;
#else
#error Exactly ONE pair of PA_ENET_[RT]XD, PB_ENET_[RT]XD must be defined
#endif
#if defined(PC_ENET_LBK)
/* Configure port C pins to disable External Loopback
*/
immap->im_ioport.iop_pcpar &= ~PC_ENET_LBK;
immap->im_ioport.iop_pcdir |= PC_ENET_LBK;
immap->im_ioport.iop_pcso &= ~PC_ENET_LBK;
immap->im_ioport.iop_pcdat &= ~PC_ENET_LBK; /* Disable Loopback */
#endif /* PC_ENET_LBK */
/* Configure port C pins to enable CLSN and RENA.
*/
immap->im_ioport.iop_pcpar &= ~(PC_ENET_CLSN | PC_ENET_RENA);
immap->im_ioport.iop_pcdir &= ~(PC_ENET_CLSN | PC_ENET_RENA);
immap->im_ioport.iop_pcso |= (PC_ENET_CLSN | PC_ENET_RENA);
/* Configure port A for TCLK and RCLK.
*/
immap->im_ioport.iop_papar |= (PA_ENET_TCLK | PA_ENET_RCLK);
immap->im_ioport.iop_padir &= ~(PA_ENET_TCLK | PA_ENET_RCLK);
/* Configure Serial Interface clock routing.
* First, clear all SCC bits to zero, then set the ones we want.
*/
cp->cp_sicr &= ~SICR_ENET_MASK;
cp->cp_sicr |= SICR_ENET_CLKRT;
/* Manual says set SDDR, but I can't find anything with that
* name. I think it is a misprint, and should be SDCR. This
* has already been set by the communication processor initialization.
*/
/* Allocate space for the buffer descriptors in the DP ram.
* These are relative offsets in the DP ram address space.
* Initialize base addresses for the buffer descriptors.
*/
i = m8xx_cpm_dpalloc(sizeof(cbd_t) * RX_RING_SIZE);
ep->sen_genscc.scc_rbase = i;
cep->rx_bd_base = (cbd_t *)&cp->cp_dpmem[i];
i = m8xx_cpm_dpalloc(sizeof(cbd_t) * TX_RING_SIZE);
ep->sen_genscc.scc_tbase = i;
cep->tx_bd_base = (cbd_t *)&cp->cp_dpmem[i];
cep->dirty_tx = cep->cur_tx = cep->tx_bd_base;
cep->cur_rx = cep->rx_bd_base;
/* Issue init Rx BD command for SCC.
* Manual says to perform an Init Rx parameters here. We have
* to perform both Rx and Tx because the SCC may have been
* already running.
* In addition, we have to do it later because we don't yet have
* all of the BD control/status set properly.
cp->cp_cpcr = mk_cr_cmd(CPM_CR_ENET, CPM_CR_INIT_RX) | CPM_CR_FLG;
while (cp->cp_cpcr & CPM_CR_FLG);
*/
/* Initialize function code registers for big-endian.
*/
ep->sen_genscc.scc_rfcr = SCC_EB;
ep->sen_genscc.scc_tfcr = SCC_EB;
/* Set maximum bytes per receive buffer.
* This appears to be an Ethernet frame size, not the buffer
* fragment size. It must be a multiple of four.
*/
ep->sen_genscc.scc_mrblr = PKT_MAXBLR_SIZE;
/* Set CRC preset and mask.
*/
ep->sen_cpres = 0xffffffff;
ep->sen_cmask = 0xdebb20e3;
ep->sen_crcec = 0; /* CRC Error counter */
ep->sen_alec = 0; /* alignment error counter */
ep->sen_disfc = 0; /* discard frame counter */
ep->sen_pads = 0x8888; /* Tx short frame pad character */
ep->sen_retlim = 15; /* Retry limit threshold */
ep->sen_maxflr = PKT_MAXBUF_SIZE; /* maximum frame length register */
ep->sen_minflr = PKT_MINBUF_SIZE; /* minimum frame length register */
ep->sen_maxd1 = PKT_MAXBLR_SIZE; /* maximum DMA1 length */
ep->sen_maxd2 = PKT_MAXBLR_SIZE; /* maximum DMA2 length */
/* Clear hash tables.
*/
ep->sen_gaddr1 = 0;
ep->sen_gaddr2 = 0;
ep->sen_gaddr3 = 0;
ep->sen_gaddr4 = 0;
ep->sen_iaddr1 = 0;
ep->sen_iaddr2 = 0;
ep->sen_iaddr3 = 0;
ep->sen_iaddr4 = 0;
/* Set Ethernet station address.
*/
eap = (unsigned char *)&(ep->sen_paddrh);
#ifdef CONFIG_FEC_ENET
/* We need a second MAC address if FEC is used by Linux */
for (i=5; i>=0; i--)
*eap++ = rtdev->dev_addr[i] = (bd->bi_enetaddr[i] |
(i==3 ? 0x80 : 0));
#else
for (i=5; i>=0; i--)
*eap++ = rtdev->dev_addr[i] = bd->bi_enetaddr[i];
#endif
ep->sen_pper = 0; /* 'cause the book says so */
ep->sen_taddrl = 0; /* temp address (LSB) */
ep->sen_taddrm = 0;
ep->sen_taddrh = 0; /* temp address (MSB) */
/* Now allocate the host memory pages and initialize the
* buffer descriptors.
*/
bdp = cep->tx_bd_base;
for (i=0; i<TX_RING_SIZE; i++) {
/* Initialize the BD for every fragment in the page.
*/
bdp->cbd_sc = 0;
bdp->cbd_bufaddr = 0;
bdp++;
}
/* Set the last buffer to wrap.
*/
bdp--;
bdp->cbd_sc |= BD_SC_WRAP;
bdp = cep->rx_bd_base;
k = 0;
for (i=0; i<CPM_ENET_RX_PAGES; i++) {
/* Allocate a page.
*/
ba = (unsigned char *)consistent_alloc(GFP_KERNEL, PAGE_SIZE, &mem_addr);
/* Initialize the BD for every fragment in the page.
*/
for (j=0; j<CPM_ENET_RX_FRPPG; j++) {
bdp->cbd_sc = BD_ENET_RX_EMPTY | BD_ENET_RX_INTR;
bdp->cbd_bufaddr = mem_addr;
cep->rx_vaddr[k++] = ba;
mem_addr += CPM_ENET_RX_FRSIZE;
ba += CPM_ENET_RX_FRSIZE;
bdp++;
}
}
/* Set the last buffer to wrap.
*/
bdp--;
bdp->cbd_sc |= BD_SC_WRAP;
/* Let's re-initialize the channel now. We have to do it later
* than the manual describes because we have just now finished
* the BD initialization.
*/
cp->cp_cpcr = mk_cr_cmd(CPM_CR_ENET, CPM_CR_INIT_TRX) | CPM_CR_FLG;
while (cp->cp_cpcr & CPM_CR_FLG);
cep->skb_cur = cep->skb_dirty = 0;
sccp->scc_scce = 0xffff; /* Clear any pending events */
/* Enable interrupts for transmit error, complete frame
* received, and any transmit buffer we have also set the
* interrupt flag.
*/
sccp->scc_sccm = (SCCE_ENET_TXE | SCCE_ENET_RXF | SCCE_ENET_TXB);
/* Install our interrupt handler.
*/
rtdev->irq = CPM_IRQ_OFFSET + CPMVEC_ENET;
rt_stack_connect(rtdev, &STACK_manager);
if ((i = rtdm_irq_request(&cep->irq_handle, rtdev->irq,
scc_enet_interrupt, 0, "rt_mpc8xx_enet", rtdev))) {
printk(KERN_ERR "Couldn't request IRQ %d\n", rtdev->irq);
rtdev_free(rtdev);
return i;
}
/* Set GSMR_H to enable all normal operating modes.
* Set GSMR_L to enable Ethernet to MC68160.
*/
sccp->scc_gsmrh = 0;
sccp->scc_gsmrl = (SCC_GSMRL_TCI | SCC_GSMRL_TPL_48 | SCC_GSMRL_TPP_10 | SCC_GSMRL_MODE_ENET);
/* Set sync/delimiters.
*/
sccp->scc_dsr = 0xd555;
/* Set processing mode. Use Ethernet CRC, catch broadcast, and
* start frame search 22 bit times after RENA.
*/
sccp->scc_pmsr = (SCC_PMSR_ENCRC | SCC_PMSR_NIB22);
/* It is now OK to enable the Ethernet transmitter.
* Unfortunately, there are board implementation differences here.
*/
#if (!defined (PB_ENET_TENA) && defined (PC_ENET_TENA))
immap->im_ioport.iop_pcpar |= PC_ENET_TENA;
immap->im_ioport.iop_pcdir &= ~PC_ENET_TENA;
#elif ( defined (PB_ENET_TENA) && !defined (PC_ENET_TENA))
cp->cp_pbpar |= PB_ENET_TENA;
cp->cp_pbdir |= PB_ENET_TENA;
#else
#error Configuration Error: define exactly ONE of PB_ENET_TENA, PC_ENET_TENA
#endif
#if defined(CONFIG_RPXLITE) || defined(CONFIG_RPXCLASSIC)
/* And while we are here, set the configuration to enable ethernet.
*/
*((volatile uint *)RPX_CSR_ADDR) &= ~BCSR0_ETHLPBK;
*((volatile uint *)RPX_CSR_ADDR) |=
(BCSR0_ETHEN | BCSR0_COLTESTDIS | BCSR0_FULLDPLXDIS);
#endif
#ifdef CONFIG_BSEIP
/* BSE uses port B and C for PHY control.
*/
cp->cp_pbpar &= ~(PB_BSE_POWERUP | PB_BSE_FDXDIS);
cp->cp_pbdir |= (PB_BSE_POWERUP | PB_BSE_FDXDIS);
cp->cp_pbdat |= (PB_BSE_POWERUP | PB_BSE_FDXDIS);
immap->im_ioport.iop_pcpar &= ~PC_BSE_LOOPBACK;
immap->im_ioport.iop_pcdir |= PC_BSE_LOOPBACK;
immap->im_ioport.iop_pcso &= ~PC_BSE_LOOPBACK;
immap->im_ioport.iop_pcdat &= ~PC_BSE_LOOPBACK;
#endif
#ifdef CONFIG_FADS
cp->cp_pbpar |= PB_ENET_TENA;
cp->cp_pbdir |= PB_ENET_TENA;
/* Enable the EEST PHY.
*/
*((volatile uint *)BCSR1) &= ~BCSR1_ETHEN;
#endif
rtdev->base_addr = (unsigned long)ep;
/* The CPM Ethernet specific entries in the device structure. */
rtdev->open = scc_enet_open;
rtdev->hard_start_xmit = scc_enet_start_xmit;
rtdev->stop = scc_enet_close;
rtdev->hard_header = &rt_eth_header;
rtdev->get_stats = scc_enet_get_stats;
if (!rx_pool_size)
rx_pool_size = RX_RING_SIZE * 2;
if (rtskb_pool_init(&cep->skb_pool, rx_pool_size) < rx_pool_size) {
rtdm_irq_disable(&cep->irq_handle);
rtdm_irq_free(&cep->irq_handle);
rtskb_pool_release(&cep->skb_pool);
rtdev_free(rtdev);
return -ENOMEM;
}
if ((i = rt_register_rtnetdev(rtdev))) {
printk(KERN_ERR "Couldn't register rtdev\n");
rtdm_irq_disable(&cep->irq_handle);
rtdm_irq_free(&cep->irq_handle);
rtskb_pool_release(&cep->skb_pool);
rtdev_free(rtdev);
return i;
}
/* And last, enable the transmit and receive processing.
*/
sccp->scc_gsmrl |= (SCC_GSMRL_ENR | SCC_GSMRL_ENT);
printk("%s: CPM ENET Version 0.2 on SCC%d, irq %d, addr %02x:%02x:%02x:%02x:%02x:%02x\n",
rtdev->name, SCC_ENET+1, rtdev->irq,
rtdev->dev_addr[0], rtdev->dev_addr[1], rtdev->dev_addr[2],
rtdev->dev_addr[3], rtdev->dev_addr[4], rtdev->dev_addr[5]);
return 0;
}
static int tulip_init_one (struct pci_dev *pdev,
const struct pci_device_id *ent)
{
struct tulip_private *tp;
/* See note below on the multiport cards. */
static unsigned char last_phys_addr[6] = {0x00, 'L', 'i', 'n', 'u', 'x'};
static struct pci_device_id early_486_chipsets[] = {
{ PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_82424) },
{ PCI_DEVICE(PCI_VENDOR_ID_SI, PCI_DEVICE_ID_SI_496) },
{ },
};
#if defined(__i386__)
static int last_irq;
#endif
u8 chip_rev;
unsigned int i, irq;
unsigned short sum;
u8 ee_data[EEPROM_SIZE];
/*RTnet*/struct rtnet_device *rtdev;
long ioaddr;
static int board_idx = -1;
int chip_idx = ent->driver_data;
unsigned int t2104x_mode = 0;
unsigned int eeprom_missing = 0;
#ifndef MODULE
static int did_version; /* Already printed version info. */
if (tulip_debug > 0 && did_version++ == 0)
printk(KERN_INFO "%s", version);
#endif
board_idx++;
if (cards[board_idx] == 0)
return -ENODEV;
/*
* Lan media wire a tulip chip to a wan interface. Needs a very
* different driver (lmc driver)
*/
if (pdev->subsystem_vendor == PCI_VENDOR_ID_LMC) {
printk(KERN_ERR PFX "skipping LMC card.\n");
return -ENODEV;
}
/*
* Early DM9100's need software CRC and the DMFE driver
*/
if (pdev->vendor == 0x1282 && pdev->device == 0x9100)
{
u32 dev_rev;
/* Read Chip revision */
pci_read_config_dword(pdev, PCI_REVISION_ID, &dev_rev);
if(dev_rev < 0x02000030)
{
printk(KERN_ERR PFX "skipping early DM9100 with Crc bug (use dmfe)\n");
return -ENODEV;
}
}
/*
* Looks for early PCI chipsets where people report hangs
* without the workarounds being on.
*/
/* 1. Intel Saturn. Switch to 8 long words burst, 8 long word cache
aligned. Aries might need this too. The Saturn errata are not
pretty reading but thankfully it's an old 486 chipset.
2. The dreaded SiS496 486 chipset. Same workaround as Intel
Saturn.
*/
if (pci_dev_present(early_486_chipsets))
csr0 = MRL | MRM | (8 << BurstLenShift) | (1 << CALShift);
/* bugfix: the ASIX must have a burst limit or horrible things happen. */
if (chip_idx == AX88140) {
if ((csr0 & 0x3f00) == 0)
csr0 |= 0x2000;
}
/* PNIC doesn't have MWI/MRL/MRM... */
if (chip_idx == LC82C168)
csr0 &= ~0xfff10000; /* zero reserved bits 31:20, 16 */
/* DM9102A has troubles with MRM & clear reserved bits 24:22, 20, 16, 7:1 */
if (pdev->vendor == 0x1282 && pdev->device == 0x9102)
csr0 &= ~0x01f100ff;
#if defined(__sparc__)
/* DM9102A needs 32-dword alignment/burst length on sparc - chip bug? */
if (pdev->vendor == 0x1282 && pdev->device == 0x9102)
csr0 = (csr0 & ~0xff00) | 0xe000;
#endif
/*
* And back to business
*/
i = pci_enable_device(pdev);
if (i) {
printk(KERN_ERR PFX
"Cannot enable tulip board #%d, aborting\n",
board_idx);
return i;
}
ioaddr = pci_resource_start (pdev, 0);
irq = pdev->irq;
/* alloc_etherdev ensures aligned and zeroed private structures */
rtdev = /*RTnet*/rt_alloc_etherdev (sizeof (*tp), RX_RING_SIZE*2);
if (!rtdev) {
printk(KERN_ERR PFX "ether device alloc failed, aborting\n");
return -ENOMEM;
}
//rtdev_alloc_name(rtdev, "eth%d");//Done by register_rtdev()
rt_rtdev_connect(rtdev, &RTDEV_manager);
rtdev->vers = RTDEV_VERS_2_0;
if (pci_resource_len (pdev, 0) < tulip_tbl[chip_idx].io_size) {
printk(KERN_ERR PFX "%s: I/O region (0x%llx@0x%llx) too small, "
"aborting\n", pci_name(pdev),
(unsigned long long)pci_resource_len (pdev, 0),
(unsigned long long)pci_resource_start (pdev, 0));
goto err_out_free_netdev;
}
/* grab all resources from both PIO and MMIO regions, as we
* don't want anyone else messing around with our hardware */
if (pci_request_regions (pdev, "tulip"))
goto err_out_free_netdev;
#ifndef USE_IO_OPS
ioaddr = (unsigned long) ioremap (pci_resource_start (pdev, 1),
tulip_tbl[chip_idx].io_size);
if (!ioaddr)
goto err_out_free_res;
#endif
pci_read_config_byte (pdev, PCI_REVISION_ID, &chip_rev);
/*
* initialize private data structure 'tp'
* it is zeroed and aligned in alloc_etherdev
*/
tp = rtdev->priv;
tp->rx_ring = pci_alloc_consistent(pdev,
sizeof(struct tulip_rx_desc) * RX_RING_SIZE +
sizeof(struct tulip_tx_desc) * TX_RING_SIZE,
&tp->rx_ring_dma);
if (!tp->rx_ring)
goto err_out_mtable;
tp->tx_ring = (struct tulip_tx_desc *)(tp->rx_ring + RX_RING_SIZE);
tp->tx_ring_dma = tp->rx_ring_dma + sizeof(struct tulip_rx_desc) * RX_RING_SIZE;
tp->chip_id = chip_idx;
tp->flags = tulip_tbl[chip_idx].flags;
tp->pdev = pdev;
tp->base_addr = ioaddr;
tp->revision = chip_rev;
tp->csr0 = csr0;
rtdm_lock_init(&tp->lock);
spin_lock_init(&tp->mii_lock);
rtdev->base_addr = ioaddr;
rtdev->irq = irq;
#ifdef XXX_CONFIG_TULIP_MWI
if (!force_csr0 && (tp->flags & HAS_PCI_MWI))
tulip_mwi_config (pdev, rtdev);
#else
/* MWI is broken for DC21143 rev 65... */
if (chip_idx == DC21143 && chip_rev == 65)
tp->csr0 &= ~MWI;
#endif
/* Stop the chip's Tx and Rx processes. */
tulip_stop_rxtx(tp);
pci_set_master(pdev);
/* Clear the missed-packet counter. */
inl(ioaddr + CSR8);
if (chip_idx == DC21041) {
if (inl(ioaddr + CSR9) & 0x8000) {
chip_idx = DC21040;
t2104x_mode = 1;
} else {
t2104x_mode = 2;
}
}
/* The station address ROM is read byte serially. The register must
be polled, waiting for the value to be read bit serially from the
EEPROM.
*/
sum = 0;
if (chip_idx == DC21040) {
outl(0, ioaddr + CSR9); /* Reset the pointer with a dummy write. */
for (i = 0; i < 6; i++) {
int value, boguscnt = 100000;
do
value = inl(ioaddr + CSR9);
while (value < 0 && --boguscnt > 0);
rtdev->dev_addr[i] = value;
sum += value & 0xff;
}
} else if (chip_idx == LC82C168) {
for (i = 0; i < 3; i++) {
int value, boguscnt = 100000;
outl(0x600 | i, ioaddr + 0x98);
do
value = inl(ioaddr + CSR9);
while (value < 0 && --boguscnt > 0);
put_unaligned(le16_to_cpu(value), ((u16*)rtdev->dev_addr) + i);
sum += value & 0xffff;
}
} else if (chip_idx == COMET) {
/* No need to read the EEPROM. */
put_unaligned(inl(ioaddr + 0xA4), (u32 *)rtdev->dev_addr);
put_unaligned(inl(ioaddr + 0xA8), (u16 *)(rtdev->dev_addr + 4));
for (i = 0; i < 6; i ++)
sum += rtdev->dev_addr[i];
} else {
/* A serial EEPROM interface, we read now and sort it out later. */
int sa_offset = 0;
int ee_addr_size = tulip_read_eeprom(ioaddr, 0xff, 8) & 0x40000 ? 8 : 6;
for (i = 0; i < sizeof(ee_data)/2; i++)
((u16 *)ee_data)[i] =
le16_to_cpu(tulip_read_eeprom(ioaddr, i, ee_addr_size));
/* DEC now has a specification (see Notes) but early board makers
just put the address in the first EEPROM locations. */
/* This does memcmp(eedata, eedata+16, 8) */
for (i = 0; i < 8; i ++)
if (ee_data[i] != ee_data[16+i])
sa_offset = 20;
if (ee_data[0] == 0xff && ee_data[1] == 0xff && ee_data[2] == 0)
sa_offset = 2; /* Grrr, damn Matrox boards. */
#ifdef CONFIG_DDB5476
if ((pdev->bus->number == 0) && (PCI_SLOT(pdev->devfn) == 6)) {
/* DDB5476 MAC address in first EEPROM locations. */
sa_offset = 0;
/* No media table either */
tp->flags &= ~HAS_MEDIA_TABLE;
}
#endif
#ifdef CONFIG_DDB5477
if ((pdev->bus->number == 0) && (PCI_SLOT(pdev->devfn) == 4)) {
/* DDB5477 MAC address in first EEPROM locations. */
sa_offset = 0;
/* No media table either */
tp->flags &= ~HAS_MEDIA_TABLE;
}
#endif
#ifdef CONFIG_MIPS_COBALT
if ((pdev->bus->number == 0) &&
((PCI_SLOT(pdev->devfn) == 7) ||
(PCI_SLOT(pdev->devfn) == 12))) {
/* Cobalt MAC address in first EEPROM locations. */
sa_offset = 0;
/* No media table either */
tp->flags &= ~HAS_MEDIA_TABLE;
}
#endif
for (i = 0; i < 6; i ++) {
rtdev->dev_addr[i] = ee_data[i + sa_offset];
sum += ee_data[i + sa_offset];
}
}
/* Lite-On boards have the address byte-swapped. */
if ((rtdev->dev_addr[0] == 0xA0 || rtdev->dev_addr[0] == 0xC0)
&& rtdev->dev_addr[1] == 0x00)
for (i = 0; i < 6; i+=2) {
char tmp = rtdev->dev_addr[i];
rtdev->dev_addr[i] = rtdev->dev_addr[i+1];
rtdev->dev_addr[i+1] = tmp;
}
/* On the Zynx 315 Etherarray and other multiport boards only the
first Tulip has an EEPROM.
On Sparc systems the mac address is held in the OBP property
"local-mac-address".
The addresses of the subsequent ports are derived from the first.
Many PCI BIOSes also incorrectly report the IRQ line, so we correct
that here as well. */
if (sum == 0 || sum == 6*0xff) {
#if defined(__sparc__)
struct pcidev_cookie *pcp = pdev->sysdata;
#endif
eeprom_missing = 1;
for (i = 0; i < 5; i++)
rtdev->dev_addr[i] = last_phys_addr[i];
rtdev->dev_addr[i] = last_phys_addr[i] + 1;
#if defined(__sparc__)
if ((pcp != NULL) && prom_getproplen(pcp->prom_node,
"local-mac-address") == 6) {
prom_getproperty(pcp->prom_node, "local-mac-address",
rtdev->dev_addr, 6);
}
#endif
#if defined(__i386__) /* Patch up x86 BIOS bug. */
if (last_irq)
irq = last_irq;
#endif
}
for (i = 0; i < 6; i++)
last_phys_addr[i] = rtdev->dev_addr[i];
#if defined(__i386__)
last_irq = irq;
#endif
/* The lower four bits are the media type. */
if (board_idx >= 0 && board_idx < MAX_UNITS) {
/* Somehow required for this RTnet version, don't ask me why... */
if (!options[board_idx])
tp->default_port = 11; /*MII*/
/*RTnet*/
if (options[board_idx] & MEDIA_MASK)
tp->default_port = options[board_idx] & MEDIA_MASK;
if ((options[board_idx] & FullDuplex) || full_duplex[board_idx] > 0)
tp->full_duplex = 1;
if (mtu[board_idx] > 0)
rtdev->mtu = mtu[board_idx];
}
if (rtdev->mem_start & MEDIA_MASK)
tp->default_port = rtdev->mem_start & MEDIA_MASK;
if (tp->default_port) {
printk(KERN_INFO "tulip%d: Transceiver selection forced to %s.\n",
board_idx, medianame[tp->default_port & MEDIA_MASK]);
tp->medialock = 1;
if (tulip_media_cap[tp->default_port] & MediaAlwaysFD)
tp->full_duplex = 1;
}
if (tp->full_duplex)
tp->full_duplex_lock = 1;
if (tulip_media_cap[tp->default_port] & MediaIsMII) {
u16 media2advert[] = { 0x20, 0x40, 0x03e0, 0x60, 0x80, 0x100, 0x200 };
tp->mii_advertise = media2advert[tp->default_port - 9];
tp->mii_advertise |= (tp->flags & HAS_8023X); /* Matching bits! */
}
if (tp->flags & HAS_MEDIA_TABLE) {
memcpy(tp->eeprom, ee_data, sizeof(tp->eeprom));
sprintf(rtdev->name, "tulip%d", board_idx); /* hack */
tulip_parse_eeprom(rtdev);
strcpy(rtdev->name, "rteth%d"); /* un-hack */
}
if ((tp->flags & ALWAYS_CHECK_MII) ||
(tp->mtable && tp->mtable->has_mii) ||
( ! tp->mtable && (tp->flags & HAS_MII))) {
if (tp->mtable && tp->mtable->has_mii) {
for (i = 0; i < tp->mtable->leafcount; i++)
if (tp->mtable->mleaf[i].media == 11) {
tp->cur_index = i;
tp->saved_if_port = rtdev->if_port;
tulip_select_media(rtdev, 2);
rtdev->if_port = tp->saved_if_port;
break;
}
}
/* Find the connected MII xcvrs.
Doing this in open() would allow detecting external xcvrs
later, but takes much time. */
tulip_find_mii (rtdev, board_idx);
}
rtdev->open = tulip_open;
rtdev->stop = tulip_close;
rtdev->hard_header = rt_eth_header;
rtdev->hard_start_xmit = tulip_start_xmit;
rtdev->get_stats = tulip_get_stats;
if (/*RTnet*/rt_register_rtnetdev(rtdev)) {
goto err_out_free_ring;
}
printk(KERN_INFO "%s: %s rev %d at %#3lx,",
rtdev->name, tulip_tbl[chip_idx].chip_name, chip_rev, ioaddr);
pci_set_drvdata(pdev, rtdev);
if (t2104x_mode == 1)
printk(" 21040 compatible mode,");
else if (t2104x_mode == 2)
printk(" 21041 mode,");
if (eeprom_missing)
printk(" EEPROM not present,");
for (i = 0; i < 6; i++)
printk("%c%2.2X", i ? ':' : ' ', rtdev->dev_addr[i]);
printk(", IRQ %d.\n", irq);
/*RTnet
if (tp->chip_id == PNIC2)
tp->link_change = pnic2_lnk_change;
else if ((tp->flags & HAS_NWAY) || tp->chip_id == DC21041)
tp->link_change = t21142_lnk_change;
else if (tp->flags & HAS_PNICNWAY)
tp->link_change = pnic_lnk_change;
*RTnet*/
tp->link_change = NULL;
/* Reset the xcvr interface and turn on heartbeat. */
switch (chip_idx) {
case DC21041:
if (tp->sym_advertise == 0)
tp->sym_advertise = 0x0061;
outl(0x00000000, ioaddr + CSR13);
outl(0xFFFFFFFF, ioaddr + CSR14);
outl(0x00000008, ioaddr + CSR15); /* Listen on AUI also. */
outl(inl(ioaddr + CSR6) | csr6_fd, ioaddr + CSR6);
outl(0x0000EF01, ioaddr + CSR13);
break;
case DC21040:
outl(0x00000000, ioaddr + CSR13);
outl(0x00000004, ioaddr + CSR13);
break;
case DC21140:
case DM910X:
default:
if (tp->mtable)
outl(tp->mtable->csr12dir | 0x100, ioaddr + CSR12);
break;
case DC21142:
if (tp->mii_cnt || tulip_media_cap[rtdev->if_port] & MediaIsMII) {
outl(csr6_mask_defstate, ioaddr + CSR6);
outl(0x0000, ioaddr + CSR13);
outl(0x0000, ioaddr + CSR14);
outl(csr6_mask_hdcap, ioaddr + CSR6);
} else
t21142_start_nway(rtdev);
break;
case PNIC2:
/* just do a reset for sanity sake */
outl(0x0000, ioaddr + CSR13);
outl(0x0000, ioaddr + CSR14);
break;
case LC82C168:
if ( ! tp->mii_cnt) {
tp->nway = 1;
tp->nwayset = 0;
outl(csr6_ttm | csr6_ca, ioaddr + CSR6);
outl(0x30, ioaddr + CSR12);
outl(0x0001F078, ioaddr + CSR6);
outl(0x0201F078, ioaddr + CSR6); /* Turn on autonegotiation. */
}
break;
case MX98713:
case COMPEX9881:
outl(0x00000000, ioaddr + CSR6);
outl(0x000711C0, ioaddr + CSR14); /* Turn on NWay. */
outl(0x00000001, ioaddr + CSR13);
break;
case MX98715:
case MX98725:
outl(0x01a80000, ioaddr + CSR6);
outl(0xFFFFFFFF, ioaddr + CSR14);
outl(0x00001000, ioaddr + CSR12);
break;
case COMET:
/* No initialization necessary. */
break;
}
/* put the chip in snooze mode until opened */
tulip_set_power_state (tp, 0, 1);
return 0;
err_out_free_ring:
pci_free_consistent (pdev,
sizeof (struct tulip_rx_desc) * RX_RING_SIZE +
sizeof (struct tulip_tx_desc) * TX_RING_SIZE,
tp->rx_ring, tp->rx_ring_dma);
err_out_mtable:
if (tp->mtable)
kfree (tp->mtable);
#ifndef USE_IO_OPS
iounmap((void *)ioaddr);
err_out_free_res:
#endif
pci_release_regions (pdev);
err_out_free_netdev:
/*RTnet*/rtdev_free (rtdev);
return -ENODEV;
}
struct rtnet_device * rt2x00_core_probe(struct _rt2x00_dev_handler * handler,
void * priv,
u32 sizeof_dev) {
struct rtnet_device * rtnet_dev = NULL;
struct _rt2x00_core * core = NULL;
struct rtwlan_device * rtwlan_dev = NULL;
static int cards_found = -1;
int err;
DEBUG("Start.\n");
cards_found++;
if (cards[cards_found] == 0)
goto exit;
rtnet_dev = rtwlan_alloc_dev(sizeof_dev + sizeof(*core));
if(!rtnet_dev)
goto exit;
rt_rtdev_connect(rtnet_dev, &RTDEV_manager);
RTNET_SET_MODULE_OWNER(rtnet_dev);
rtnet_dev->vers = RTDEV_VERS_2_0;
rtwlan_dev = rtnetdev_priv(rtnet_dev);
memset(rtwlan_dev, 0x00, sizeof(*rtwlan_dev));
core = rtwlan_priv(rtwlan_dev);
memset(core, 0x00, sizeof(*core));
core->rtwlan_dev = rtwlan_dev;
core->handler = handler;
core->priv = (void*)core + sizeof(*core);
core->rtnet_dev = rtnet_dev;
if (rtskb_pool_init(&core->rtwlan_dev->skb_pool, RX_ENTRIES*2) < RX_ENTRIES*2) {
rtskb_pool_release(&core->rtwlan_dev->skb_pool);
ERROR("rtskb_pool_init failed.\n");
goto exit;
}
/* Set configuration default values. */
rt2x00_init_config(core);
if(core->handler->dev_probe
&& core->handler->dev_probe(core, priv)){
ERROR("device probe failed.\n");
goto exit;
}
INFO("Device " MAC_FMT " detected.\n", MAC_ARG(rtnet_dev->dev_addr));
rtwlan_dev->hard_start_xmit = rt2x00_start_xmit;
rtnet_dev->open = &rt2x00_open;
rtnet_dev->stop = &rt2x00_close;
rtnet_dev->do_ioctl = &rt2x00_ioctl;
rtnet_dev->hard_header = &rt_eth_header;
if ((err = rt_register_rtnetdev(rtnet_dev)) != 0) {
rtdev_free(rtnet_dev);
ERROR("rtnet_device registration failed.\n");
printk("err=%d\n", err);
goto exit_dev_remove;
}
set_bit(DEVICE_AWAKE, &core->flags);
return rtnet_dev;
exit_dev_remove:
if(core->handler->dev_remove)
core->handler->dev_remove(core);
exit:
return NULL;
}
