void rtw_rf_set_tx_gain_offset(_adapter *adapter, u8 path, s8 offset)
{
u8 write_value;
DBG_871X("kfree gain_offset 0x55:0x%x ", rtw_hal_read_rfreg(adapter, path, 0x55, 0xffffffff));
switch (rtw_get_chip_type(adapter)) {
#ifdef CONFIG_RTL8703B
case RTL8703B:
write_value = RF_TX_GAIN_OFFSET_8703B(offset);
rtw_hal_write_rfreg(adapter, path, 0x55, 0x0fc000, write_value);
break;
#endif /* CONFIG_RTL8703B */
#ifdef CONFIG_RTL8188F
case RTL8188F:
write_value = RF_TX_GAIN_OFFSET_8188F(offset);
rtw_hal_write_rfreg(adapter, path, 0x55, 0x0fc000, write_value);
break;
#endif /* CONFIG_RTL8188F */
#ifdef CONFIG_RTL8192E
case RTL8192E:
write_value = RF_TX_GAIN_OFFSET_8192E(offset);
rtw_hal_write_rfreg(adapter, path, 0x55, 0x0f8000, write_value);
break;
#endif /* CONFIG_RTL8188F */
#ifdef CONFIG_RTL8821A
case RTL8821:
write_value = RF_TX_GAIN_OFFSET_8821A(offset);
rtw_hal_write_rfreg(adapter, path, 0x55, 0x0f8000, write_value);
break;
#endif /* CONFIG_RTL8821A */
#ifdef CONFIG_RTL8814A
case RTL8814A:
DBG_871X("\nkfree by PhyDM on the sw CH. path %d\n", path);
break;
#endif /* CONFIG_RTL8821A */
default:
rtw_warn_on(1);
break;
}
DBG_871X(" after :0x%x\n", rtw_hal_read_rfreg(adapter, path, 0x55, 0xffffffff));
}
void rtw_hal_turbo_edca(_adapter *adapter)
{
HAL_DATA_TYPE *hal_data = GET_HAL_DATA(adapter);
struct dvobj_priv *dvobj = adapter_to_dvobj(adapter);
struct recv_priv *precvpriv = &(adapter->recvpriv);
struct registry_priv *pregpriv = &adapter->registrypriv;
struct mlme_ext_priv *pmlmeext = &(adapter->mlmeextpriv);
struct mlme_ext_info *pmlmeinfo = &(pmlmeext->mlmext_info);
/* Parameter suggested by Scott */
#if 0
u32 EDCA_BE_UL = edca_setting_UL[p_mgnt_info->iot_peer];
u32 EDCA_BE_DL = edca_setting_DL[p_mgnt_info->iot_peer];
#endif
u32 EDCA_BE_UL = 0x5ea42b;
u32 EDCA_BE_DL = 0x00a42b;
u8 ic_type = rtw_get_chip_type(adapter);
u8 iot_peer = 0;
u8 wireless_mode = 0xFF; /* invalid value */
u8 traffic_index;
u32 edca_param;
u64 cur_tx_bytes = 0;
u64 cur_rx_bytes = 0;
u8 bbtchange = _TRUE;
u8 is_bias_on_rx = _FALSE;
u8 is_linked = _FALSE;
u8 interface_type;
if (hal_data->dis_turboedca)
return;
if (rtw_mi_check_status(adapter, MI_ASSOC))
is_linked = _TRUE;
if (is_linked != _TRUE) {
precvpriv->is_any_non_be_pkts = _FALSE;
return;
}
if ((pregpriv->wifi_spec == 1)) { /* || (pmlmeinfo->HT_enable == 0)) */
precvpriv->is_any_non_be_pkts = _FALSE;
return;
}
interface_type = rtw_get_intf_type(adapter);
wireless_mode = pmlmeext->cur_wireless_mode;
iot_peer = pmlmeinfo->assoc_AP_vendor;
if (iot_peer >= HT_IOT_PEER_MAX) {
precvpriv->is_any_non_be_pkts = _FALSE;
return;
}
if (ic_type == RTL8188E) {
if ((iot_peer == HT_IOT_PEER_RALINK) || (iot_peer == HT_IOT_PEER_ATHEROS))
is_bias_on_rx = _TRUE;
}
/* Check if the status needs to be changed. */
if ((bbtchange) || (!precvpriv->is_any_non_be_pkts)) {
cur_tx_bytes = dvobj->traffic_stat.cur_tx_bytes;
cur_rx_bytes = dvobj->traffic_stat.cur_rx_bytes;
/* traffic, TX or RX */
if (is_bias_on_rx) {
if (cur_tx_bytes > (cur_rx_bytes << 2)) {
/* Uplink TP is present. */
traffic_index = UP_LINK;
} else {
/* Balance TP is present. */
traffic_index = DOWN_LINK;
}
} else {
if (cur_rx_bytes > (cur_tx_bytes << 2)) {
/* Downlink TP is present. */
traffic_index = DOWN_LINK;
} else {
/* Balance TP is present. */
traffic_index = UP_LINK;
}
}
#if 0
if ((p_dm_odm->dm_edca_table.prv_traffic_idx != traffic_index)
|| (!p_dm_odm->dm_edca_table.is_current_turbo_edca))
#endif
{
if (interface_type == RTW_PCIE) {
EDCA_BE_UL = 0x6ea42b;
EDCA_BE_DL = 0x6ea42b;
}
/* 92D txop can't be set to 0x3e for cisco1250 */
if ((iot_peer == HT_IOT_PEER_CISCO) && (wireless_mode == ODM_WM_N24G)) {
EDCA_BE_DL = edca_setting_DL[iot_peer];
EDCA_BE_UL = edca_setting_UL[iot_peer];
}
/* merge from 92s_92c_merge temp*/
else if ((iot_peer == HT_IOT_PEER_CISCO) && ((wireless_mode == ODM_WM_G) || (wireless_mode == (ODM_WM_B | ODM_WM_G)) || (wireless_mode == ODM_WM_A) || (wireless_mode == ODM_WM_B)))
EDCA_BE_DL = edca_setting_dl_g_mode[iot_peer];
else if ((iot_peer == HT_IOT_PEER_AIRGO) && ((wireless_mode == ODM_WM_G) || (wireless_mode == ODM_WM_A)))
EDCA_BE_DL = 0xa630;
else if (iot_peer == HT_IOT_PEER_MARVELL) {
EDCA_BE_DL = edca_setting_DL[iot_peer];
EDCA_BE_UL = edca_setting_UL[iot_peer];
} else if (iot_peer == HT_IOT_PEER_ATHEROS) {
/* Set DL EDCA for Atheros peer to 0x3ea42b.*/
/* Suggested by SD3 Wilson for ASUS TP issue.*/
EDCA_BE_DL = edca_setting_DL[iot_peer];
}
if ((ic_type == RTL8812) || (ic_type == RTL8821) || (ic_type == RTL8192E)) { /* add 8812AU/8812AE */
EDCA_BE_UL = 0x5ea42b;
EDCA_BE_DL = 0x5ea42b;
RTW_DBG("8812A: EDCA_BE_UL=0x%x EDCA_BE_DL =0x%x\n", EDCA_BE_UL, EDCA_BE_DL);
}
if (interface_type == RTW_PCIE &&
(ic_type == RTL8822B)) {
EDCA_BE_UL = 0x6ea42b;
EDCA_BE_DL = 0x6ea42b;
}
if (traffic_index == DOWN_LINK)
edca_param = EDCA_BE_DL;
else
edca_param = EDCA_BE_UL;
rtw_hal_set_hwreg(adapter, HW_VAR_AC_PARAM_BE, (u8 *)(&edca_param));
RTW_DBG("Turbo EDCA =0x%x\n", edca_param);
hal_data->prv_traffic_idx = traffic_index;
}
hal_data->is_turbo_edca = _TRUE;
} else {
/* */
/* Turn Off EDCA turbo here. */
/* Restore original EDCA according to the declaration of AP. */
/* */
if (hal_data->is_turbo_edca) {
edca_param = hal_data->ac_param_be;
rtw_hal_set_hwreg(adapter, HW_VAR_AC_PARAM_BE, (u8 *)(&edca_param));
hal_data->is_turbo_edca = _FALSE;
}
}
}
