static int tiny6410evk_console_init(void)
{
/* note: UART0 has no RTS/CTS connected */
s3c_gpio_mode(GPA0_RXD0 | ENABLE_PU);
s3c_gpio_mode(GPA1_TXD0);
s3c64xx_add_uart1();
return 0;
}
static int mini2440_console_init(void)
{
/*
* configure the UART1 right now, as barebox will
* start to send data immediately
*/
s3c_gpio_mode(GPH0_NCTS0);
s3c_gpio_mode(GPH1_NRTS0);
s3c_gpio_mode(GPH2_TXD0);
s3c_gpio_mode(GPH3_RXD0);
s3c24xx_add_uart1();
return 0;
}
static int mini6410_console_init(void)
{
s3c_gpio_mode(GPA0_RXD0 | ENABLE_PU);
s3c_gpio_mode(GPA1_TXD0);
s3c_gpio_mode(GPA2_NCTS0 | ENABLE_PU);
s3c_gpio_mode(GPA3_NRTS0);
barebox_set_model("Friendlyarm mini6410");
barebox_set_hostname("mini6410");
s3c64xx_add_uart1();
return 0;
}
static int mini2440_console_init(void)
{
/*
* configure the UART1 right now, as barebox will
* start to send data immediately
*/
s3c_gpio_mode(GPH0_NCTS0);
s3c_gpio_mode(GPH1_NRTS0);
s3c_gpio_mode(GPH2_TXD0);
s3c_gpio_mode(GPH3_RXD0);
add_generic_device("s3c_serial", DEVICE_ID_DYNAMIC, NULL, S3C_UART1_BASE,
S3C_UART1_SIZE, IORESOURCE_MEM, NULL);
return 0;
}
static int tiny210_console_init(void)
{
/*
* configure the UART1 right now, as barebox will
* start to send data immediately
*/
s3c_gpio_mode(GPA00_RXD0 | ENABLE_PU);
s3c_gpio_mode(GPA01_TXD0);
s3c_gpio_mode(GPA02_NCTS0 | ENABLE_PU);
s3c_gpio_mode(GPA03_NRTS0);
add_generic_device("s3c_serial", DEVICE_ID_DYNAMIC, NULL,
S3C_UART1_BASE, S3C_UART1_SIZE,
IORESOURCE_MEM, NULL);
return 0;
}
static int mini2440_devices_init(void)
{
uint32_t reg;
int i;
/* ----------- configure the access to the outer space ---------- */
for (i = 0; i < ARRAY_SIZE(pin_usage); i++)
s3c_gpio_mode(pin_usage[i]);
reg = readl(S3C_BWSCON);
/* CS#4 to access the network controller */
reg &= ~0x000f0000;
reg |= 0x000d0000; /* 16 bit */
writel(0x1f4c, S3C_BANKCON4);
writel(reg, S3C_BWSCON);
/* release the reset signal to external devices */
reg = readl(S3C_MISCCR);
reg |= 0x10000;
writel(reg, S3C_MISCCR);
add_generic_device("s3c24x0_nand", DEVICE_ID_DYNAMIC, NULL, S3C24X0_NAND_BASE,
0, IORESOURCE_MEM, &nand_info);
add_dm9000_device(0, S3C_CS4_BASE + 0x300, S3C_CS4_BASE + 0x304,
IORESOURCE_MEM_16BIT, &dm9000_data);
#ifdef CONFIG_NAND
/* ----------- add some vital partitions -------- */
devfs_del_partition("self_raw");
devfs_add_partition("nand0", 0x00000, 0x40000, DEVFS_PARTITION_FIXED, "self_raw");
dev_add_bb_dev("self_raw", "self0");
devfs_del_partition("env_raw");
devfs_add_partition("nand0", 0x40000, 0x20000, DEVFS_PARTITION_FIXED, "env_raw");
dev_add_bb_dev("env_raw", "env0");
#endif
add_generic_device("s3c_mci", 0, NULL, S3C2410_SDI_BASE, 0,
IORESOURCE_MEM, &mci_data);
add_generic_device("s3c_fb", 0, NULL, S3C2410_LCD_BASE, 0,
IORESOURCE_MEM, &s3c24x0_fb_data);
add_generic_device("ohci", 0, NULL, S3C2410_USB_HOST_BASE, 0x100,
IORESOURCE_MEM, NULL);
armlinux_set_bootparams((void*)S3C_SDRAM_BASE + 0x100);
armlinux_set_architecture(MACH_TYPE_MINI2440);
return 0;
}
static int mini210s_devices_init(void)
{
int i;
for (i = 0; i < ARRAY_SIZE(pin_usage); i++)
s3c_gpio_mode(pin_usage[i]);
mini210s_nand_init(); // needs fleshing out with a platform_data struct
mini210s_eth_init();
mini210s_led_init(); // lets get everything setup before we turn on the shiny shiny
armlinux_set_bootparams((void*)S3C_SDRAM_BASE + 0x100);
armlinux_set_architecture(MACH_TYPE_MINI210);
return 0;
}
static int tiny6410evk_devices_init(void)
{
int i;
/* init CPU card specific devices first */
tiny6410_init("FA EVK");
/* ----------- configure the access to the outer space ---------- */
for (i = 0; i < ARRAY_SIZE(tiny6410evk_pin_usage); i++)
s3c_gpio_mode(tiny6410evk_pin_usage[i]);
tiny6410evk_setup_dm9000_cs();
add_dm9000_device(0, S3C_CS1_BASE + 0x300, S3C_CS1_BASE + 0x304,
IORESOURCE_MEM_16BIT, &dm9000_data);
return 0;
}
static int mini6410_devices_init(void)
{
int i;
/* ----------- configure the access to the outer space ---------- */
for (i = 0; i < ARRAY_SIZE(pin_usage); i++)
s3c_gpio_mode(pin_usage[i]);
mini6410_setup_dm9000_cs();
add_dm9000_device(0, S3C_CS1_BASE + 0x300, S3C_CS1_BASE + 0x304,
IORESOURCE_MEM_16BIT, &dm9000_data);
armlinux_set_architecture(MACH_TYPE_MINI6410);
return 0;
}
static int mini2440_devices_init(void)
{
uint32_t reg;
int i;
/* ----------- configure the access to the outer space ---------- */
for (i = 0; i < ARRAY_SIZE(pin_usage); i++)
s3c_gpio_mode(pin_usage[i]);
reg = readl(S3C_BWSCON);
/* CS#4 to access the network controller */
reg &= ~0x000f0000;
reg |= 0x000d0000; /* 16 bit */
writel(0x1f4c, S3C_BANKCON4);
writel(reg, S3C_BWSCON);
/* release the reset signal to external devices */
reg = readl(S3C_MISCCR);
reg |= 0x10000;
writel(reg, S3C_MISCCR);
s3c24xx_add_nand(&nand_info);
add_dm9000_device(0, S3C_CS4_BASE + 0x300, S3C_CS4_BASE + 0x304,
IORESOURCE_MEM_16BIT, &dm9000_data);
#ifdef CONFIG_NAND
/* ----------- add some vital partitions -------- */
devfs_del_partition("self_raw");
devfs_add_partition("nand0", 0x00000, 0x40000, DEVFS_PARTITION_FIXED, "self_raw");
dev_add_bb_dev("self_raw", "self0");
devfs_del_partition("env_raw");
devfs_add_partition("nand0", 0x40000, 0x20000, DEVFS_PARTITION_FIXED, "env_raw");
dev_add_bb_dev("env_raw", "env0");
s3c24x0_bbu_nand_register_handler();
#endif
s3c24xx_add_mci(&mci_data);
s3c24xx_add_fb(&s3c24x0_fb_data);
s3c24xx_add_ohci();
armlinux_set_architecture(MACH_TYPE_MINI2440);
return 0;
}
static int tiny210_devices_init(void)
{
int i;
for (i = 0; i < ARRAY_SIZE(pin_usage); i++)
s3c_gpio_mode(pin_usage[i]);
for (i = 0; i < ARRAY_SIZE(leds); i++) {
leds[i].active_low = 1;
gpio_direction_output(leds[i].gpio, leds[i].active_low);
led_gpio_register(&leds[i]);
}
armlinux_set_bootparams((void*)S3C_SDRAM_BASE + 0x100);
armlinux_set_architecture(MACH_TYPE_MINI210);
return 0;
}
static int tiny210_devices_init(void)
{
int i;
for (i = 0; i < ARRAY_SIZE(pin_usage); i++)
s3c_gpio_mode(pin_usage[i]);
for (i = 0; i < ARRAY_SIZE(leds); i++) {
leds[i].active_low = 1;
gpio_direction_output(leds[i].gpio, leds[i].active_low);
led_gpio_register(&leds[i]);
}
led_set_trigger(LED_TRIGGER_HEARTBEAT, &leds[0].led);
armlinux_set_architecture(MACH_TYPE_MINI210);
return 0;
}
