void s3c_i2c1_cfg_gpio(struct platform_device *dev) { s3c_gpio_cfgpin(S3C_GPB2, S3C_GPB2_I2C_SCL1); s3c_gpio_cfgpin(S3C_GPB3, S3C_GPB3_I2C_SDA1); s3c_gpio_pullup(S3C_GPB2, 2); s3c_gpio_pullup(S3C_GPB3, 2); }
void s3c_i2c0_cfg_gpio(struct platform_device *dev) { s3c_gpio_cfgpin(S3C_GPB5, S3C_GPB5_I2C_SCL0); s3c_gpio_cfgpin(S3C_GPB6, S3C_GPB6_I2C_SDA0); s3c_gpio_pullup(S3C_GPB5, 2); s3c_gpio_pullup(S3C_GPB6, 2); }
static int smdk6400_probe(struct platform_device *pdev) { /*Set I2C port to controll WM8987 codec*/ s3c_gpio_pullup(S3C_GPB5, 0); s3c_gpio_pullup(S3C_GPB6, 0); s3c_gpio_cfgpin(S3C_GPB5, S3C_GPB5_I2C_SCL0); s3c_gpio_cfgpin(S3C_GPB6, S3C_GPB6_I2C_SDA0); return 0; }
static int s3c_spi_hw_init(struct s3c_spi *spi) { #ifdef CONFIG_SPICLK_PCLK clk_enable(spi->clk); #elif defined (CONFIG_SPICLK_EPLL) writel((readl(S3C_PCLK_GATE)|S3C_CLKCON_PCLK_SPI0|S3C_CLKCON_PCLK_SPI1),S3C_PCLK_GATE); writel((readl(S3C_SCLK_GATE)|S3C_CLKCON_SCLK_SPI0|S3C_CLKCON_SCLK_SPI1),S3C_SCLK_GATE); writel(readl(S3C_CLK_SRC)|S3C_CLKSRC_MPLL_CLKSEL, S3C_CLK_SRC); /* Set SPi Clock to MOUT(266Mhz)*/ if(SPI_CHANNEL == 0) writel((readl(S3C_CLK_SRC)&~(0x3<<14))|(1<<14), S3C_CLK_SRC); else /* SPI_CHANNEL = 1 */ writel((readl(S3C_CLK_SRC)&~(0x3<<16))|(1<<16), S3C_CLK_SRC); /* CLK_DIV2 setting */ /* SPI Input Clock(88.87Mhz) = 266.66Mhz / (2 + 1)*/ writel(((readl(S3C_CLK_DIV2) & ~(0xff << 0)) | 2) , S3C_CLK_DIV2); #elif defined (CONFIG_SPICLK_USBCLK) writel((readl(S3C_PCLK_GATE)| S3C_CLKCON_PCLK_SPI0|S3C_CLKCON_PCLK_SPI1),S3C_PCLK_GATE); writel((readl(S3C_SCLK_GATE)|S3C_CLKCON_SCLK_SPI0_48|S3C_CLKCON_SCLK_SPI1_48),S3C_SCLK_GATE); #else #error you must define correct confige file. #endif /* initialize the gpio */ if(SPI_CHANNEL == 0) { s3c_gpio_cfgpin(S3C_GPC0, S3C_GPC0_SPI_MISO0); s3c_gpio_cfgpin(S3C_GPC1, S3C_GPC1_SPI_CLK0); s3c_gpio_cfgpin(S3C_GPC2, S3C_GPC2_SPI_MOSI0); s3c_gpio_cfgpin(S3C_GPC3, S3C_GPC3_SPI_CS0); s3c_gpio_pullup(S3C_GPC0,1); s3c_gpio_pullup(S3C_GPC1,1); s3c_gpio_pullup(S3C_GPC2,1); s3c_gpio_pullup(S3C_GPC3,1); } else { s3c_gpio_cfgpin(S3C_GPC4, S3C_GPC4_SPI_MISO1); s3c_gpio_cfgpin(S3C_GPC5, S3C_GPC5_SPI_CLK1); s3c_gpio_cfgpin(S3C_GPC6, S3C_GPC6_SPI_MOSI1); s3c_gpio_cfgpin(S3C_GPC7, S3C_GPC7_SPI_CS1); s3c_gpio_pullup(S3C_GPC4,1); s3c_gpio_pullup(S3C_GPC5,1); s3c_gpio_pullup(S3C_GPC6,1); s3c_gpio_pullup(S3C_GPC7,1); } return 0; }
static int __init s3c6410_leds_init(void) { if (machine_is_smdk6410()) leds_event = smdk6400_leds_event; else return -1; if (machine_is_smdk6410()) { /*GPN12~15 used for LED*/ /*Set GPN12~15 to output mode */ s3c_gpio_cfgpin(S3C_GPN12, S3C_GPN12_OUTP); if(s3c_gpio_getcfg(S3C_GPN12) == 0) { printk(KERN_WARNING "LED: can't set GPN12 output mode\n"); } s3c_gpio_cfgpin(S3C_GPN13, S3C_GPN13_OUTP); if(s3c_gpio_getcfg(S3C_GPN13) == 0) { printk(KERN_WARNING "LED: can't set GPN13 output mode\n"); } s3c_gpio_cfgpin(S3C_GPN14, S3C_GPN14_OUTP); if(s3c_gpio_getcfg(S3C_GPN14) == 0) { printk(KERN_WARNING "LED: can't set GPN14 output mode\n"); } s3c_gpio_cfgpin(S3C_GPN15, S3C_GPN15_OUTP); if(s3c_gpio_getcfg(S3C_GPN15) == 0) { printk(KERN_WARNING "LED: can't set GPN15 output mode\n"); } } /* Get irqs */ set_irq_type(IRQ_EINT9, IRQT_FALLING); s3c_gpio_pullup(S3C_GPN9, 0x0); if (request_irq(IRQ_EINT9, eint9_switch, SA_TRIGGER_FALLING, "EINT9", NULL)) { printk(KERN_ERR "leds.c: Could not allocate EINT9 !\n"); return -EIO; } leds_event(led_start); return 0; }
static int __init smdk6410_init(void) { int ret; #if 0 /* Set up GPIOs to enable I2SV40 pin */ s3c_gpio_cfgpin(S3C_GPC4, S3C_GPC4_I2S_V40_DO0); s3c_gpio_cfgpin(S3C_GPC5, S3C_GPC5_I2S_V40_DO1); s3c_gpio_cfgpin(S3C_GPC7, S3C_GPC7_I2S_V40_DO2); s3c_gpio_cfgpin(S3C_GPH6, S3C_GPH6_I2S_V40_BCLK); s3c_gpio_cfgpin(S3C_GPH7, S3C_GPH7_I2S_V40_CDCLK); s3c_gpio_cfgpin(S3C_GPH8, S3C_GPH8_I2S_V40_LRCLK); s3c_gpio_cfgpin(S3C_GPH9, S3C_GPH9_I2S_V40_DI); #endif s3c_gpio_cfgpin(S3C_GPH6, S3C_GPH6_I2S_V40_BCLK); s3c_gpio_cfgpin(S3C_GPH7, S3C_GPH7_I2S_V40_CDCLK); s3c_gpio_cfgpin(S3C_GPH8, S3C_GPH8_I2S_V40_LRCLK); s3c_gpio_cfgpin(S3C_GPH9, S3C_GPH9_I2S_V40_DI); s3c_gpio_cfgpin(S3C_GPC4, S3C_GPC4_I2S_V40_DO0); s3c_gpio_cfgpin(S3C_GPC5, S3C_GPC5_I2S_V40_DO1); s3c_gpio_cfgpin(S3C_GPC7, S3C_GPC7_I2S_V40_DO2); /* pull-up-enable, pull-down-disable*/ s3c_gpio_pullup(S3C_GPH6, 0x2); s3c_gpio_pullup(S3C_GPH7, 0x2); s3c_gpio_pullup(S3C_GPH8, 0x2); s3c_gpio_pullup(S3C_GPH9, 0x2); s3c_gpio_pullup(S3C_GPC4, 0x2); s3c_gpio_pullup(S3C_GPC5, 0x2); s3c_gpio_pullup(S3C_GPC7, 0x2); smdk6410_snd_device = platform_device_alloc("soc-audio", -1); if (!smdk6410_snd_device) return -ENOMEM; platform_set_drvdata(smdk6410_snd_device, &smdk6410_snd_devdata); smdk6410_snd_devdata.dev = &smdk6410_snd_device->dev; ret = platform_device_add(smdk6410_snd_device); if (ret) platform_device_put(smdk6410_snd_device); return ret; }
void smdk6410_hsmmc_init (void) { /* hsmmc data strength */ writel(readl(S3C_SPCON) | (0x3 << 26), S3C_SPCON); /* jsgood: hsmmc0/1 card detect pin should be high before setup gpio. (GPG6 to Input) */ writel(readl(S3C_GPGCON) & 0xf0ffffff, S3C_GPGCON); /* GPIO N 13 (external interrupt) : Chip detect */ s3c_gpio_cfgpin(S3C_GPN13, S3C_GPN13_EXTINT13); /* GPN13 to EINT13 */ s3c_gpio_pullup(S3C_GPN13, 0x2); /* Pull-up Enable */ /* jsgood: MUXmmc# to DOUTmpll for MPLL Clock Source */ writel((readl(S3C_CLK_SRC) & ~(0x3f << 18)) | (0x15 << 18), S3C_CLK_SRC); #if defined(CONFIG_MACH_SANJOSE2) /* for hsmmc ch2 */ writel(0, S3C_GPNPU); writel((readl(S3C_GPNCON) & ~(0x3 << 24)) | (0x2 << 24), S3C_GPNCON); /* GPN12 to EINT */ writel(readl(S3C_EINT0CON0) | (0x3 << 25), S3C_EINT0CON0); /* EINT12 to both edge triggered */ writel(readl(S3C_EINT0MASK) & ~(0x1 << 12), S3C_EINT0MASK); /* EINT12 unmask */ writel(readl(S3C_VIC1INTENABLE) | (0x1 << 0), S3C_VIC1INTENABLE); /* EINT12 enable */ #endif }
/*-------------------------------------------------------------- * HS-MMC GPIO Set function * the location of this function must be re-considered. * by scsuh *--------------------------------------------------------------*/ void hsmmc_set_gpio (uint channel, uint width) { switch (channel) { /* can supports 1 and 4 bit bus */ case 0: /* GPIO G : Command, Clock */ s3c_gpio_cfgpin(S3C_GPG0, S3C_GPG0_MMC_CLK0); s3c_gpio_cfgpin(S3C_GPG1, S3C_GPG1_MMC_CMD0); s3c_gpio_pullup(S3C_GPG0, 0x0); /* Pull-up/down disable */ s3c_gpio_pullup(S3C_GPG1, 0x0); /* Pull-up/down disable */ /* GPIO G : Chip detect + LED */ s3c_gpio_cfgpin(S3C_GPG6, S3C_GPG6_MMC_CD1); s3c_gpio_pullup(S3C_GPG6, 0x2); /* Pull-up Enable */ if (width == 1) { /* GPIO G : MMC DATA1[0] */ s3c_gpio_cfgpin(S3C_GPG2, S3C_GPG2_MMC_DATA0_0); s3c_gpio_pullup(S3C_GPG2, 0x0); /* Pull-up/down disable */ } else if (width == 4) { /* GPIO G : MMC DATA1[0:3] */ s3c_gpio_cfgpin(S3C_GPG2, S3C_GPG2_MMC_DATA0_0); s3c_gpio_cfgpin(S3C_GPG3, S3C_GPG3_MMC_DATA0_1); s3c_gpio_cfgpin(S3C_GPG4, S3C_GPG4_MMC_DATA0_2); s3c_gpio_cfgpin(S3C_GPG5, S3C_GPG5_MMC_DATA0_3); s3c_gpio_pullup(S3C_GPG2, 0x0); /* Pull-up/down disable */ s3c_gpio_pullup(S3C_GPG3, 0x0); /* Pull-up/down disable */ s3c_gpio_pullup(S3C_GPG4, 0x0); /* Pull-up/down disable */ s3c_gpio_pullup(S3C_GPG5, 0x0); /* Pull-up/down disable */ } break; /* can supports 1, 4, and 8 bit bus */ case 1: /* GPIO H : Command, Clock */ s3c_gpio_cfgpin(S3C_GPH0, S3C_GPH0_MMC_CLK1); s3c_gpio_cfgpin(S3C_GPH1, S3C_GPH1_MMC_CMD1); s3c_gpio_pullup(S3C_GPH0, 0x0); /* Pull-up/down disable */ s3c_gpio_pullup(S3C_GPH1, 0x0); /* Pull-up/down disable */ /* GPIO G : Chip detect + LED */ s3c_gpio_cfgpin(S3C_GPG6, S3C_GPG6_MMC_CD1); s3c_gpio_pullup(S3C_GPG6, 0x2); /* Pull-up Enable */ if (width == 1) { /* GPIO H : MMC DATA1[0] */ s3c_gpio_cfgpin(S3C_GPH2, S3C_GPH2_MMC_DATA1_0); s3c_gpio_pullup(S3C_GPH2, 0x0); /* Pull-up/down disable */ } else if (width == 4) { /* GPIO H : MMC DATA1[0:3] */ s3c_gpio_cfgpin(S3C_GPH2, S3C_GPH2_MMC_DATA1_0); s3c_gpio_cfgpin(S3C_GPH3, S3C_GPH3_MMC_DATA1_1); s3c_gpio_cfgpin(S3C_GPH4, S3C_GPH4_MMC_DATA1_2); s3c_gpio_cfgpin(S3C_GPH5, S3C_GPH5_MMC_DATA1_3); s3c_gpio_pullup(S3C_GPH2, 0x0); /* Pull-up/down disable */ s3c_gpio_pullup(S3C_GPH3, 0x0); /* Pull-up/down disable */ s3c_gpio_pullup(S3C_GPH4, 0x0); /* Pull-up/down disable */ s3c_gpio_pullup(S3C_GPH5, 0x0); /* Pull-up/down disable */ } else if (width == 8) { /* GPIO H : MMC DATA1[0:7] */ s3c_gpio_cfgpin(S3C_GPH2, S3C_GPH2_MMC_DATA1_0); s3c_gpio_cfgpin(S3C_GPH3, S3C_GPH3_MMC_DATA1_1); s3c_gpio_cfgpin(S3C_GPH4, S3C_GPH4_MMC_DATA1_2); s3c_gpio_cfgpin(S3C_GPH5, S3C_GPH5_MMC_DATA1_3); s3c_gpio_cfgpin(S3C_GPH6, S3C_GPH6_MMC_DATA1_4); s3c_gpio_cfgpin(S3C_GPH7, S3C_GPH7_MMC_DATA1_5); s3c_gpio_cfgpin(S3C_GPH8, S3C_GPH8_MMC_DATA1_6); s3c_gpio_cfgpin(S3C_GPH9, S3C_GPH9_MMC_DATA1_7); s3c_gpio_pullup(S3C_GPH2, 0x0); /* Pull-up/down disable */ s3c_gpio_pullup(S3C_GPH3, 0x0); /* Pull-up/down disable */ s3c_gpio_pullup(S3C_GPH4, 0x0); /* Pull-up/down disable */ s3c_gpio_pullup(S3C_GPH5, 0x0); /* Pull-up/down disable */ s3c_gpio_pullup(S3C_GPH6, 0x0); /* Pull-up/down disable */ s3c_gpio_pullup(S3C_GPH7, 0x0); /* Pull-up/down disable */ s3c_gpio_pullup(S3C_GPH8, 0x0); /* Pull-up/down disable */ s3c_gpio_pullup(S3C_GPH9, 0x0); /* Pull-up/down disable */ } break; /* can supports 1 and 4 bit bus, no irq_cd */ case 2: /* GPIO H : Command, Clock */ s3c_gpio_cfgpin(S3C_GPH0, S3C_GPH0_MMC_CLK1); s3c_gpio_cfgpin(S3C_GPH1, S3C_GPH1_MMC_CMD1); s3c_gpio_pullup(S3C_GPH0, 0x0); /* Pull-up/down disable */ s3c_gpio_pullup(S3C_GPH1, 0x0); /* Pull-up/down disable */ /* GPIO G : Chip detect + LED */ s3c_gpio_cfgpin(S3C_GPG6, S3C_GPG6_MMC_CD1); s3c_gpio_pullup(S3C_GPG6, 0x2); /* Pull-up Enable */ if (width == 1) { /* GPIO H : MMC DATA1[0] */ s3c_gpio_cfgpin(S3C_GPH6, S3C_GPH6_MMC_DATA2_0); s3c_gpio_pullup(S3C_GPH6, 0x0); /* Pull-up/down disable */ } else if (width == 4) { /* GPIO H : MMC DATA1[0:3] */ s3c_gpio_cfgpin(S3C_GPH6, S3C_GPH6_MMC_DATA2_0); s3c_gpio_cfgpin(S3C_GPH7, S3C_GPH7_MMC_DATA2_1); s3c_gpio_cfgpin(S3C_GPH8, S3C_GPH8_MMC_DATA2_2); s3c_gpio_cfgpin(S3C_GPH9, S3C_GPH9_MMC_DATA2_3); s3c_gpio_pullup(S3C_GPH6, 0x0); /* Pull-up/down disable */ s3c_gpio_pullup(S3C_GPH7, 0x0); /* Pull-up/down disable */ s3c_gpio_pullup(S3C_GPH8, 0x0); /* Pull-up/down disable */ s3c_gpio_pullup(S3C_GPH9, 0x0); /* Pull-up/down disable */ } break; default: break; } }