static inline int Pdr_ObjSatVar2FindOrAdd( Pdr_Man_t * p, int k, Aig_Obj_t * pObj )
{
Vec_Int_t * vId2Vars = p->pvId2Vars + Aig_ObjId(pObj);
assert( p->pCnf2->pObj2Count[Aig_ObjId(pObj)] >= 0 );
if ( Vec_IntSize(vId2Vars) == 0 )
Vec_IntGrow(vId2Vars, 2 * k + 1);
if ( Vec_IntGetEntry(vId2Vars, k) == 0 )
{
sat_solver * pSat = Pdr_ManSolver(p, k);
Vec_Int_t * vVar2Ids = (Vec_Int_t *)Vec_PtrEntry(&p->vVar2Ids, k);
int iVarNew = Vec_IntSize( vVar2Ids );
assert( iVarNew > 0 );
Vec_IntPush( vVar2Ids, Aig_ObjId(pObj) );
Vec_IntWriteEntry( vId2Vars, k, iVarNew << 2 );
sat_solver_setnvars( pSat, iVarNew + 1 );
if ( k == 0 && Saig_ObjIsLo(p->pAig, pObj) ) // initialize the register output
{
int Lit = toLitCond( iVarNew, 1 );
int RetValue = sat_solver_addclause( pSat, &Lit, &Lit + 1 );
assert( RetValue == 1 );
(void) RetValue;
sat_solver_compress( pSat );
}
}
return Vec_IntEntry( vId2Vars, k );
}
ABC_NAMESPACE_IMPL_START
////////////////////////////////////////////////////////////////////////
/// DECLARATIONS ///
////////////////////////////////////////////////////////////////////////
////////////////////////////////////////////////////////////////////////
/// FUNCTION DEFINITIONS ///
////////////////////////////////////////////////////////////////////////
/**Function*************************************************************
Synopsis [Runs equivalence test for the two nodes.]
Description [Both nodes should be regular and different from each other.]
SideEffects []
SeeAlso []
***********************************************************************/
int Cgt_CheckImplication( Cgt_Man_t * p, Aig_Obj_t * pGate, Aig_Obj_t * pMiter )
{
int nBTLimit = p->pPars->nConfMax;
int pLits[2], RetValue, clk;
p->nCalls++;
// sanity checks
assert( p->pSat && p->pCnf );
assert( !Aig_IsComplement(pMiter) );
assert( Aig_Regular(pGate) != pMiter );
// solve under assumptions
// G => !M -- true G & M -- false
pLits[0] = toLitCond( p->pCnf->pVarNums[Aig_Regular(pGate)->Id], Aig_IsComplement(pGate) );
pLits[1] = toLitCond( p->pCnf->pVarNums[pMiter->Id], 0 );
clk = clock();
RetValue = sat_solver_solve( p->pSat, pLits, pLits + 2, (ABC_INT64_T)nBTLimit, (ABC_INT64_T)0, (ABC_INT64_T)0, (ABC_INT64_T)0 );
p->timeSat += clock() - clk;
if ( RetValue == l_False )
{
p->timeSatUnsat += clock() - clk;
pLits[0] = lit_neg( pLits[0] );
pLits[1] = lit_neg( pLits[1] );
RetValue = sat_solver_addclause( p->pSat, pLits, pLits + 2 );
assert( RetValue );
sat_solver_compress( p->pSat );
p->nCallsUnsat++;
return 1;
}
else if ( RetValue == l_True )
{
p->timeSatSat += clock() - clk;
p->nCallsSat++;
return 0;
}
else // if ( RetValue1 == l_Undef )
{
p->timeSatUndec += clock() - clk;
p->nCallsUndec++;
return -1;
}
return -2;
}
