Пример #1
0
int misc_init_r(void)
{
	serdes_corenet_t *srds_regs = (void *)CONFIG_SYS_FSL_CORENET_SERDES_ADDR;
	__maybe_unused ccsr_gur_t *gur;
	u32 actual[NUM_SRDS_BANKS];
	unsigned int i;
	u8 sw3;

	gur = (void *)(CONFIG_SYS_MPC85xx_GUTS_ADDR);
#ifdef CONFIG_SRIO1
	if (is_serdes_configured(SRIO1)) {
		set_next_law(CONFIG_SYS_RIO1_MEM_PHYS, LAW_SIZE_256M,
				LAW_TRGT_IF_RIO_1);
	} else {
		printf ("    SRIO1: disabled\n");
	}
#else
	setbits_be32(&gur->devdisr, FSL_CORENET_DEVDISR_SRIO1); /* disable */
#endif

#ifdef CONFIG_SRIO2
	if (is_serdes_configured(SRIO2)) {
		set_next_law(CONFIG_SYS_RIO2_MEM_PHYS, LAW_SIZE_256M,
				LAW_TRGT_IF_RIO_2);
	} else {
		printf ("    SRIO2: disabled\n");
	}
#else
	setbits_be32(&gur->devdisr, FSL_CORENET_DEVDISR_SRIO2); /* disable */
#endif

	/* Warn if the expected SERDES reference clocks don't match the
	 * actual reference clocks.  This needs to be done after calling
	 * p4080_erratum_serdes8(), since that function may modify the clocks.
	 */
	sw3 = in_8(&PIXIS_SW(3));
	actual[0] = (sw3 & 0x40) ?
		SRDS_PLLCR0_RFCK_SEL_125 : SRDS_PLLCR0_RFCK_SEL_100;
	actual[1] = (sw3 & 0x20) ?
		SRDS_PLLCR0_RFCK_SEL_156_25 : SRDS_PLLCR0_RFCK_SEL_125;
	actual[2] = (sw3 & 0x10) ?
		SRDS_PLLCR0_RFCK_SEL_156_25 : SRDS_PLLCR0_RFCK_SEL_125;

	for (i = 0; i < NUM_SRDS_BANKS; i++) {
		u32 expected = srds_regs->bank[i].pllcr0 & SRDS_PLLCR0_RFCK_SEL_MASK;
		if (expected != actual[i]) {
			printf("Warning: SERDES bank %u expects reference clock"
			       " %sMHz, but actual is %sMHz\n", i + 1,
			       serdes_clock_to_string(expected),
			       serdes_clock_to_string(actual[i]));
		}
	}

	return 0;
}
Пример #2
0
int misc_init_r(void)
{
    serdes_corenet_t *srds_regs = (void *)CONFIG_SYS_FSL_CORENET_SERDES_ADDR;
    u32 actual[NUM_SRDS_BANKS];
    unsigned int i;
    u8 sw;

#if defined(CONFIG_P3041DS) || defined(CONFIG_P5020DS) \
	|| defined(CONFIG_P5040DS)
    sw = in_8(&PIXIS_SW(5));
    for (i = 0; i < 3; i++) {
        unsigned int clock = (sw >> (6 - (2 * i))) & 3;
        switch (clock) {
        case 0:
            actual[i] = SRDS_PLLCR0_RFCK_SEL_100;
            break;
        case 1:
            actual[i] = SRDS_PLLCR0_RFCK_SEL_125;
            break;
        case 2:
            actual[i] = SRDS_PLLCR0_RFCK_SEL_156_25;
            break;
        default:
            printf("Warning: SDREFCLK%u switch setting of '11' is "
                   "unsupported\n", i + 1);
            break;
        }
    }
#else
    /* Warn if the expected SERDES reference clocks don't match the
     * actual reference clocks.  This needs to be done after calling
     * p4080_erratum_serdes8(), since that function may modify the clocks.
     */
    sw = in_8(&PIXIS_SW(3));
    actual[0] = (sw & 0x40) ?
                SRDS_PLLCR0_RFCK_SEL_125 : SRDS_PLLCR0_RFCK_SEL_100;
    actual[1] = (sw & 0x20) ?
                SRDS_PLLCR0_RFCK_SEL_156_25 : SRDS_PLLCR0_RFCK_SEL_125;
    actual[2] = (sw & 0x10) ?
                SRDS_PLLCR0_RFCK_SEL_156_25 : SRDS_PLLCR0_RFCK_SEL_125;
#endif

    for (i = 0; i < NUM_SRDS_BANKS; i++) {
        u32 expected = srds_regs->bank[i].pllcr0 & SRDS_PLLCR0_RFCK_SEL_MASK;
        if (expected != actual[i]) {
            printf("Warning: SERDES bank %u expects reference clock"
                   " %sMHz, but actual is %sMHz\n", i + 1,
                   serdes_clock_to_string(expected),
                   serdes_clock_to_string(actual[i]));
        }
    }

    return 0;
}
Пример #3
0
int misc_init_r(void)
{
	serdes_corenet_t *regs = (void *)CONFIG_SYS_FSL_CORENET_SERDES_ADDR;
	u32 expected[NUM_SRDS_BANKS] = {SRDS_PLLCR0_RFCK_SEL_100,
		SRDS_PLLCR0_RFCK_SEL_125};
	unsigned int i;

	/* check SERDES reference clocks */
	for (i = 0; i < NUM_SRDS_BANKS; i++) {
		u32 actual = in_be32(&regs->bank[i].pllcr0);
		actual &= SRDS_PLLCR0_RFCK_SEL_MASK;
		if (actual != expected[i]) {
			printf("Warning: SERDES bank %u expects reference \
			       clock %sMHz, but actual is %sMHz\n", i + 1,
			       serdes_clock_to_string(expected[i]),
			       serdes_clock_to_string(actual));
		}
	}

	return 0;
}