/**
* Init ISR (Interrupt service routine) for the timer.
*
* @param timer
* system timer id: use TIMER3, TIMER4 or TIMER5
* @param prescalar
* timer prescalar (1, 2, 4, 8, 16, 32, 64, 256),
* use constants: PRESCALAR_1, PRESCALAR_2, PRESCALAR_8,
* PRESCALAR_16, PRESCALAR_32, PRESCALAR_64, PRESCALAR_256
* @param period
* timer period - adjustment divider after timer prescaled.
*
* Example: to set timer clock period to 20ms (50 operations per second)
* use prescalar 1:64 (0x0060) and period=0x61A8:
* 80000000/64/50=25000=0x61A8
*
*/
void initTimerISR(int timer, int prescalar, int period) {
if(timer == TIMER3) {
// set the vector up
setIntVector(_TIMER_3_VECTOR, T3_IntHandler);
// set timer 3 clock period
T3CON = prescalar; // set prescalar
TMR3 = 0;
PR3 = period;
IFS0CLR = 0x1000;// Clear the T3 interrupt flag
IEC0SET = 0x1000;// Enable T3 interrupt
IPC3CLR = 0x0000001F;
IPC3SET = (_T3_IPL_IPC << 2) | _T3_SPL_IPC;
T3CONSET = 0x8000;// Enable Timer3
} else if(timer == TIMER4) {
// set the vector up
setIntVector(_TIMER_4_VECTOR, T4_IntHandler);
// set timer 4 clock period
T4CON = prescalar; // set prescalar
TMR4 = 0;
PR4 = period;
IFS0CLR = 0x10000;// Clear the T4 interrupt flag
IEC0SET = 0x10000;// Enable T4 interrupt
IPC4CLR = 0x0000001F;
IPC4SET = (_T4_IPL_IPC << 2) | _T4_SPL_IPC;
T4CONSET = 0x8000;// Enable Timer4
} else if(timer == TIMER5) {
// set the vector up
setIntVector(_TIMER_5_VECTOR, T5_IntHandler);
// set timer 5 clock period
T5CON = prescalar; // set prescalar
TMR5 = 0;
PR5 = period;
IFS0CLR = 0x100000;// Clear the T5 interrupt flag
IEC0SET = 0x100000;// Enable T5 interrupt
IPC5CLR = 0x0000001F;
IPC5SET = (_T5_IPL_IPC << 2) | _T5_SPL_IPC;
T5CONSET = 0x8000;// Enable Timer5
}
}
//************************************************************************
void tone(uint8_t _pin, unsigned int frequency, unsigned long duration)
{
// uint32_t tonePeriod;
uint8_t port;
// Should have an error check here for pin number out of range.
//* there is no standard on the number of pins. Since we want this to work on all versions of the PIC32
//* I have set it to 112 for now which is the largest I/O pin count on a pic32
if ((frequency > 0) && (_pin < (NUM_DIGITAL_PINS)))
{
// If a tone is currently playing on a different pin, the function is
// documented to have no effect. If playing on the same pin, change
// the frequency. If not currently playing, initialize the timer.
// This is currently hard coded to use timer1.
if (tone_pin == 255)
{
// No tone currently playing. Init the timer.
T1CON = TACON_PS_256;
setIntVector(_TIMER_1_VECTOR, Timer1Handler);
clearIntFlag(_TIMER_1_IRQ);
setIntPriority(_TIMER_1_VECTOR, _T1_IPL_IPC, _T1_SPL_IPC);
setIntEnable(_TIMER_1_IRQ);
}
else if (_pin != tone_pin)
{
// Tone currently playing on another pin. ignore this call.
return;
}
// Determine which port and bit are requested.
tone_pin = _pin;
port = digitalPinToPort(_pin);
tone_pin_port = (p32_ioport *)portRegisters(port);
tone_pin_mask = digitalPinToBitMask(_pin);
// Ensure that the pin is a digital output
pinMode(_pin, OUTPUT);
// Duration 0 means to play forever until stopped. Other values
// mean to play for that many milliseconds.
if (duration > 0)
{
timer1_toggle_count = (2 * frequency * duration) / 1000;
}
else
{
timer1_toggle_count = -1;
}
TMR1 = 0;
PR1 = ((__PIC32_pbClk / 256) / 2 / frequency);
T1CONSET = TACON_ON;
}
}
void RTCCClass::begin()
{
setIntVector(_RTCC_VECTOR, __RTCCInterrupt);
setIntPriority(_RTCC_VECTOR, 3, 0);
clearIntFlag(_RTCC_IRQ);
setIntEnable(_RTCC_IRQ);
/*Ensure the secondary oscillator is enabled and ready, i.e. OSCCON<1>=1, OSCCON<22>=1,
and RTCC write is enabled i.e. RTCWREN (RTCCON<3>) =1;*/
UNLOCK
RTCCONbits.RTCWREN = 1;
RTCCONbits.ON = 1;
OSCCONSET = 0x00400002;
LOCK
_validity = RTCC_VAL_NOT; // 0: very unsure!
}
const NWADP * GetMRF24GAdaptor(MACADDR *pUseThisMac, HRRHEAP hAdpHeap, IPSTATUS * pStatus)
{
// get our pins set up
WF_HIBERNATE_IO = 0;
WF_HIBERNATE_TRIS = 0;
WF_RESET_IO = 0;
WF_RESET_TRIS = 0;
// Enable the WiFi
WF_CS_IO = 1;
WF_CS_TRIS = 0;
WF_INT_TRIS = 1;
// register our interrupt vectors
setIntVector(WF_INT_VEC, _WFInterrupt);
setIntPriority(WF_INT_VEC, 3, 0);
if (hAdpHeap == NULL)
{
AssignStatusSafely(pStatus, ipsNoHeapGiven);
return(NULL);
}
AssignStatusSafely(pStatus, ipsSuccess);
wfmrf24.priv.initStatus = ForceIPStatus((InitMask | WF_INIT_ERROR_SPI_NOT_CONNECTED));
wfmrf24.priv.connectionStatus = ForceIPStatus((InitMask | WF_EVENT_INITIALIZATION));
wfmrf24.priv.cScanResults = -1;
wfmrf24.adpMRF24G.hAdpHeap = hAdpHeap;
wfmrf24.priv.pIpStackBeingTx = NULL;
memset(&wfmrf24.priv.ffptRead, 0, sizeof(FFPT));
memset(&wfmrf24.priv.ffptWrite, 0, sizeof(FFPT));
// save away our MAC
if (pUseThisMac != NULL)
{
memcpy(&wfmrf24.adpMRF24G.mac, pUseThisMac, sizeof(MACADDR));
}
else
{
memcpy(&wfmrf24.adpMRF24G.mac, &MACNONE, sizeof(MACADDR));
}
WF_Init();
return(&wfmrf24.adpMRF24G);
}
//************************************************************************
// PIC32 devices only support rising and falling edge triggered interrupts
// on the external interrupt pins. Only the RISING and FALLING modes are
// supported.
//************************************************************************
void attachInterrupt(uint8_t interruptNum, void (*userFunc)(void), int mode)
{
int edge;
if ((interruptNum < NUM_EXTERNAL_INTERRUPTS) && ((mode == FALLING)||(mode == RISING)))
{
intFunc[interruptNum] = userFunc;
#if defined(__PIC32MX1XX__) || defined(__PIC32MX2XX__) || defined(__PIC32MZXX__) || defined(__PIC32MX47X__)
/* For devices with peripheral pin select (PPS), it is necessary to
** map the input function to the pin. This is done by loading the
** PPS input select register for the specific interrupt with the value
** to select the pin that the interrupt is mapped to as defined by the
** board variant file.
*/
volatile uint32_t * pps;
uint8_t pin;
uint8_t sel;
if ((sel = externalIntToInputSelect(interruptNum)) != NOT_PPS_PIN)
{
pin = externalIntToDigitalPin(interruptNum);
pps = ppsInputRegister(sel);
*pps = ppsInputSelect(pin);
}
#endif
// The active edge is selected via the INTxEP bits in the INTCON register.
// A '0' bit selects falling edge, and a '1' bit select rising edge.
if (mode == FALLING)
{
edge = 0;
}
else
{
edge = 1;
}
#if defined(__PIC32MZXX__)
// Select the active edge, set the privilege and sub-privilege levels,
// and enable the interrupt.
switch (interruptNum)
{
case EXT_INT0:
setIntVector(_EXTERNAL_0_VECTOR, (isrFunc) ExtInt0Handler);
IEC0bits.INT0IE = 0;
IFS0bits.INT0IF = 0;
INTCONbits.INT0EP = edge;
IPC0bits.INT0IP = _INT0_IPL_IPC;
IPC0bits.INT0IS = _INT0_SPL_IPC;
IEC0bits.INT0IE = 1;
break;
case EXT_INT1:
setIntVector(_EXTERNAL_1_VECTOR, (isrFunc) ExtInt1Handler);
IEC0bits.INT1IE = 0;
IFS0bits.INT1IF = 0;
INTCONbits.INT1EP = edge;
IPC2bits.INT1IP = _INT1_IPL_IPC;
IPC2bits.INT1IS = _INT1_SPL_IPC;
IEC0bits.INT1IE = 1;
break;
case EXT_INT2:
setIntVector(_EXTERNAL_2_VECTOR, (isrFunc) ExtInt2Handler);
IEC0bits.INT2IE = 0;
IFS0bits.INT2IF = 0;
INTCONbits.INT2EP = edge;
IPC3bits.INT2IP = _INT2_IPL_IPC;
IPC3bits.INT2IS = _INT2_SPL_IPC;
IEC0bits.INT2IE = 1;
break;
case EXT_INT3:
setIntVector(_EXTERNAL_3_VECTOR, (isrFunc) ExtInt3Handler);
IEC0bits.INT3IE = 0;
IFS0bits.INT3IF = 0;
INTCONbits.INT3EP = edge;
IPC4bits.INT3IP = _INT3_IPL_IPC;
IPC4bits.INT3IS = _INT3_SPL_IPC;
IEC0bits.INT3IE = 1;
break;
case EXT_INT4:
setIntVector(_EXTERNAL_4_VECTOR, (isrFunc) ExtInt4Handler);
IEC0bits.INT4IE = 0;
IFS0bits.INT4IF = 0;
INTCONbits.INT4EP = edge;
IPC5bits.INT4IP = _INT4_IPL_IPC;
IPC5bits.INT4IS = _INT4_SPL_IPC;
IEC0bits.INT4IE = 1;
break;
}
#else
// Select the active edge, set the privilege and sub-privilege levels,
// and enable the interrupt.
switch (interruptNum)
{
case EXT_INT0:
setIntVector(_EXTERNAL_0_VECTOR, (isrFunc) ExtInt0Handler);
IEC0bits.INT0IE = 0;
IFS0bits.INT0IF = 0;
INTCONbits.INT0EP = edge;
IPC0bits.INT0IP = _INT0_IPL_IPC;
IPC0bits.INT0IS = _INT0_SPL_IPC;
IEC0bits.INT0IE = 1;
break;
case EXT_INT1:
setIntVector(_EXTERNAL_1_VECTOR, (isrFunc) ExtInt1Handler);
IEC0bits.INT1IE = 0;
IFS0bits.INT1IF = 0;
INTCONbits.INT1EP = edge;
IPC1bits.INT1IP = _INT1_IPL_IPC;
IPC1bits.INT1IS = _INT1_SPL_IPC;
IEC0bits.INT1IE = 1;
break;
case EXT_INT2:
setIntVector(_EXTERNAL_2_VECTOR, (isrFunc) ExtInt2Handler);
IEC0bits.INT2IE = 0;
IFS0bits.INT2IF = 0;
INTCONbits.INT2EP = edge;
IPC2bits.INT2IP = _INT2_IPL_IPC;
IPC2bits.INT2IS = _INT2_SPL_IPC;
IEC0bits.INT2IE = 1;
break;
case EXT_INT3:
setIntVector(_EXTERNAL_3_VECTOR, (isrFunc) ExtInt3Handler);
IEC0bits.INT3IE = 0;
IFS0bits.INT3IF = 0;
INTCONbits.INT3EP = edge;
IPC3bits.INT3IP = _INT3_IPL_IPC;
IPC3bits.INT3IS = _INT3_SPL_IPC;
IEC0bits.INT3IE = 1;
break;
case EXT_INT4:
setIntVector(_EXTERNAL_4_VECTOR, (isrFunc) ExtInt4Handler);
IEC0bits.INT4IE = 0;
IFS0bits.INT4IF = 0;
INTCONbits.INT4EP = edge;
IPC4bits.INT4IP = _INT4_IPL_IPC;
IPC4bits.INT4IS = _INT4_SPL_IPC;
IEC0bits.INT4IE = 1;
break;
}
#endif
}
}
/**
* Init ISR (Interrupt service routine) for the timer and start timer.
*
* Example: to set timer clock period to 20ms (50 operations per second == 50Hz) on 80MHz CPU
* use prescaler 1:64 (TIMER_PRESCALER_1_64) and adjustment=25000-1:
* 80000000/64/50=25000, minus 1 cause count from zero.
*
* Timer interrupt handler timer_handle_interrupts would be called every 20ms
* (50 times per second) in this case.
*
* @param timer
* system timer id: use TIMER_DEFAULT for default timer
* or _TIMER1, _TIMER2, _TIMER3, _TIMER4, TIMER5,
* _TIMER2_32BIT or _TIMER4_32BIT for specific timer.
* @param prescaler
* timer prescaler (1, 2, 4, 8, 16, 32, 64, 256),
* use constants: PRESCALER_1, PRESCALER_2, PRESCALER_8,
* PRESCALER_16, PRESCALER_32, PRESCALER_64, PRESCALER_256
* @param adjustment
* adjustment divider after timer prescaled - timer compare match value.
*/
void _timer_init_ISR(int timer, int prescaler, unsigned int adjustment) {
// See PIC32 family reference manual Section 14. Timers
if(timer == _TIMER1) {
// set the vector up
setIntVector(_TIMER_1_VECTOR, T1_IntHandler);
// set timer clock period
T1CONbits.TCKPS = prescaler; // set prescaler
TMR1 = 0; // clear timer register
PR1 = adjustment; // period register
// configure interrupt
IFS0bits.T1IF = 0; // clear interrupt flag
IEC0bits.T1IE = 1; // enable interrupt
IPC1CLR = 0x0000001F;
IPC1SET = (_T1_IPL_IPC << 2) | _T1_SPL_IPC;
// start timer
T1CONbits.ON = 1;
}
if(timer == _TIMER2) {
// set the vector up
setIntVector(_TIMER_2_VECTOR, T2_IntHandler);
// set timer clock period
T2CONbits.TCKPS = prescaler; // set prescaler
TMR2 = 0; // clear timer register
PR2 = adjustment; // period register
// configure interrupt
IFS0bits.T2IF = 0; // clear interrupt flag
IEC0bits.T2IE = 1; // enable interrupt
IPC2CLR = 0x0000001F;
IPC2SET = (_T2_IPL_IPC << 2) | _T2_SPL_IPC;
// start timer
T2CONbits.ON = 1;
}
if(timer == _TIMER3) {
// set the vector up
setIntVector(_TIMER_3_VECTOR, T3_IntHandler);
// set timer clock period
T3CONbits.TCKPS = prescaler; // set prescaler
TMR3 = 0; // clear timer register
PR3 = adjustment; // period register
// configure interrupt
IFS0bits.T3IF = 0; // clear interrupt flag
IEC0bits.T3IE = 1; // enable interrupt
IPC3CLR = 0x0000001F;
IPC3SET = (_T3_IPL_IPC << 2) | _T3_SPL_IPC;
// start timer
T3CONbits.ON = 1;
}
if(timer == _TIMER4) {
// set the vector up
setIntVector(_TIMER_4_VECTOR, T4_IntHandler);
// set timer clock period
T4CONbits.TCKPS = prescaler; // set prescaler
TMR4 = 0; // clear timer register
PR4 = adjustment; // period register
// configure interrupt
IFS0bits.T4IF = 0; // clear interrupt flag
IEC0bits.T4IE = 1; // enable interrupt
IPC4CLR = 0x0000001F;
IPC4SET = (_T4_IPL_IPC << 2) | _T4_SPL_IPC;
// start timer
T4CONbits.ON = 1;
}
if(timer == _TIMER5) {
// set the vector up
setIntVector(_TIMER_5_VECTOR, T5_IntHandler);
// set timer clock period
T5CONbits.TCKPS = prescaler; // set prescaler
TMR5 = 0; // clear timer register
PR5 = adjustment; // period register
// configure interrupt
IFS0bits.T5IF = 0; // clear interrupt flag
IEC0bits.T5IE = 1; // enable interrupt
IPC5CLR = 0x0000001F;
IPC5SET = (_T5_IPL_IPC << 2) | _T5_SPL_IPC;
// start timer
T5CONbits.ON = 1;
}
if(timer == _TIMER2_32BIT) {
// Timer2(32bit) == Timer2(16bit)+Timer3(16bit),
// Timer2 is a master timer, but interrupt flags come from Timer3
// set the vector up
setIntVector(_TIMER_3_VECTOR, T23_IntHandler);
// clear contents of the T2CON and T3CON registers
T2CON = 0x0; // stop 16-bit Timer2 and clear control register
T3CON = 0x0; // stop 16-bit Timer3 and clear control register
// set timer clock period on Timer2
T2CONbits.T32 = 1; // set 32-bit mode
T2CONbits.TCKPS = prescaler; // set prescaler
TMR2 = 0; // clear timer2 and timer3 registers
PR2 = adjustment; // period register (32-bit value)
// configure interrupt on Timer5
IPC3CLR = 0x0000001F;
IPC3SET = (_T3_IPL_IPC << 2) | _T3_SPL_IPC;
//IPC3SET = 0x00000004; // Set priority level = 1
//IPC3SET = 0x00000001; //Set sub-priority level = 1
// Can be done in a single operation by assigning
// IPC3SET = 0x00000005
IFS0bits.T3IF = 0; // clear the Timer3 interrupt status flag
IEC0bits.T3IE = 1; // enable Timer3 interrupts
// start Timer2+3
T2CONbits.ON = 1; // start Timer2+3
}
if(timer == _TIMER4_32BIT) {
// Timer4(32bit) == Timer4(16bit)+Timer5(16bit),
// Timer4 is a master timer, but interrupt flags come from Timer5
// set the vector up
setIntVector(_TIMER_5_VECTOR, T45_IntHandler);
// clear contents of the T4CON and T5CON registers
T4CON = 0x0; // stop 16-bit Timer4 and clear control register
T5CON = 0x0; // stop 16-bit Timer5 and clear control register
// set timer clock period on Timer4
T4CONbits.T32 = 1; // set 32-bit mode
T4CONbits.TCKPS = prescaler; // set prescaler
TMR4 = 0; // clear timer4 and timer5 registers
PR4 = adjustment; // period register (32-bit value)
// configure interrupt on Timer5
IPC5CLR = 0x0000001F;
IPC5SET = (_T5_IPL_IPC << 2) | _T5_SPL_IPC;
//IPC5SET = 0x00000004; // Set priority level = 1
//IPC5SET = 0x00000001; //Set sub-priority level = 1
// Can be done in a single operation by assigning
// IPC5SET = 0x00000005
IFS0bits.T5IF = 0; // clear the Timer5 interrupt status flag
IEC0bits.T5IE = 1; // enable Timer5 interrupts
// start Timer4+5
T4CONbits.ON = 1; // start Timer4+5
}
}
void LowPower_::snooze(unsigned long ms) {
uint32_t f_pb = getPeripheralClock();
if (switchToLPRC()) {
f_pb = 31250;
}
float baseclock = f_pb;
uint8_t ps = 0;
float f = 1.0 / (ms / 1000.0);
if (baseclock / f > 0xFFFFFFFF) {
baseclock = f_pb / 2;
ps = 1;
}
if (baseclock / f > 0xFFFFFFFF) {
baseclock = f_pb / 4;
ps = 2;
}
if (baseclock / f > 0xFFFFFFFF) {
baseclock = f_pb / 8;
ps = 3;
}
if (baseclock / f > 0xFFFFFFFF) {
baseclock = f_pb / 8;
ps = 3;
}
if (baseclock / f > 0xFFFFFFFF) {
baseclock = f_pb / 16;
ps = 4;
}
if (baseclock / f > 0xFFFFFFFF) {
baseclock = f_pb / 32;
ps = 5;
}
if (baseclock / f > 0xFFFFFFFF) {
baseclock = f_pb / 64;
ps = 6;
}
if (baseclock / f > 0xFFFFFFFF) {
baseclock = f_pb / 256;
ps = 7;
}
uint32_t tcon4 = T4CON;
uint32_t tpr4 = PR4;
uint32_t tmr4 = TMR4;
uint32_t tcon5 = T5CON;
uint32_t tpr5 = PR5;
uint32_t tmr5 = TMR5;
int ipl;
int spl;
T4CON = 0;
T5CON = 0;
T4CONbits.TCKPS = ps;
T4CONbits.T32 = 1;
uint32_t pr = baseclock / f;
PR4 = pr & 0xFFFF;
PR5 = pr >> 16;
isrFunc origIsr = setIntVector(_TIMER_5_VECTOR, _timerWakeup);
getIntPriority(_TIMER_5_VECTOR, &ipl, &spl);
setIntPriority(_TIMER_5_VECTOR, 5, 0);
int en = setIntEnable(_TIMER_5_IRQ);
clearIntFlag(_TIMER_5_IRQ);
TMR4 = 0;
TMR5 = 0;
// If we're going to do this we need to ensure the two timers are enabled!
enableTimer4();
enableTimer5();
int cten = clearIntEnable(_CORE_TIMER_IRQ);
T4CONbits.TON = 1;
enterIdleMode();
restoreIntEnable(_CORE_TIMER_IRQ, cten);
T4CONbits.TON = 0;
setIntPriority(_TIMER_5_VECTOR, ipl, spl);
setIntVector(_TIMER_5_VECTOR, origIsr);
restoreIntEnable(_TIMER_5_IRQ, en);
T5CON = tcon5;
PR5 = tpr5;
TMR5 = tmr5;
T4CON = tcon4;
PR4 = tpr4;
TMR4 = tmr4;
restoreSystemClock();
}
void CC3GLSLUniform::setIntVector( const CC3IntVector& value )
{
setIntVector( value, 0 );
}
void VGA::initializeDevice() {
_vgaDevice = this;
if (_hsync_pin == 0 || _vsync_pin == 0) {
return;
}
memset((void *)_buffer0, 0, ((Width/8)+1) * Height);
#if VGA_USE_DOUBLE_BUFFER
memset((void *)_buffer1, 0, ((Width/8)+1) * Height);
bufferNumber = 0;
activeBuffer = _buffer0;
vgaBuffer = _buffer1;
#else
bufferNumber = 0;
activeBuffer = _buffer0;
vgaBuffer = _buffer0;
#endif
_hsync_port->tris.clr = _hsync_pin;
_vsync_port->tris.clr = _vsync_pin;
// First we need to set up a timer that will trigger at the different times.
T2CONbits.TCKPS = 0; // No prescaler
PR2 = 0xFFFF;
setIntVector(_TIMER_2_VECTOR, vgaProcess);
setIntPriority(_TIMER_2_VECTOR, 6, 0);
clearIntFlag(_TIMER_2_IRQ);
setIntEnable(_TIMER_2_IRQ);
// Now congfigure SPI4 for display data transmission.
SPI4CON = 0;
SPI4CONbits.MSTEN = 1;
SPI4CONbits.STXISEL = 0b11; // Interrupt when one byte in buffer
#if VGA_USE_HI_RES
SPI4BRG = 0; // This will set how big each pixel is.
#else
SPI4BRG = 1; // This will set how big each pixel is.
#endif
SPI4CONbits.ON = 1;
// And now a DMA channel for transferring the data
DCH0SSA = ((unsigned int)vgaBuffer) & 0x1FFFFFFF;
DCH0DSA = ((unsigned int)&SPI4BUF) & 0x1FFFFFFF;
DCH0SSIZ = (Width / 8) + 1;
DCH0DSIZ = 1;
DCH0CSIZ = 1;
DCH0ECONbits.SIRQEN = 1;
DCH0ECONbits.CHSIRQ = _SPI4_TX_IRQ;
DCH0CONbits.CHAEN = 0;
DCH0CONbits.CHEN = 0;
DCH0CONbits.CHPRI = 3;
vgaVsyncPort = _vsync_port;
vgaHsyncPort = _hsync_port;
vgaVsyncMask = _vsync_pin;
vgaHsyncMask = _hsync_pin;
vgaWidth = (Width/8) + 1;
vgaHeight = Height;
vgaBufSize = vgaWidth * vgaHeight;
clearIntEnable(_CORE_TIMER_IRQ);
// setIntPriority(_CORE_TIMER_VECTOR, 5, 0);
VSYNC_OFF
HSYNC_OFF
DMACONbits.ON = 1;
T2CONbits.ON = 1; // Turn on the timer
}
DTWI::DTWI(p32_i2c * ptwiC, uint8_t irqBusC, uint8_t vecC, uint8_t iplC, uint8_t splC, uint8_t pinSCLC, uint8_t pinSDAC)
{
int bnIRQ = (irqBusC % 32); // IE and IF bit locations
uint32_t bmI2C = 0;
// make sure we don't assert a stop condition
fStop = false;
fMasterMode = false; // slave mode is sort of always on
// clear IO buffers
iReadNext = 0;
iReadLast = 0;
iWriteNext = 0;
iWriteLast = 0;
addr = addrGenCall;
iSession = 0;
// passed in values
ptwi = ptwiC;
ptwi->ixCon.reg = 0; // make sure the I2C device is OFF
irqBus = irqBusC;
vec = vecC;
ipl = iplC;
spl = splC;
pinSCL = pinSCLC;
pinSDA = pinSDAC;
// set priority and sub priority
setIntPriority(vec, ipl, spl);
// MZ has 2 more vectors to worry about
#if defined(__PIC32MZXX__)
// the MZ part works off of offset tables
// We are given the BUS VEC, and we must fill in the
// the SLAVE and MASTER VECs as well
setIntVector(vec+1, getIntVector(vec));
setIntVector(vec+2, getIntVector(vec));
// and set the priorities for the other 2 vectors.
setIntPriority(vec+1, ipl, spl);
setIntPriority(vec+2, ipl, spl);
#endif
// calculated values
pregIfs = (((p32_regset *)&IFS0) + (irqBus / 32));
pregIec = (((p32_regset *)&IEC0) + (irqBus / 32));
bitB = (I2C_BUS_COLLISION_EVENT) << bnIRQ;
bitMASK = 0;
bmI2C = bitB | (bitB << shiftSlave) | (bitB << shiftMaster);
// Disable the interrupt because we don't want to call this until after the begin()
pregIec->clr = bmI2C;
// Clear the interrupt flags
pregIfs->clr = bmI2C;
// init the state machine state
curState = I2C_IDLE;
// put a default of 100KHz
// use F_CPU because __PIC32_pbClk is not set up yet
// as constructor run before MPIDE Init; however, this would be the correct
// value at this point as noone has the chance to change the clock freq
// later we can use __PIC32_pbClk; which is used in masterStart
ptwi->ixBrg.reg = (F_CPU/FQ100KHz/2) - (((F_CPU / 10000000) * 26) / 25) - 2;
// put the slave general call address
ptwi->ixAdd.reg = addrGenCall;
ptwi->ixCon.reg = 0; // turn everything OFF
ptwi->ixStat.reg = 0; // clear the status bits as well
}
void HardwareSerial::begin(unsigned long baudRate, uint8_t address) {
/* Initialize the receive buffer.
*/
purge();
#if defined(__PIC32_PPS__)
// set the pins to digital, just in case they
// are analog pins. The serial controller will not
// set these to digital.
pinMode(pinTx, INPUT); // let serial controller set as output, keep tri-stated for now.
pinMode(pinRx, INPUT);
/* Map the UART TX to the appropriate pin.
*/
mapPps(pinTx, ppsTx);
/* Map the UART RX to the appropriate pin.
*/
mapPps(pinRx, ppsRx);
// the only UART on a non-PPS MX that conflicts with an analog
// pin is UART5 on MX 5,6,& 7 64 pin parts only.
#elif __PIC32_PINS__ == 64 && (defined(__PIC32MX5XX__) || defined(__PIC32MX6XX__) || defined(__PIC32MX7XX__))
// see if this is UART5
if(uart == ((p32_uart *) _UART5_BASE_ADDRESS))
{
// RB8 is AN8 & U5RX
// RB14 is AN14 & U5TX
// set as digital pins
AD1PCFGbits.PCFG8 = 1;
AD1PCFGbits.PCFG14 = 1;
}
#endif
setIntVector(vec, isr);
/* Set the interrupt privilege level and sub-privilege level
*/
setIntPriority(vec, ipl, spl);
// MZ has 2 more vectors to worry about
#if defined(__PIC32MZXX__)
// the MZ part works off of offset tables
// we must fill in the tx and rx VECs to point
// to the ERR VEC so all 3 VECs use the same ISR
setIntVector(vec+1, isr);
setIntVector(vec+2, isr);
// and set the priorities for the other 2 vectors.
setIntPriority(vec+1, ipl, spl);
setIntPriority(vec+2, ipl, spl);
#endif
/* Clear the interrupt flags, and set the interrupt enables for the
** interrupts used by this UART.
*/
ifs->clr = bit_rx + bit_tx + bit_err; //clear all interrupt flags
iec->clr = bit_rx + bit_tx + bit_err; //disable all interrupts
iec->set = bit_rx; //enable rx interrupts
/* Initialize the UART itself.
** http://www.chipkit.org/forum/viewtopic.php?f=7&t=213&p=948#p948
** Use high baud rate divisor for bauds over LOW_HIGH_BAUD_SPLIT
*/
uart->uxMode.reg = 0;
uart->uxSta.reg = 0;
if (baudRate < LOW_HIGH_BAUD_SPLIT) {
// calculate actual BAUD generate value.
uart->uxBrg.reg = ((__PIC32_pbClk / 16 / baudRate) - 1);
// set to 9 data bits, no parity
uart->uxMode.set = 0b11 << _UARTMODE_PDSEL;
} else {
// calculate actual BAUD generate value.
uart->uxBrg.reg = ((__PIC32_pbClk / 4 / baudRate) - 1);
// set to 9 data bits, no parity
uart->uxMode.set = (1 << _UARTMODE_BRGH) + (0b11 << _UARTMODE_PDSEL);
}
// set address of RS485 slave, enable transmitter and receiver and auto address detection
uart->uxSta.set = (1 << _UARTSTA_ADM_EN) + (address << _UARTSTA_ADDR) + (1 << _UARTSTA_UTXEN) + (1 << _UARTSTA_URXEN);
enableAddressDetection(); // enable auto address detection
uart->uxMode.set = 1 << _UARTMODE_ON; // enable UART module
}
void
DSPI::begin(uint8_t pinT) {
p32_regset * pregIpc;
int bnVec;
uint8_t bTmp;
uint16_t brg;
#if defined(__PIC32MX1XX__) || defined(__PIC32MX2XX__) || defined(__PIC32MZXX__) || defined(__PIC32MX47X__)
/* Map the SPI MISO to the appropriate pin. Some chips need the
pins to be set to the right mode, either for the IO functionality
or to disable any analog on the pin.
*/
pinMode(pinMISO, INPUT);
mapPps(pinMISO, ppsMISO);
/* Map the SPI MOSI to the appropriate pin.
*/
pinMode(pinMOSI, OUTPUT);
mapPps(pinMOSI, ppsMOSI);
#endif
// set up the interrupt handler
setIntVector(vec, isr);
/* Initialize the pins. The pin directions for SDO, SDI and SCK
** are set automatically when the SPI controller is enabled. The
** SS pin isn't explicitly used by the SPI controller when in
** master mode, so we need to initialize it ourselves.
*/
setPinSelect(pinT);
/* Disable interrupts on this SPI controller.
*/
pregIec->clr = bitErr + bitRx + bitTx;
/* Disable and reset the SPI controller.
*/
pspi->sxCon.reg = 0;
/* Clear the receive buffer.
*/
bTmp = pspi->sxBuf.reg;
/* Clear all SPI interrupt flags.
*/
pregIfs->clr = bitErr + bitRx + bitTx;
/* Compute the address of the interrupt priority control register
** used by this SPI controller.
*/
pregIpc = ((p32_regset *)&IPC0) + (vec / 4); // interrupt priority control register
/* Compute the bit position of the interrupt priority bits for
** this interrupt vector.
*/
bnVec = 8 * (vec % 4);
/* Set the interrupt priority and sub-priority bits.
** The interrupt priorty control register address and the priority bits
** can be computed from the vector number. Each IPC register contains the
** the priority bits for four vectors. Each byte of an IPC registger contains
** the priority and sub-priority bits arranged such that bits 0-1 are
** the sub-priority, bits 2-4 the priority, and bits 5-7 unused.
*/
pregIpc->clr = (0x1F << bnVec);
pregIpc->set = ipl << bnVec;
/* Set the default baud rate.
*/
brg = (uint16_t)((__PIC32_pbClk / (2 * _DSPI_SPD_DEFAULT)) - 1);
pspi->sxBrg.reg = brg;
/* Clear the receive overflow bit and receive overflow error flag
*/
pspi->sxStat.clr = (1 << _SPISTAT_SPIROV);
fRov = 0;
/* Enable the SPI controller.
** Warning: if the SS pin ever becomes a LOW INPUT then SPI
** automatically switches to Slave, so the data direction of
** the SS pin MUST be kept as OUTPUT.
*/
pspi->sxCon.reg = 0;
pspi->sxCon.set = (1 << _SPICON_ON) + (1 << _SPICON_MSTEN) + DSPI_MODE0;
}
void initISR(int timer)
{
#if defined(__PIC32MX1XX__) || defined(__PIC32MX2XX__)
// 40000000 / 32 / 25000 = 50 => 20ms
uint8_t tckps = 0b101; // set prescalar 1:32
uint16_t prx = 0x61A8; // 25000
#elif defined(__PIC32MZXX__)
// 200000000 / PB3(usually == 2) / 64 / 31250 = 50 => 20ms
uint8_t tckps = 0b110; // set prescalar 1:64
uint16_t prx = F_CPU / (PB3DIV + 1) / 64 / 50;
#else
// 80000000 / 64 / 25000 = 50 => 20ms
uint8_t tckps = 0b110; // set prescalar 1:64
uint16_t prx = 0x61A8; // 25000
#endif
if(timer == TIMER3)
{
// set the vector up
setIntVector(_TIMER_3_VECTOR, T3_IntHandler);
//timer 3 set clock period 20ms
T3CONbits.TCKPS = tckps;
TMR3 = 0;
PR3 = prx;
IFS0bits.T3IF = 0;// Clear the T3 interrupt flag
IEC0bits.T3IE = 1;// Enable T3 interrupt
IPC3CLR = 0x0000001F;
IPC3SET = (_T3_IPL_IPC << 2) | _T3_SPL_IPC;
T3CONbits.ON = 1;// Enable Timer3
}
if(timer == TIMER4)
{
// set the vector up
setIntVector(_TIMER_4_VECTOR, T4_IntHandler);
//timer 4 set clock period 20ms
T4CONbits.TCKPS = tckps;
TMR4 = 0;
PR4 = prx;
IFS0bits.T4IF = 0;// Clear the T4 interrupt flag
IEC0bits.T4IE = 1;// Enable T4 interrupt
IPC4CLR = 0x0000001F;
IPC4SET = (_T4_IPL_IPC << 2) | _T4_SPL_IPC;
T4CONbits.ON = 1;// Enable Timer4
}
if(timer == TIMER5)
{
// set the vector up
setIntVector(_TIMER_5_VECTOR, T5_IntHandler);
//timer 5 set clock period 20ms
T5CONbits.TCKPS = tckps;
TMR5 = 0;
PR5 = prx;
IFS0bits.T5IF = 0;// Clear the T5 interrupt flag
IEC0bits.T5IE = 1;// Enable T5 interrupt
IPC5CLR = 0x0000001F;
IPC5SET = (_T5_IPL_IPC << 2) | _T5_SPL_IPC;
T5CONbits.ON = 1;// Enable Timer5
}
}
