// ----------------------------------------------------------------------------
void
xpcc::stm32::Timer1::setMode(Mode mode, SlaveMode slaveMode,
SlaveModeTrigger slaveModeTrigger, MasterMode masterMode
#if defined(STM32F3XX)
, MasterMode2 masterMode2
#endif /* defined(STM32F3XX) */
)
{
// disable timer
TIM1->CR1 = 0;
TIM1->CR2 = 0;
if (slaveMode == SLAVE_ENCODER_1 || slaveMode == SLAVE_ENCODER_2 || slaveMode == SLAVE_ENCODER_3)
{
setPrescaler(1);
}
// ARR Register is buffered, only Under/Overflow generates update interrupt
TIM1->CR1 = TIM_CR1_ARPE | TIM_CR1_URS | mode;
#if defined(STM32F3XX)
TIM1->CR2 = masterMode | masterMode2;
#else
TIM1->CR2 = masterMode;
#endif
TIM1->SMCR = slaveMode|slaveModeTrigger;
}
/**
* \brief Initialize and enable the A/D converter
*
* Available on all ATmegas.
*/
static inline void
initialize(Reference referenceVoltage,
Prescaler prescaler)
{
setReferenceVoltage(referenceVoltage);
setPrescaler(prescaler);
setEnableAdc(true);
}
void
evgMxc::setFrequency(epicsFloat64 freq) {
epicsUInt32 clkSpeed = (epicsUInt32)(getFrequency() *
pow(10.0, 6));
epicsUInt32 preScaler = (epicsUInt32)((epicsFloat64)clkSpeed / freq);
setPrescaler(preScaler);
}
// ----------------------------------------------------------------------------
uint16_t
xpcc::stm32::Timer1::setPeriod(uint32_t microseconds, bool autoApply)
{
// This will be inaccurate for non-smooth frequencies (last six digits
// unequal to zero)
uint32_t cycles = microseconds * (
((STM32_APB2_FREQUENCY==STM32_AHB_FREQUENCY)?1:2) *
STM32_APB2_FREQUENCY / 1000000UL);
uint16_t prescaler = (cycles + 65535) / 65536; // always round up
uint16_t overflow = cycles / prescaler;
overflow = overflow - 1; // e.g. 36000 cycles are from 0 to 35999
setPrescaler(prescaler);
setOverflow(overflow);
if (autoApply) {
// Generate Update Event to apply the new settings for ARR
TIM1->EGR |= TIM_EGR_UG;
}
return overflow;
}
void Timeout::start(){
noInterrupts();
setPrescaler(prescaler);
interrupts();
}
void Timeout::kill(){
setPrescaler(0);
}
