Пример #1
0
int64_t arm7_cpu_device::saturate_qbit_overflow(int64_t res)
{
	if (res > 2147483647)   // INT32_MAX
	{   // overflow high? saturate and set Q
		res = 2147483647;
		set_cpsr(GET_CPSR | Q_MASK);
	}
	else if (res < (-2147483647-1)) // INT32_MIN
	{   // overflow low? saturate and set Q
		res = (-2147483647-1);
		set_cpsr(GET_CPSR | Q_MASK);
	}

	return res;
}
Пример #2
0
cpu_t restore_fiq(cpu_t old_cpsr)
{
	cpu_t cpsr;
	cpsr = get_cpsr();
	set_cpsr( (cpsr & ~FIQ_MASK) | (old_cpsr & FIQ_MASK) );
	return cpsr;
}
Пример #3
0
cpu_t enable_fiq(void)
{
	cpu_t cpsr;
	cpsr = get_cpsr();
	set_cpsr(cpsr & ~FIQ_MASK);
	return cpsr;
}
Пример #4
0
cpu_t disable_fiq(void)
{
	cpu_t cpsr;
	cpsr = get_cpsr();
	set_cpsr(cpsr | FIQ_MASK);
	return cpsr;
}
Пример #5
0
cpu_t restore_irq(cpu_t old_cpsr)
{
	cpu_t cpsr;
	cpsr = get_cpsr();
	set_cpsr( (cpsr & ~IRQ_MASK) | (old_cpsr & IRQ_MASK) );
	return cpsr;
}
Пример #6
0
cpu_t enable_irq(void)
{
	cpu_t cpsr;
	cpsr = get_cpsr();
	set_cpsr(cpsr & ~IRQ_MASK);
	return cpsr;
}
Пример #7
0
cpu_t disable_irq(void)
{
	cpu_t cpsr;
	cpsr = get_cpsr();
	set_cpsr(cpsr | IRQ_MASK);
	return cpsr;
}
Пример #8
0
int start_kernel(int argc, char *argv[])
{
	int i;
	int rc;
	int reg[16];
	int cpsr;
	const int timer_irq = 49;

	cpsr = get_cpsr();
	cpsr &= ~(1<<6 | 1<<7); /* enable irq & fiq */
	cpsr = set_cpsr(cpsr);

	printk("starting kernel...\n");

	printk("starting timer1...\n");
	avic_init_irq((void *)0x80000000, 128);
	mxs_enable_fiq_functionality(1);

	icoll_unmask_irq(timer_irq);



	start_timer(0, 0, 0, 0);


	waitMsec(1000);

	printk("CPSR: [%08X]\n", getcpsr());
	getr(reg);

	for(i=0; i<16; i++){
		printk("register [%d]: [%X]\n", i, reg[i]);
	}
	printk("Hello World!\n");

	while(1) {
		printk("E");
		waitMsec(1000);
	}
	return 0;
}
int cycle(ARMSIM_CTX *ctx){
    as_log(ctx, "Entering cycle\n",0);
    if(ctx->irq != 0 && can_irq(ctx->registers)){
        unsigned int irq_ret = get_effective_pc(ctx) + 4;
        if(ctx->log_hook_defined != 0){
            as_log(ctx, "----------------------------------------------------------------------------------------", 0);
            char * string1 = (char*)malloc(sizeof(char)*LOG_STRING_LENGTH);
            sprintf(string1, "!!!! IRQ: ePC=%#010x, tPC=%#010x !!!!", get_effective_pc(ctx), get_register(ctx->registers, AR_r15));
            as_log(ctx, string1, 0);
            free(string1);
            char * string2 = (char*)malloc(sizeof(char)*LOG_STRING_LENGTH);
            char * instruction_string = instruction_to_string(master_decode(irq_ret - 4, get_word_from_memory(ctx, irq_ret - 4)));
            sprintf(string2, "???? Effective IRQ return: %s ????", instruction_string);
            as_log(ctx, string2, 0);
            free(string2);
        }
        set_mode(ctx->registers, AM_IRQ);
        set_cpsr(ctx->registers, get_cpsr(ctx->registers) | 0xC0);
        set_register(ctx->registers, AR_r14, irq_ret);
        branch_cpu(ctx, 0x00000018);
        ctx->irq = 0;

    }

    ctx-> per = as_execute_instruction(ctx, ctx->pdr);

    ctx->pdr = as_decode_instruction(ctx, ctx->pfr_address, ctx->pfr_instruction);

    ARM_ADDRESS * address = (ARM_ADDRESS*)malloc(sizeof(ARM_ADDRESS));
    ctx->pfr_instruction = fetch_instruction(ctx, address);
    ctx->pfr_address = *address;
    free(address);
    if(ctx->per != 0) {
        ctx->steps += 1;
        if (ctx->trace_hook_defined != 0) {
            cpu_trace(ctx, ctx->per);
        }
    }
    as_log(ctx, "Leaving cycle\n",0);
    return (ctx->per != 0);
}
Пример #10
0
void arm7_cpu_device::SwitchMode(UINT32 cpsr_mode_val)
{
	UINT32 cspr = m_r[eCPSR] & ~MODE_FLAG;
	set_cpsr(cspr | cpsr_mode_val);
}
Пример #11
0
void arm7_cpu_device::SwitchMode(uint32_t cpsr_mode_val)
{
	uint32_t cspr = m_r[eCPSR] & ~MODE_FLAG;
	set_cpsr(cspr | cpsr_mode_val);
}