static void
i386_darwin_init_abi (struct gdbarch_info info, struct gdbarch *gdbarch)
{
struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
/* We support the SSE registers. */
tdep->num_xmm_regs = I386_NUM_XREGS - 1;
set_gdbarch_num_regs (gdbarch, I386_SSE_NUM_REGS);
dwarf2_frame_set_signal_frame_p (gdbarch, darwin_dwarf_signal_frame_p);
set_gdbarch_push_dummy_call (gdbarch, i386_darwin_push_dummy_call);
tdep->struct_return = reg_struct_return;
tdep->sigtramp_p = i386_sigtramp_p;
tdep->sigcontext_addr = i386_darwin_sigcontext_addr;
tdep->sc_reg_offset = i386_darwin_thread_state_reg_offset;
tdep->sc_num_regs = i386_darwin_thread_state_num_regs;
tdep->jb_pc_offset = 48;
/* Although the i387 extended floating-point has only 80 significant
bits, a `long double' actually takes up 128, probably to enforce
alignment. */
set_gdbarch_long_double_bit (gdbarch, 128);
set_solib_ops (gdbarch, &darwin_so_ops);
}
static void
rs6000_lynx178_init_osabi (struct gdbarch_info info, struct gdbarch *gdbarch)
{
set_gdbarch_push_dummy_call (gdbarch, rs6000_lynx178_push_dummy_call);
set_gdbarch_return_value (gdbarch, rs6000_lynx178_return_value);
set_gdbarch_long_double_bit (gdbarch, 8 * TARGET_CHAR_BIT);
}
static struct gdbarch *
m88k_gdbarch_init (struct gdbarch_info info, struct gdbarch_list *arches)
{
struct gdbarch *gdbarch;
/* If there is already a candidate, use it. */
arches = gdbarch_list_lookup_by_info (arches, &info);
if (arches != NULL)
return arches->gdbarch;
/* Allocate space for the new architecture. */
gdbarch = gdbarch_alloc (&info, NULL);
/* There is no real `long double'. */
set_gdbarch_long_double_bit (gdbarch, 64);
set_gdbarch_long_double_format (gdbarch, floatformats_ieee_double);
set_gdbarch_num_regs (gdbarch, M88K_NUM_REGS);
set_gdbarch_register_name (gdbarch, m88k_register_name);
set_gdbarch_register_type (gdbarch, m88k_register_type);
/* Register numbers of various important registers. */
set_gdbarch_sp_regnum (gdbarch, M88K_R31_REGNUM);
set_gdbarch_pc_regnum (gdbarch, M88K_SXIP_REGNUM);
/* Core file support. */
set_gdbarch_regset_from_core_section
(gdbarch, m88k_regset_from_core_section);
set_gdbarch_print_insn (gdbarch, print_insn_m88k);
set_gdbarch_skip_prologue (gdbarch, m88k_skip_prologue);
/* Stack grows downward. */
set_gdbarch_inner_than (gdbarch, core_addr_lessthan);
/* Call dummy code. */
set_gdbarch_push_dummy_call (gdbarch, m88k_push_dummy_call);
set_gdbarch_dummy_id (gdbarch, m88k_dummy_id);
/* Return value info. */
set_gdbarch_return_value (gdbarch, m88k_return_value);
set_gdbarch_addr_bits_remove (gdbarch, m88k_addr_bits_remove);
set_gdbarch_breakpoint_from_pc (gdbarch, m88k_breakpoint_from_pc);
set_gdbarch_unwind_pc (gdbarch, m88k_unwind_pc);
set_gdbarch_write_pc (gdbarch, m88k_write_pc);
frame_base_set_default (gdbarch, &m88k_frame_base);
frame_unwind_append_unwinder (gdbarch, &m88k_frame_unwind);
return gdbarch;
}
static void
amd64_windows_init_abi (struct gdbarch_info info, struct gdbarch *gdbarch)
{
struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
/* The dwarf2 unwinder (appended very early by i386_gdbarch_init) is
preferred over the SEH one. The reasons are:
- binaries without SEH but with dwarf2 debug info are correcly handled
(although they aren't ABI compliant, gcc before 4.7 didn't emit SEH
info).
- dwarf3 DW_OP_call_frame_cfa is correctly handled (it can only be
handled if the dwarf2 unwinder is used).
The call to amd64_init_abi appends default unwinders, that aren't
compatible with the SEH one.
*/
frame_unwind_append_unwinder (gdbarch, &amd64_windows_frame_unwind);
amd64_init_abi (info, gdbarch);
windows_init_abi (info, gdbarch);
/* On Windows, "long"s are only 32bit. */
set_gdbarch_long_bit (gdbarch, 32);
/* Function calls. */
set_gdbarch_push_dummy_call (gdbarch, amd64_windows_push_dummy_call);
set_gdbarch_return_value (gdbarch, amd64_windows_return_value);
set_gdbarch_skip_main_prologue (gdbarch, amd64_skip_main_prologue);
set_gdbarch_skip_trampoline_code (gdbarch,
amd64_windows_skip_trampoline_code);
set_gdbarch_skip_prologue (gdbarch, amd64_windows_skip_prologue);
set_gdbarch_auto_wide_charset (gdbarch, amd64_windows_auto_wide_charset);
}
static struct gdbarch *
sparc32_gdbarch_init (struct gdbarch_info info, struct gdbarch_list *arches)
{
struct gdbarch_tdep *tdep;
struct gdbarch *gdbarch;
/* If there is already a candidate, use it. */
arches = gdbarch_list_lookup_by_info (arches, &info);
if (arches != NULL)
return arches->gdbarch;
/* Allocate space for the new architecture. */
tdep = XMALLOC (struct gdbarch_tdep);
gdbarch = gdbarch_alloc (&info, tdep);
tdep->pc_regnum = SPARC32_PC_REGNUM;
tdep->npc_regnum = SPARC32_NPC_REGNUM;
tdep->gregset = NULL;
tdep->sizeof_gregset = 0;
tdep->fpregset = NULL;
tdep->sizeof_fpregset = 0;
tdep->plt_entry_size = 0;
tdep->step_trap = sparc_step_trap;
set_gdbarch_long_double_bit (gdbarch, 128);
set_gdbarch_long_double_format (gdbarch, &floatformat_sparc_quad);
set_gdbarch_num_regs (gdbarch, SPARC32_NUM_REGS);
set_gdbarch_register_name (gdbarch, sparc32_register_name);
set_gdbarch_register_type (gdbarch, sparc32_register_type);
set_gdbarch_num_pseudo_regs (gdbarch, SPARC32_NUM_PSEUDO_REGS);
set_gdbarch_pseudo_register_read (gdbarch, sparc32_pseudo_register_read);
set_gdbarch_pseudo_register_write (gdbarch, sparc32_pseudo_register_write);
/* Register numbers of various important registers. */
set_gdbarch_sp_regnum (gdbarch, SPARC_SP_REGNUM); /* %sp */
set_gdbarch_pc_regnum (gdbarch, SPARC32_PC_REGNUM); /* %pc */
set_gdbarch_fp0_regnum (gdbarch, SPARC_F0_REGNUM); /* %f0 */
/* Call dummy code. */
set_gdbarch_call_dummy_location (gdbarch, ON_STACK);
set_gdbarch_push_dummy_code (gdbarch, sparc32_push_dummy_code);
set_gdbarch_push_dummy_call (gdbarch, sparc32_push_dummy_call);
set_gdbarch_return_value (gdbarch, sparc32_return_value);
set_gdbarch_stabs_argument_has_addr
(gdbarch, sparc32_stabs_argument_has_addr);
set_gdbarch_skip_prologue (gdbarch, sparc32_skip_prologue);
/* Stack grows downward. */
set_gdbarch_inner_than (gdbarch, core_addr_lessthan);
set_gdbarch_breakpoint_from_pc (gdbarch, sparc_breakpoint_from_pc);
set_gdbarch_frame_args_skip (gdbarch, 8);
set_gdbarch_print_insn (gdbarch, print_insn_sparc);
set_gdbarch_software_single_step (gdbarch, sparc_software_single_step);
set_gdbarch_write_pc (gdbarch, sparc_write_pc);
set_gdbarch_unwind_dummy_id (gdbarch, sparc_unwind_dummy_id);
set_gdbarch_unwind_pc (gdbarch, sparc_unwind_pc);
frame_base_set_default (gdbarch, &sparc32_frame_base);
/* Hook in the DWARF CFI frame unwinder. */
dwarf2_frame_set_init_reg (gdbarch, sparc32_dwarf2_frame_init_reg);
/* FIXME: kettenis/20050423: Don't enable the unwinder until the
StackGhost issues have been resolved. */
/* Hook in ABI-specific overrides, if they have been registered. */
gdbarch_init_osabi (info, gdbarch);
frame_unwind_append_sniffer (gdbarch, sparc32_frame_sniffer);
/* If we have register sets, enable the generic core file support. */
if (tdep->gregset)
set_gdbarch_regset_from_core_section (gdbarch,
sparc_regset_from_core_section);
return gdbarch;
}
static struct gdbarch *
lm32_gdbarch_init (struct gdbarch_info info, struct gdbarch_list *arches)
{
struct gdbarch *gdbarch;
struct gdbarch_tdep *tdep;
/* If there is already a candidate, use it. */
arches = gdbarch_list_lookup_by_info (arches, &info);
if (arches != NULL)
return arches->gdbarch;
/* None found, create a new architecture from the information provided. */
tdep = XMALLOC (struct gdbarch_tdep);
gdbarch = gdbarch_alloc (&info, tdep);
/* Type sizes. */
set_gdbarch_short_bit (gdbarch, 16);
set_gdbarch_int_bit (gdbarch, 32);
set_gdbarch_long_bit (gdbarch, 32);
set_gdbarch_long_long_bit (gdbarch, 64);
set_gdbarch_float_bit (gdbarch, 32);
set_gdbarch_double_bit (gdbarch, 64);
set_gdbarch_long_double_bit (gdbarch, 64);
set_gdbarch_ptr_bit (gdbarch, 32);
/* Register info. */
set_gdbarch_num_regs (gdbarch, SIM_LM32_NUM_REGS);
set_gdbarch_sp_regnum (gdbarch, SIM_LM32_SP_REGNUM);
set_gdbarch_pc_regnum (gdbarch, SIM_LM32_PC_REGNUM);
set_gdbarch_register_name (gdbarch, lm32_register_name);
set_gdbarch_register_type (gdbarch, lm32_register_type);
set_gdbarch_cannot_store_register (gdbarch, lm32_cannot_store_register);
/* Frame info. */
set_gdbarch_skip_prologue (gdbarch, lm32_skip_prologue);
set_gdbarch_inner_than (gdbarch, core_addr_lessthan);
set_gdbarch_decr_pc_after_break (gdbarch, 0);
set_gdbarch_frame_args_skip (gdbarch, 0);
/* Frame unwinding. */
set_gdbarch_frame_align (gdbarch, lm32_frame_align);
frame_base_set_default (gdbarch, &lm32_frame_base);
set_gdbarch_unwind_pc (gdbarch, lm32_unwind_pc);
set_gdbarch_unwind_sp (gdbarch, lm32_unwind_sp);
set_gdbarch_dummy_id (gdbarch, lm32_dummy_id);
frame_unwind_append_unwinder (gdbarch, &lm32_frame_unwind);
/* Breakpoints. */
set_gdbarch_breakpoint_from_pc (gdbarch, lm32_breakpoint_from_pc);
set_gdbarch_have_nonsteppable_watchpoint (gdbarch, 1);
/* Calling functions in the inferior. */
set_gdbarch_push_dummy_call (gdbarch, lm32_push_dummy_call);
set_gdbarch_return_value (gdbarch, lm32_return_value);
/* Instruction disassembler. */
set_gdbarch_print_insn (gdbarch, print_insn_lm32);
lm32_add_reggroups (gdbarch);
set_gdbarch_register_reggroup_p (gdbarch, lm32_register_reggroup_p);
return gdbarch;
}
static struct gdbarch *
mn10300_gdbarch_init (struct gdbarch_info info,
struct gdbarch_list *arches)
{
struct gdbarch *gdbarch;
struct gdbarch_tdep *tdep;
arches = gdbarch_list_lookup_by_info (arches, &info);
if (arches != NULL)
return arches->gdbarch;
tdep = xmalloc (sizeof (struct gdbarch_tdep));
gdbarch = gdbarch_alloc (&info, tdep);
switch (info.bfd_arch_info->mach)
{
case 0:
case bfd_mach_mn10300:
set_gdbarch_register_name (gdbarch, mn10300_generic_register_name);
tdep->am33_mode = 0;
break;
case bfd_mach_am33:
set_gdbarch_register_name (gdbarch, am33_register_name);
tdep->am33_mode = 1;
break;
default:
internal_error (__FILE__, __LINE__,
_("mn10300_gdbarch_init: Unknown mn10300 variant"));
break;
}
/* Registers. */
set_gdbarch_num_regs (gdbarch, E_NUM_REGS);
set_gdbarch_register_type (gdbarch, mn10300_register_type);
set_gdbarch_skip_prologue (gdbarch, mn10300_skip_prologue);
set_gdbarch_read_pc (gdbarch, mn10300_read_pc);
set_gdbarch_write_pc (gdbarch, mn10300_write_pc);
set_gdbarch_pc_regnum (gdbarch, E_PC_REGNUM);
set_gdbarch_sp_regnum (gdbarch, E_SP_REGNUM);
/* Stack unwinding. */
set_gdbarch_inner_than (gdbarch, core_addr_lessthan);
/* Breakpoints. */
set_gdbarch_breakpoint_from_pc (gdbarch, mn10300_breakpoint_from_pc);
/* decr_pc_after_break? */
/* Disassembly. */
set_gdbarch_print_insn (gdbarch, print_insn_mn10300);
/* Stage 2 */
/* MVS Note: at least the first one is deprecated! */
set_gdbarch_deprecated_use_struct_convention (gdbarch,
mn10300_use_struct_convention);
set_gdbarch_store_return_value (gdbarch, mn10300_store_return_value);
set_gdbarch_extract_return_value (gdbarch, mn10300_extract_return_value);
/* Stage 3 -- get target calls working. */
set_gdbarch_push_dummy_call (gdbarch, mn10300_push_dummy_call);
/* set_gdbarch_return_value (store, extract) */
mn10300_frame_unwind_init (gdbarch);
return gdbarch;
}
static struct gdbarch *
tilegx_gdbarch_init (struct gdbarch_info info, struct gdbarch_list *arches)
{
struct gdbarch *gdbarch;
int arch_size = 64;
/* Handle arch_size == 32 or 64. Default to 64. */
if (info.abfd)
arch_size = bfd_get_arch_size (info.abfd);
/* Try to find a pre-existing architecture. */
for (arches = gdbarch_list_lookup_by_info (arches, &info);
arches != NULL;
arches = gdbarch_list_lookup_by_info (arches->next, &info))
{
/* We only have two flavors -- just make sure arch_size matches. */
if (gdbarch_ptr_bit (arches->gdbarch) == arch_size)
return (arches->gdbarch);
}
gdbarch = gdbarch_alloc (&info, NULL);
/* Basic register fields and methods, datatype sizes and stuff. */
/* There are 64 physical registers which can be referenced by
instructions (although only 56 of them can actually be
debugged) and 1 magic register (the PC). The other three
magic registers (ex1, syscall, orig_r0) which are known to
"ptrace" are ignored by "gdb". Note that we simply pretend
that there are 65 registers, and no "pseudo registers". */
set_gdbarch_num_regs (gdbarch, TILEGX_NUM_REGS);
set_gdbarch_num_pseudo_regs (gdbarch, 0);
set_gdbarch_sp_regnum (gdbarch, TILEGX_SP_REGNUM);
set_gdbarch_pc_regnum (gdbarch, TILEGX_PC_REGNUM);
set_gdbarch_register_name (gdbarch, tilegx_register_name);
set_gdbarch_register_type (gdbarch, tilegx_register_type);
set_gdbarch_short_bit (gdbarch, 2 * TARGET_CHAR_BIT);
set_gdbarch_int_bit (gdbarch, 4 * TARGET_CHAR_BIT);
set_gdbarch_long_bit (gdbarch, arch_size);
set_gdbarch_long_long_bit (gdbarch, 8 * TARGET_CHAR_BIT);
set_gdbarch_float_bit (gdbarch, 4 * TARGET_CHAR_BIT);
set_gdbarch_double_bit (gdbarch, 8 * TARGET_CHAR_BIT);
set_gdbarch_long_double_bit (gdbarch, 8 * TARGET_CHAR_BIT);
set_gdbarch_ptr_bit (gdbarch, arch_size);
set_gdbarch_addr_bit (gdbarch, arch_size);
set_gdbarch_cannot_fetch_register (gdbarch,
tilegx_cannot_reference_register);
set_gdbarch_cannot_store_register (gdbarch,
tilegx_cannot_reference_register);
/* Stack grows down. */
set_gdbarch_inner_than (gdbarch, core_addr_lessthan);
/* Frame Info. */
set_gdbarch_unwind_sp (gdbarch, tilegx_unwind_sp);
set_gdbarch_unwind_pc (gdbarch, tilegx_unwind_pc);
set_gdbarch_dummy_id (gdbarch, tilegx_unwind_dummy_id);
set_gdbarch_frame_align (gdbarch, tilegx_frame_align);
frame_base_set_default (gdbarch, &tilegx_frame_base);
set_gdbarch_skip_prologue (gdbarch, tilegx_skip_prologue);
set_gdbarch_stack_frame_destroyed_p (gdbarch, tilegx_stack_frame_destroyed_p);
/* Map debug registers into internal register numbers. */
set_gdbarch_dwarf2_reg_to_regnum (gdbarch, tilegx_dwarf2_reg_to_regnum);
/* These values and methods are used when gdb calls a target function. */
set_gdbarch_push_dummy_call (gdbarch, tilegx_push_dummy_call);
set_gdbarch_get_longjmp_target (gdbarch, tilegx_get_longjmp_target);
set_gdbarch_write_pc (gdbarch, tilegx_write_pc);
set_gdbarch_breakpoint_from_pc (gdbarch, tilegx_breakpoint_from_pc);
set_gdbarch_return_value (gdbarch, tilegx_return_value);
set_gdbarch_print_insn (gdbarch, print_insn_tilegx);
gdbarch_init_osabi (info, gdbarch);
dwarf2_append_unwinders (gdbarch);
frame_unwind_append_unwinder (gdbarch, &tilegx_frame_unwind);
return gdbarch;
}
void
amd64_init_abi (struct gdbarch_info info, struct gdbarch *gdbarch)
{
struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
/* AMD64 generally uses `fxsave' instead of `fsave' for saving its
floating-point registers. */
tdep->sizeof_fpregset = I387_SIZEOF_FXSAVE;
/* AMD64 has an FPU and 16 SSE registers. */
tdep->st0_regnum = AMD64_ST0_REGNUM;
tdep->num_xmm_regs = 16;
/* This is what all the fuss is about. */
set_gdbarch_long_bit (gdbarch, 64);
set_gdbarch_long_long_bit (gdbarch, 64);
set_gdbarch_ptr_bit (gdbarch, 64);
/* In contrast to the i386, on AMD64 a `long double' actually takes
up 128 bits, even though it's still based on the i387 extended
floating-point format which has only 80 significant bits. */
set_gdbarch_long_double_bit (gdbarch, 128);
set_gdbarch_num_regs (gdbarch, AMD64_NUM_REGS);
set_gdbarch_register_name (gdbarch, amd64_register_name);
set_gdbarch_register_type (gdbarch, amd64_register_type);
/* Register numbers of various important registers. */
set_gdbarch_sp_regnum (gdbarch, AMD64_RSP_REGNUM); /* %rsp */
set_gdbarch_pc_regnum (gdbarch, AMD64_RIP_REGNUM); /* %rip */
set_gdbarch_ps_regnum (gdbarch, AMD64_EFLAGS_REGNUM); /* %eflags */
set_gdbarch_fp0_regnum (gdbarch, AMD64_ST0_REGNUM); /* %st(0) */
/* APPLE LOCAL: Add the frame pointer register so it can be modified
in expressions. */
set_gdbarch_deprecated_fp_regnum (gdbarch, AMD64_RBP_REGNUM); /* %rbp */
/* The "default" register numbering scheme for AMD64 is referred to
as the "DWARF Register Number Mapping" in the System V psABI.
The preferred debugging format for all known AMD64 targets is
actually DWARF2, and GCC doesn't seem to support DWARF (that is
DWARF-1), but we provide the same mapping just in case. This
mapping is also used for stabs, which GCC does support. */
set_gdbarch_stab_reg_to_regnum (gdbarch, amd64_dwarf_reg_to_regnum);
set_gdbarch_dwarf_reg_to_regnum (gdbarch, amd64_dwarf_reg_to_regnum);
set_gdbarch_dwarf2_reg_to_regnum (gdbarch, amd64_dwarf_reg_to_regnum);
/* We don't override SDB_REG_RO_REGNUM, since COFF doesn't seem to
be in use on any of the supported AMD64 targets. */
/* Call dummy code. */
set_gdbarch_push_dummy_call (gdbarch, amd64_push_dummy_call);
set_gdbarch_frame_align (gdbarch, amd64_frame_align);
set_gdbarch_frame_red_zone_size (gdbarch, 128);
set_gdbarch_convert_register_p (gdbarch, amd64_convert_register_p);
set_gdbarch_register_to_value (gdbarch, i387_register_to_value);
set_gdbarch_value_to_register (gdbarch, i387_value_to_register);
set_gdbarch_return_value (gdbarch, amd64_return_value);
set_gdbarch_skip_prologue (gdbarch, amd64_skip_prologue);
/* Avoid wiring in the MMX registers for now. */
set_gdbarch_num_pseudo_regs (gdbarch, 0);
tdep->mm0_regnum = -1;
set_gdbarch_unwind_dummy_id (gdbarch, amd64_unwind_dummy_id);
frame_unwind_append_sniffer (gdbarch, amd64_sigtramp_frame_sniffer);
frame_unwind_append_sniffer (gdbarch, amd64_frame_sniffer);
frame_base_set_default (gdbarch, &amd64_frame_base);
/* If we have a register mapping, enable the generic core file support. */
if (tdep->gregset_reg_offset)
set_gdbarch_regset_from_core_section (gdbarch,
amd64_regset_from_core_section);
/* APPLE LOCAL: A handy little function. */
set_gdbarch_fetch_pointer_argument (gdbarch, amd64_fetch_pointer_argument);
}
