void startRecordUART(void) {
if (PKT_NONE!=uartMode[0]) {
if(baud[0]<0) autobaud(0);
if(baud[0]>0) setup_uart(0,baud[0],1);
}
if (PKT_NONE!=uartMode[1]) {
if(baud[1]<0) autobaud(1);
if(baud[1]>0) setup_uart(1,baud[1],1);
}
}
void setup(void)
{
/*
start all UARTs at 57600 with default buffer sizes
*/
setup_uart(hal.uartA, "uartA"); // console
setup_uart(hal.uartB, "uartB"); // 1st GPS
setup_uart(hal.uartC, "uartC"); // telemetry 1
setup_uart(hal.uartD, "uartD"); // telemetry 2
setup_uart(hal.uartE, "uartE"); // 2nd GPS
}
/*
* Routine: uart_init
* Description: init the UART clocks, muxes, and baudrate/parity/etc.
*/
void uart_init(void)
{
struct uart_ctlr *uart = (struct uart_ctlr *)NV_PA_APB_UARTD_BASE;
#if defined(CONFIG_TEGRA2_ENABLE_UARTD)
setup_uart(uart);
#endif /* CONFIG_TEGRA2_ENABLE_UARTD */
#if defined(CONFIG_TEGRA2_ENABLE_UARTA)
uart = (struct uart_ctlr *)NV_PA_APB_UARTA_BASE;
setup_uart(uart);
#endif /* CONFIG_TEGRA2_ENABLE_UARTA */
}
void setup()
{
hal.console->println("Practice sketch starting up...");
hal.scheduler->delay(1000);
/*
Start all UARTs at 57600 with default buffer sizes
*/
setup_uart(hal.uartA, "uartA"); // console
setup_uart(hal.uartB, "uartB"); // 1st GPS
setup_uart(hal.uartC, "uartC"); // telemetry 1
setup_uart(hal.uartD, "uartD"); // telemetry 2
setup_uart(hal.uartE, "uartE"); // 2nd GPS
timer = hal.scheduler->micros();
}
void setup() {
TMOD = 0b0001 // timer 0 mode 1 16-bit timer
| (0b0010 << 4); // timer 1 mode 2 8-bit auto reload
setup_uart();
setup_timing();
EA = 1; // Open master interrupt switch
}
void main(void)
{
/* Init watchdog timer to off */
WDTCTL = WDTPW|WDTHOLD;
// Setup oscillator for 16MHz operation
BCSCTL1 = CALBC1_16MHZ;
DCOCTL = CALDCO_16MHZ;
// Wait for changes to take effect
__delay_cycles(4000);
// Set LED output to pin 1.0
P1DIR |= BIT0;
// Make sure a function processes bytes received through UART
setup_uart_callback(uart_rx_callback);
// Setup CC2500 radio and register callback to process incoming packets
setup_cc2500(cc2500_rx_callback);
setup_uart();
// Setup LED outputs
LED_PxOUT &= ~(LED1); //Outputs
LED_PxDIR = LED1; //Outputs
for(;;)
{
__bis_SR_register( LPM1_bits + GIE ); // Enable interrupts and sleep
}
}
//Returns positive if it looks like this is a good baud
//Returns negative otherwise
//Good baud has at least 20 characters in a second
//and less than 1/100 of characters have an error
static int countCharBaud(int port, int trybaud, unsigned int* chars, unsigned int* errors) {
*chars=0;
*errors=0;
setup_uart(port,trybaud,0);
unsigned int start=T0TC;
while((T0TC-start)<PCLK) {
int status=ULSR(port);
if(status & 0x01) {
char junk=URBR(port);
(*chars)++;
if(status & 0x80) (*errors)++;
}
}
int result;
if (*chars<20) {
result=-1;
} else if (*errors>(*chars/100)) {
result=-2;
} else {
result=1;
}
fillPktStart(&uartbuf[port],PT_BAUD);
fillPktByte(&uartbuf[port],port);
fillPktInt(&uartbuf[port],trybaud);
fillPktInt(&uartbuf[port],*chars);
fillPktInt(&uartbuf[port],*errors);
fillPktInt(&uartbuf[port],result);
fillPktFinish(&uartbuf[port]);
return result;
}
int main( void )
{
stop_watchdog();
setup_finish_ports();
setup_clock();
setup_uart();
rf_init(sizeof(struct packet));
configure_timer_38k();
timer_38k_enable(1);
configure_watchdog();
__enable_interrupt();
// Show battery voltage on start
display_vcc();
// Setup RF channel
setup_channel();
set_state(st_stopped);
// Start/stop loop
for (;;) {
wait_start();
set_state(st_started);
beep(SHORT_DELAY_TICKS);
detect_finish();
set_state(st_stopped);
report_finish();
}
}
ENTRY_FUNCTION(start_zii_imx7d_rpu2, r0, r1, r2)
{
imx7_cpu_lowlevel_init();
if (IS_ENABLED(CONFIG_DEBUG_LL))
setup_uart();
imx7d_barebox_entry(__dtb_imx7d_zii_rpu2_start + get_runtime_offset());
}
static void __noreturn start_imx53_tqma53_common(void *fdt)
{
if (IS_ENABLED(CONFIG_DEBUG_LL)) {
writel(0x3, MX53_IOMUXC_BASE_ADDR + 0x278);
writel(0x3, MX53_IOMUXC_BASE_ADDR + 0x27c);
setup_uart((void *)MX53_UART2_BASE_ADDR);
putc_ll('>');
}
imx53_barebox_entry(fdt);
}
void setup(){
setup_clock();
enable_interrupts();
enable_timer0();
setup_pulse_in();
setup_pulse_out();
setup_uart();
#ifdef DEBUG
run_tests();
#endif
}
ENTRY_FUNCTION(start_imx6sx_udoo_neo, r0, r1, r2)
{
void *fdt;
imx6_cpu_lowlevel_init();
if (IS_ENABLED(CONFIG_DEBUG_LL))
setup_uart();
fdt = __dtb_imx6sx_udoo_neo_full_start + get_runtime_offset();
imx6sx_barebox_entry(fdt);
}
ENTRY_FUNCTION(start_imx6sx_sabresdb, r0, r1, r2)
{
void *fdt;
imx6_cpu_lowlevel_init();
if (IS_ENABLED(CONFIG_DEBUG_LL))
setup_uart();
fdt = __dtb_imx6sx_sdb_start + get_runtime_offset();
barebox_arm_entry(0x80000000, SZ_1G, fdt);
}
ENTRY_FUNCTION(start_variscite_custom, r0, r1, r2)
{
void *fdt;
imx6_cpu_lowlevel_init();
arm_setup_stack(0x00920000 - 8);
if (IS_ENABLED(CONFIG_DEBUG_LL))
setup_uart();
fdt = __dtb_imx6q_var_custom_start + get_runtime_offset();
barebox_arm_entry(0x10000000, SZ_1G, fdt);
}
ENTRY_FUNCTION(start_phytec_pbab01_2gib, r0, r1, r2)
{
uint32_t fdt;
arm_cpu_lowlevel_init();
arm_setup_stack(0x00920000 - 8);
if (IS_ENABLED(CONFIG_DEBUG_LL))
setup_uart();
fdt = (uint32_t)__dtb_imx6q_phytec_pbab01_start - get_runtime_offset();
barebox_arm_entry(0x10000000, SZ_2G, fdt);
}
static void __noreturn start_imx6q_phytec_pbaa03_common(uint32_t size)
{
void *fdt;
arm_cpu_lowlevel_init();
arm_setup_stack(0x00920000 - 8);
if (IS_ENABLED(CONFIG_DEBUG_LL))
setup_uart();
fdt = __dtb_imx6q_phytec_pbaa03_start - get_runtime_offset();
barebox_arm_entry(0x10000000, size, fdt);
}
int main( void )
{
uint8_t buffer_index;
packet_header_t* header;
// Stop watchdog timer to prevent time out reset
WDTCTL = WDTPW + WDTHOLD;
header = (packet_header_t*)tx_buffer;
// Initialize Tx Buffer
header->length = sizeof(packet_header_t) - 1;
header->source = DEVICE_ADDRESS;
header->type = 0x66; // Sync message
header->flags = 0xAA;
// Make sure processor is running at 12MHz
setup_oscillator();
// Initialize UART for communications at 115200baud
setup_uart();
// Initialize LEDs
setup_leds();
// Initialize timer
set_ccr( 0, TIMER_LIMIT );
setup_timer_a(MODE_UP);
// Send sync message
register_timer_callback( send_sync_message, 0 );
// Initialize radio and enable receive callback function
setup_radio( process_rx );
// Enable interrupts, otherwise nothing will work
eint();
while (1)
{
// Enter sleep mode
__bis_SR_register( LPM0_bits + GIE );
__no_operation();
}
return 0;
}
static void __noreturn start_imx6_phytec_common(uint32_t size,
bool do_early_uart_config,
void *fdt_blob_fixed_offset)
{
void *fdt;
imx6_cpu_lowlevel_init();
arm_setup_stack(0x00920000 - 8);
if (do_early_uart_config && IS_ENABLED(CONFIG_DEBUG_LL))
setup_uart();
fdt = fdt_blob_fixed_offset - get_runtime_offset();
barebox_arm_entry(0x10000000, size, fdt);
}
int main(void)
{
// Stop Watchdog timer
WDTCTL = WDTPW + WDTHOLD;
// Configure CPU clock
caliberate_clock();
// setup uart
setup_uart();
setup_delay();
// Enter LPM0 w/ interrupt
_BIS_SR(LPM0_bits + GIE);
}
int main(int argc, char const *argv[]) {
unsigned destination = 0;
unsigned flit_number = 0;
unsigned flit;
unsigned packet_counter = 0;
setup_uart(CPU_SPEED, UART_BAUDRATE);
uart_puts("UART TEST: If you can read this, then UART output works!\n");
while(1){
if ((ni_read_flags() & NI_READ_MASK) == 0)
{
flit = ni_read();
}else if((ni_read_flags() & NI_WRITE_MASK) == 0 && packet_counter < 100)
{
flit_number ++;
if (flit_number == 1){
ni_write(build_header(destination, 3));
destination ++;
if (destination == MY_ADDR){
destination ++;
}
if (destination == 4){
destination = 0;
}
}else if (flit_number == 3){
ni_write(0);
flit_number = 0;
packet_counter ++;
}else{
ni_write(0b1111111111111111111111111111);
}
}
if (packet_counter >= 100){
while ((ni_read_flags() & NI_READ_MASK) == 0){
flit = ni_read();
}
uart_puts("finished sending packets!\n");
break;
}
}
/* Run CPU test */
test_plasma_funcitons();
return 0;
}
static void wandboard_init(void)
{
unsigned long sdram_size;
setup_uart();
if (get_pc() > 0x10000000)
return;
sdram_size = wandboard_dram_init();
pr_debug("SDRAM init finished. SDRAM size 0x%08lx\n", sdram_size);
imx6_esdhc_start_image(2);
pr_info("Loading image from SPI flash\n");
imx6_spi_start_image(0);
}
ENTRY_FUNCTION(start_zii_vf610_dev, r0, r1, r2)
{
void *fdt;
const unsigned int system_type = get_system_type();
vf610_cpu_lowlevel_init();
if (IS_ENABLED(CONFIG_DEBUG_LL))
setup_uart();
switch (system_type) {
default:
if (IS_ENABLED(CONFIG_DEBUG_LL)) {
relocate_to_current_adr();
setup_c();
puts_ll("\n*********************************\n");
puts_ll("* Unknown system type: ");
puthex_ll(system_type);
puts_ll("\n* Assuming devboard revision B\n");
puts_ll("*********************************\n");
}
case ZII_PLATFORM_VF610_DEV_REV_B: /* FALLTHROUGH */
fdt = __dtb_vf610_zii_dev_rev_b_start;
break;
case ZII_PLATFORM_VF610_SCU4_AIB:
fdt = __dtb_vf610_zii_scu4_aib_start;
break;
case ZII_PLATFORM_VF610_DEV_REV_C:
fdt = __dtb_vf610_zii_dev_rev_c_start;
break;
case ZII_PLATFORM_VF610_CFU1:
fdt = __dtb_vf610_zii_cfu1_start;
break;
case ZII_PLATFORM_VF610_SSMB_SPU3:
fdt = __dtb_vf610_zii_ssmb_spu3_start;
break;
case ZII_PLATFORM_VF610_SPB4:
fdt = __dtb_vf610_zii_spb4_start;
break;
case ZII_PLATFORM_VF610_SSMB_DTU:
fdt = __dtb_vf610_zii_ssmb_dtu_start;
break;
}
vf610_barebox_entry(fdt + get_runtime_offset());
}
ENTRY_FUNCTION(start_imx6q_guf_santaro, r0, r1, r2)
{
uint32_t fdt;
int i;
arm_cpu_lowlevel_init();
arm_setup_stack(0x00920000 - 8);
for (i = 0x68; i <= 0x80; i += 4)
writel(0xffffffff, MX6_CCM_BASE_ADDR + i);
setup_uart();
fdt = (uint32_t)__dtb_imx6q_guf_santaro_start - get_runtime_offset();
barebox_arm_entry(0x10000000, SZ_1G, fdt);
}
int main(void)
{
// Stop WDT
WDTCTL = WDTPW + WDTHOLD;
//Configure CPU clock
caliberate_clock();
setup_delay();
//RED Led, set as output port
P1DIR |= BIT0;
setup_uart();
setup_switch();
// Enter LPM0 w/ interrupt
_BIS_SR(LPM0_bits + GIE);
}
int main() {
int fd = setup_uart();
if (fd == -1) {
return 1;
}
//----- TX BYTES -----
//unsigned char tx_buffer[NMEA_MAX];
//memset(tx_buffer, 0, NMEA_MAX);
//const char* data = "$JKMSG,*\r\n";
//memcpy(tx_buffer, data, sizeof(data));
//int count = write(fd, tx_buffer, sizeof(data));
//if (count < 0) {
// printf("UART TX error\n");
//}
for (;;) {
//----- CHECK FOR ANY RX BYTES -----
// Read up to 255 characters from the port if they are there
unsigned char rx_buffer[NMEA_MAX];
int rx_length = read(fd, rx_buffer, NMEA_MAX);
if (rx_length < 0) {
//An error occured (will occur if there are no bytes)
} else if (rx_length == 0) {
//No data waiting
} else {
//Bytes received
rx_buffer[rx_length] = '\0';
puts(rx_buffer);
//printf("%i bytes read : %s\n", rx_length, rx_buffer);
}
}
//----- CLOSE THE UART -----
close(fd);
return 0;
}
int board_init(void)
{
/*
* need set Power Supply Glitch to 0x41736166
* and need clear Power supply Glitch Detect bit
* when POR or reboot or power on Otherwise system
* could not be power off anymore;
* need to set SNVS work at DUMP mode;
* */
u32 reg;
writel(0x41736166, SNVS_BASE_ADDR + 0x64);/*set LPPGDR*/
udelay(10);
reg = readl(SNVS_BASE_ADDR + 0x4c);
reg |= (1 << 3);
writel(reg, SNVS_BASE_ADDR + 0x4c);/*clear LPSR*/
mxc_iomux_v3_init((void *)IOMUXC_BASE_ADDR);
setup_boot_device();
fsl_set_system_rev();
/* board id for linux */
gd->bd->bi_arch_number = MACH_TYPE_MX6SL_EVK;
/* address of boot parameters */
gd->bd->bi_boot_params = PHYS_SDRAM_1 + 0x100;
wdog_preconfig(WDOG1_BASE_ADDR);
setup_uart();
#ifdef CONFIG_MXC_FEC
setup_fec();
#endif
#ifdef CONFIG_MXC_EPDC
setup_epdc();
#endif
return 0;
}
ENTRY_FUNCTION(start_imx6dl_mba6x)(void)
{
uint32_t fdt;
__barebox_arm_head();
arm_cpu_lowlevel_init();
arm_setup_stack(0x00920000 - 8);
if (IS_ENABLED(CONFIG_DEBUG_LL)) {
writel(0x2, 0x020e035c);
setup_uart();
putc_ll('a');
}
arm_early_mmu_cache_invalidate();
fdt = (uint32_t)__dtb_imx6dl_mba6x_start - get_runtime_offset();
barebox_arm_entry(0x10000000, SZ_512M, fdt);
}
//---------------------------------------------------------------------------------------------
void uart_task_handler(void *args)
{
int len = 0;
uint8_t cache[0x100];
struct UartPort *port = (struct UartPort*)args;
setup_uart(port);
for (;;)
{
if (xSemaphoreTake(port->sem, portMAX_DELAY) == pdPASS)
{
while (xQueueReceive(port->cache_rx.queue, &cache[len++], 0) == pdPASS);
if (port->uart_frame_hook)
{
port->uart_frame_hook(cache, len);
len = 0;
}
}
}
}
int board_early_init_f(void)
{
init_drive_strength();
/* Setup debug led */
gpio_direction_output(6, 0);
mxc_request_iomux(MX51_PIN_GPIO1_6, IOMUX_CONFIG_ALT0);
mxc_iomux_set_pad(MX51_PIN_GPIO1_6, PAD_CTL_DRV_MAX | PAD_CTL_SRE_FAST);
/* wait a little while to give the pll time to settle */
sdelay(100000);
setup_weim();
setup_uart();
setup_fec();
setup_gpios();
spi_io_init();
return 0;
}
int main (void)
{
int dummy;
//int matrix; //only for test of ledmdrv
int i;
//int temp_current_val; //temporary
//int first_ec=1;
//Setup oscillator/ports/pins first
setup_oscillator();
setup_ports();
setup_peripheral_pin_select();
setup_interrupt_priorities();
#ifdef USE_DIO
setup_dio();
#endif
#ifdef USE_CONTROL
setup_control();
#endif
#ifdef USE_ADC_SPI
setup_adc_spi();
#endif
#ifdef USE_ADC
setup_adc();
initDma0(); // Initialise the DMA controller to buffer ADC data in conversion order
#endif
#ifdef USE_TIMER3
//setup_timer3();
#endif
#ifdef USE_UART
setup_uart();
#endif
ecat_isr_running = 0;
#ifdef USE_ETHERCAT
while (!eeprom_loaded()) //Wait until ESC is ready
//ToggleHeartbeatLED(); //Success
SetHeartbeatLED;
//#ifdef ECAT_DMA
cfgDma0SpiTx();
cfgDma1SpiRx();
//#endif
setup_ethercat();
ClrHeartbeatLED;
#endif
#if defined PWR_0_2 || defined PWR_0_3 || defined PWR_0_4 || defined PWR_0_5
ClrEnableMotor;
#endif
setup_interrupt_priorities();
dummy = U1RXREG;
while(1){
if (i++%20001==0)
{
//ToggleHeartbeatLED();
}
#if defined USE_ETHERCAT
if (!IEC0bits.DMA1IE)
{
DISABLE_AL_EVENT_INT;
step_ethercat();
ENABLE_AL_EVENT_INT;
}
#endif
}
}
