/*--------------------------------------------------------------------------------------------- * (function: do_simulation_of_netlist) *-------------------------------------------------------------------------------------------*/ void do_simulation_of_netlist() { if (!global_args.sim_num_test_vectors && !global_args.sim_vector_input_file) return; printf("Netlist Simulation Begin\n"); simulate_netlist(verilog_netlist); printf("--------------------------------------------------------------------\n"); }
/*--------------------------------------------------------------------------------------------- * (function: do_simulation_of_netlist) *-------------------------------------------------------------------------------------------*/ void OdinInterface::do_simulation_of_netlist() { if (!global_args.sim_num_test_vectors && !global_args.sim_vector_input_file) return; fprintf(stderr, "Netlist Simulation Begin\n"); simulate_netlist(verilog_netlist); fprintf(stderr, "--------------------------------------------------------------------\n"); }