static ssize_t anx7808_write_reg_store(struct device *dev, struct device_attribute *attr,
const char *buf, size_t count)
{
int ret = 0;
char op, i;
char r[3];
char v[3];
unchar tmp;
int id, reg, val = 0 ;
if (sp_tx_system_state != STATE_PLAY_BACK) {
pr_err("%s: error!, Not STATE_PLAY_BACK\n", LOG_TAG);
return -EINVAL;
}
if (count != 7 && count != 5) {
pr_err("%s: cnt:%d, invalid input!\n", LOG_TAG, count-1);
pr_err("%s: ex) 05df -> op:0(read) id:5 reg:0xdf \n", LOG_TAG);
pr_err("%s: ex) 15df5f -> op:1(wirte) id:5 reg:0xdf val:0x5f\n", LOG_TAG);
return -EINVAL;
}
ret = snprintf(&op, 2, buf);
ret = snprintf(&i, 2, buf+1);
ret = snprintf(r, 3, buf+2);
id = simple_strtoul(&i, NULL, 10);
reg = simple_strtoul(r, NULL, 16);
if ((id != 0 && id != 1 && id != 5 && id != 6 && id != 7)) {
pr_err("%s: invalid addr id! (id:0,1,5,6,7)\n", LOG_TAG);
return -EINVAL;
}
id = anx7808_id_change(id); /* ex) 5 -> 0x72 */
switch (op) {
case 0x30: /* "0" -> read */
sp_read_reg(id, reg, &tmp);
pr_info("%s: anx7808 read(0x%x,0x%x)= 0x%x \n", LOG_TAG, id, reg, tmp);
break;
case 0x31: /* "1" -> write */
ret = snprintf(v, 3, buf+4);
val = simple_strtoul(v, NULL, 16);
sp_write_reg(id, reg, val);
sp_read_reg(id, reg, &tmp);
pr_info("%s: anx7808 write(0x%x,0x%x,0x%x)\n", LOG_TAG, id, reg, tmp);
break;
default:
pr_err("%s: invalid operation code! (0:read, 1:write)\n", LOG_TAG);
return -EINVAL;
}
return count;
}
/*sysfs read interface*/
static ssize_t ctrl_reg19_show(struct device *dev, struct device_attribute *attr,
char *buf)
{
unchar c;
sp_read_reg(TX_P1, SP_TX_LT_CTRL_REG19, &c);
return sprintf(buf, "0x%x\n", c);
}
int dump_7808_reg_info(void)
{
unchar ch, cl;
uint n;
sp_read_reg(RX_P0, HDMI_RX_HTOTAL_LOW, &cl);
sp_read_reg(RX_P0, HDMI_RX_HTOTAL_HIGH, &ch);
n = ch;
n = (n << 8) + cl;
printk("ANX7808 RX cur_h_res = 0x%x\n", n);
sp_read_reg(RX_P0, HDMI_RX_VTOTAL_LOW, &cl);
sp_read_reg(RX_P0, HDMI_RX_VTOTAL_HIGH, &ch);
n = ch;
n = (n << 8) + cl;
printk("ANX7808 RX cur_v_res = 0x%x\n", n);
sp_read_reg(RX_P0, HDMI_RX_VID_PCLK_CNTR_REG, &cl);
printk("ANX7808 RX cur_pix_clk = 0x%x\n", cl);
sp_read_reg(RX_P0, HDMI_RX_HDMI_STATUS_REG, &cl);
printk("ANX7808 RX dvi_status = 0x%x\n", ((cl & HDMI_MODE) == HDMI_MODE));
sp_read_reg(RX_P0, 0x14, &cl);
printk("ANX7808 0x7e:14 = 0x%x\n", cl);
return 0;
}
int dump_7808_reg_pclk(void)
{
ulong str_clk = 0;
unchar c;
ulong pclk;
ulong m_val, n_val;
str_clk = 162;
sp_read_reg(TX_P0, M_VID_2, &c);
m_val = c * 0x10000;
sp_read_reg(TX_P0, M_VID_1, &c);
m_val = m_val + c * 0x100;
sp_read_reg(TX_P0, M_VID_0, &c);
m_val = m_val + c;
sp_read_reg(TX_P0, N_VID_2, &c);
n_val = c * 0x10000;
sp_read_reg(TX_P0, N_VID_1, &c);
n_val = n_val + c * 0x100;
sp_read_reg(TX_P0, N_VID_0, &c);
n_val = n_val + c;
str_clk = str_clk * m_val;
pclk = str_clk;
pclk = pclk / n_val;
DEV_DBG(" M = %lu, N = %lu, PCLK = %ld MHz\n", m_val, n_val, pclk);
return 0;
}
//ASUS_BSP+++ larry : check 480p for VGA dongle
bool myDP_check_7808_rx_under_480p(void)
{
unchar ch, cl;
uint n1, n2;
bool ret = false;
sp_read_reg(RX_P0, HDMI_RX_HACT_LOW, &cl);
sp_read_reg(RX_P0, HDMI_RX_HACT_HIGH, &ch);
n1 = ch;
n1 = (n1 << 8) + cl;
sp_read_reg(RX_P0, HDMI_RX_VACT_LOW, &cl);
sp_read_reg(RX_P0, HDMI_RX_VACT_HIGH, &ch);
n2 = ch;
n2 = (n2 << 8) + cl;
if ( ((n1 == 640) || (n1 == 720)) && (n2 == 480))
ret = true;
else
printk("(VGA dongle, not allow output) active RX H x V = (%d x %d)\n", n1, n2);
return ret;
}
static int read_swing_function(const char *val, struct kernel_param *kp)
{
int ret=0;
unchar c=0;
int old_val = read_swing_value;
//struct anx7808_platform_data *pdata = anx7808_client->dev.platform_data;
if (ret)
return ret;
if (read_swing_value > 0xf) {
read_swing_value = old_val;
return -EINVAL;
}
ret = param_set_int(val, kp);
if (read_swing_value==1)
{
myDP_force_pad_mode = 1;
}
else if (read_swing_value==2) // test tx phy
{
myDP_force_pad_mode = 0;
}
else if (read_swing_value==3)
{
g_pre_emphis_value = 2;
printk("7808 6db\n");
}
else if (read_swing_value==4)
{
g_pre_emphis_value = 3;
printk("7808 9db\n");
}
else if (read_swing_value==5)
{
g_dump_7730_reg = 1;
}
else if (read_swing_value==6)
{
g_dump_7730_reg = 0;
}
else if (read_swing_value==7)
{
unchar c=0;
printk("[myDP] HW reset === 7730reg 0x72, 0x06 bit0\n");
i2c_master_read_reg(5,0x06, &c);
c = c | 0x01;
i2c_master_write_reg(5,0x06, c);
}
else if (read_swing_value==8)
{
unchar c=0;
int i;
printk("******* ANX7730 reg 0x50 DUMP ============\n");
for (i=0; i <=0xff; i++)
{
i2c_master_read_reg(0, i , &c);
if (i%0xf)
printk("0x%x = (%x), ", i, c);
else
printk("0x%x = (%x)\n", i, c);
}
printk("******* ANX7730 reg 0x72 DUMP ============\n");
for (i=0; i <=0xff; i++)
{
i2c_master_read_reg(5, i , &c);
if (i%0xf)
printk("0x%x = (%x), ", i, c);
else
printk("0x%x = (%x)\n", i, c);
}
}
else if (read_swing_value==9)
{
g_force_swing_value = 1;
}
else if (read_swing_value==10)
{
g_force_swing_value = 0;
}
else if (read_swing_value==11)
{
g_swing_value = 0;
printk("7808 swing = 200mv\n");
}
else if (read_swing_value==12)
{
g_swing_value = 1;
printk("7808 swing = 400mv\n");
}
else if (read_swing_value==13)
{
g_swing_value = 2;
printk("7808 swing = 600mv\n");
}
else if (read_swing_value==14)
{
g_swing_value = 3;
printk("7808 swing = 800mv\n");
}
else if (read_swing_value==15)
{
sp_read_reg(TX_P0, 0xa3, &c);
printk("=== TX_P0 0xa3: %x ===\n",c);
}
return 0;
}
static int dp_reset_pd_function(const char *val, struct kernel_param *kp)
{
int ret=0;
int old_val = dp_pd_value;
struct anx7808_platform_data *pdata = anx7808_client->dev.platform_data;
if (ret)
return ret;
if (dp_pd_value > 0xf) {
dp_pd_value = old_val;
return -EINVAL;
}
ret = param_set_int(val, kp);
if(dp_pd_value==0){
/*
gpio_set_value(pdata->gpio_usb_select, 0);
msleep(20);
gpio_set_value(pdata->gpio_usb_select, 1);
msleep(500);
gpio_set_value(pdata->gpio_usb_select, 0);
msleep(20);
gpio_set_value(pdata->gpio_usb_select, 1);
msleep(500);
*/
unchar ch, cl;
uint n;
sp_read_reg(RX_P0, HDMI_RX_HTOTAL_LOW, &cl);
sp_read_reg(RX_P0, HDMI_RX_HTOTAL_HIGH, &ch);
n = ch;
n = (n << 8) + cl;
printk("ANX7808 RX cur_h_res = 0x%x\n", n);
sp_read_reg(RX_P0, HDMI_RX_VTOTAL_LOW, &cl);
sp_read_reg(RX_P0, HDMI_RX_VTOTAL_HIGH, &ch);
n = ch;
n = (n << 8) + cl;
printk("ANX7808 RX cur_v_res = 0x%x\n", n);
sp_read_reg(RX_P0, HDMI_RX_VID_PCLK_CNTR_REG, &cl);
printk("ANX7808 RX cur_pix_clk = 0x%x\n", cl);
sp_read_reg(RX_P0, HDMI_RX_HDMI_STATUS_REG, &cl);
printk("ANX7808 RX dvi_status = 0x%x\n", ((cl & HDMI_MODE) == HDMI_MODE));
}else if (dp_pd_value==1) {
gpio_set_value(pdata->gpio_usb_select, 0);
msleep(20);
gpio_set_value(pdata->gpio_usb_select, 1);
msleep(20);
gpio_set_value(pdata->gpio_usb_select, 0);
msleep(20);
gpio_set_value(pdata->gpio_usb_select, 1);
msleep(20);
gpio_set_value(pdata->gpio_usb_select, 0);
msleep(20);
gpio_set_value(pdata->gpio_usb_select, 1);
msleep(20);
gpio_set_value(pdata->gpio_usb_select, 0);
msleep(20);
gpio_set_value(pdata->gpio_usb_select, 1);
}
else if (dp_pd_value==2) {
sp_tx_hardware_power_set(1);
}
else if (dp_pd_value==3) {
sp_tx_hardware_power_set(0);
}
else if (dp_pd_value==4) {
sp_tx_hardware_poweron(anx7808_client);
}
else if (dp_pd_value==5) {
sp_tx_hardware_powerdown(anx7808_client);
}
else if (dp_pd_value==6) {
unchar c1=0;
/*
unchar addr_tmp = 0x50;
switch(addr_tmp)
{
case 0x50: c= 0; break;
case 0x8c: c= 1; break;
case 0x70: c= 7; break;
case 0x72: c = 5; break;
case 0x7a: c = 6; break;
default : break;
}
*/
i2c_master_read_reg(0, 0x0B, &c1);
printk("[myDP] 7730reg 0x50, 0x0B=%x\n", (uint)c1);
msleep(1);
i2c_master_read_reg(5, 0xE3, &c1);
printk("[myDP] 7730reg 0x72, 0xE3=%x\n", (uint)c1);
msleep(1);
i2c_master_read_reg(0, 0x06, &c1);
printk("[myDP] 7730reg 0x50, 0x06=%x\n", (uint)c1);
msleep(1);
i2c_master_read_reg(5, 0x06, &c1);
printk("[myDP] 7730reg 0x72, 0x06=%x\n", (uint)c1);
i2c_master_read_reg(0, 0x05, &c1);
printk("[myDP] 7730reg 0x50, 0x05=%x\n", (uint)c1);
}
else if (dp_pd_value==7) {
unchar c=0;
printk("[myDP] write 7730reg 0, 0x06 bit5\n");
i2c_master_read_reg(0,0x06, &c);
c = c | 0x20;
i2c_master_write_reg(0,0x06, c);
}
else if (dp_pd_value==8) {
unchar c=0;
printk("[myDP] write 7730reg 0, 0x06 bit3\n");
i2c_master_read_reg(0,0x06, &c);
c = c | 0x08;
i2c_master_write_reg(0,0x06, c);
}
else if (dp_pd_value==9) {
unchar c=0;
printk("[myDP] write 7730reg 0, 0x06 bit2\n");
i2c_master_read_reg(0,0x06, &c);
c = c | 0x04;
i2c_master_write_reg(0,0x06, c);
}
else if (dp_pd_value==10) {
unchar c=0;
printk("[myDP] write 7730reg 0, 0x06 bit0\n");
i2c_master_read_reg(0,0x06, &c);
c = c | 0x01;
i2c_master_write_reg(0,0x06, c);
}
else if (dp_pd_value==11) {
unchar c=0;
printk("[myDP] write 7730reg 5, 0x06 bit5\n");
i2c_master_read_reg(5,0x06, &c);
c = c | 0x20;
i2c_master_write_reg(5,0x06, c);
}
else if (dp_pd_value==12) {
myDP_TV_mode = 1;
}
else if (dp_pd_value==13) {
myDP_TV_mode = 0;
}
else if (dp_pd_value==14) {
// printk("[myDP shell] switch to myDP\n");
// gpio_set_value(pdata->gpio_usb_select, 1);
myDP_DP_Dongle = 1;
}
else if (dp_pd_value==15) {
// printk("[myDP shell] switch to USB\n");
// gpio_set_value(pdata->gpio_usb_select, 0);
myDP_DP_Dongle = 0;
}
return 0;
}
static void slimport_playback_proc(void)
{
unchar c1 = 0;
unchar c=0;
unchar c2=0;
if (g_dump_7808_reg)
{
//0x7E, 8B
dump_7808_reg_info();
// dump_7808_reg_pclk();
sp_tx_show_infomation();
}
if (g_dump_7730_reg)
{
sp_tx_link_err_check_1();
sp_read_reg(TX_P2, SP_TX_TOTAL_PIXEL_STA_L, &c);
sp_read_reg(TX_P2, SP_TX_TOTAL_PIXEL_STA_H, &c1);
if(c1!=0x7||c!=0xd0)
printk("ANX7808 TX cur_h_res = 0x%x,0x%x\n", c,c1);
sp_read_reg(TX_P2, SP_TX_TOTAL_LINE_STA_L, &c);
sp_read_reg(TX_P2, SP_TX_TOTAL_LINE_STA_H, &c1);
if(c1!=0x4||c!=0xd3)
printk("ANX7808 TX cur_v_res = 0x%x\n,0x%x\n", c,c1);
if ( (sp_tx_asus_pad) && (!myDP_DP_Dongle) )
{
//========================================
// disable 7730 OCM
i2c_master_write_reg(7,0xf0, 0);
i2c_master_read_reg(7,0xf0, &c);
if(c != 0 )
i2c_master_write_reg(7,0xf0, 0);
//========================================
i2c_master_read_reg(0, 0xcb, &c1);
i2c_master_read_reg(1, 0xd1, &c);
//i2c_master_read_reg(0, 0x31, &c2);
i2c_master_write_reg(0, 0xcb, c1);
i2c_master_write_reg(1, 0xd1, c);
if ((c1 & 0x08) || (c & 0x80))
{
printk("[myDP] # 7730 video FIFO error , 0xcb= (%x), RX ISR6 = (%x)\n", c1, c);
}
// printk("========== ANX7730 reg 0x50 DUMP ============\n");
/*
for (i=0x20; i <=0x30; i++)
{
i2c_master_read_reg(0, i , &c);
if (i%0xf)
printk("0x%x = (%x), ", i, c);
else
printk("0x%x = (%x)\n", i, c);
}
*/
i2c_master_read_reg(0, 0x24 , &c1);
i2c_master_read_reg(0, 0x25 , &c2);
if ((c1 != 0x7) || (c2 != 0xd0))
{
printk("Fail 7730 0x50 H total = (%x, %x)", c1, c2);
}
// printk("========== ANX7730 reg 0x72 DUMP ============\n");
/*
for (i=0x24; i <=0x34; i++)
{
i2c_master_read_reg(5, i , &c);
if (i%0xf)
printk("0x%x = (%x), ", i, c);
else
printk("0x%x = (%x)\n", i, c);
}
*/
i2c_master_read_reg(5, 0x2b , &c1);
i2c_master_read_reg(5, 0x2c , &c2);
if ((c1 != 0xd0) || (c2 != 0x7))
{
printk("Fail 7730 0x72 H total = (%x, %x)", c1, c2);
}
//
//========================================
// re-enable 7730 OCM
i2c_master_write_reg(7,0xf0, 0xe6);
i2c_master_write_reg(7,0xf0, 0xe6);
//========================================
}
}
}