static void write_enable(void) { static struct spi_ctx wren_ctx; static const enum EZPORT_CMD wren_cmd = EZPORT_WREN; spi_queue_xfer(&wren_ctx, EZPORT_SPI_CS, &wren_cmd, 1, NULL, 0, NULL, NULL); }
static void reset_target(void) { static struct spi_ctx reset_ctx; static const enum EZPORT_CMD reset_cmd = EZPORT_RESET; spi_queue_xfer(&reset_ctx, EZPORT_SPI_CS, &reset_cmd, 1, NULL, 0, NULL, NULL); }
static void check_status(void) { static struct spi_ctx rdsr_ctx; static const enum EZPORT_CMD rdsr_cmd = EZPORT_RDSR; static uint8_t rxbuf[2]; spi_queue_xfer(&rdsr_ctx, EZPORT_SPI_CS, &rdsr_cmd, 1, rxbuf, 2, walk_state, &rxbuf[1]); }
static void bulk_erase(void) { static struct spi_ctx be_ctx; static const enum EZPORT_CMD be_cmd = EZPORT_BE; write_enable(); spi_queue_xfer(&be_ctx, EZPORT_SPI_CS, &be_cmd, 1, NULL, 0, NULL, NULL); check_status(); }
static void spiflash_check_write_completed_spi_cb(void *cbdata) { struct spiflash_transaction *trans = cbdata; /* if not busy, call the user callback; otherwise, reissue get status */ if (!(trans->spi_response[1] & 1)) { spiflash_transaction_done(trans); } else { spi_queue_xfer(&trans->dev->flash_spi_ctx, trans->dev->cs, trans->spi_query, 1, trans->spi_response, 2, spiflash_check_write_completed_spi_cb, trans); } }
static void spiflash_transaction_dispatched_spi_cb(void *cbdata) { struct spiflash_transaction *trans = cbdata; if (trans->flags.wait_busy) { /* command and data transferred, wait for the busy flag to clear */ trans->spi_query[0] = 0x05; spi_queue_xfer(&trans->dev->flash_spi_ctx, trans->dev->cs, trans->spi_query, 1, trans->spi_response, 2, spiflash_check_write_completed_spi_cb, trans); } else { spiflash_transaction_done(trans); } }
static void spiflash_schedule(struct spiflash_device *dev) { if (dev->queue == NULL) return; if (dev->queue->flags.running) return; struct spiflash_transaction *trans = dev->queue; trans->flags.running = true; if (trans->prelude_command != NO_OP) { /* send prelude, e.g. write enable, then run transaction */ spi_queue_xfer(&trans->dev->flash_spi_ctx, trans->dev->cs, &trans->prelude_command, 1, NULL, 0, spiflash_write_enabled_spi_cb, trans); } else { spiflash_run_transaction(trans); } }