int accel_start() {
//switch on:
spi_lock();
accel_reg_read8(ACCEL_REG_DD_ACK);
accel_reg_write8(ACCEL_REG_CTRL_REG1, 0xC7);
accel_reg_write8(ACCEL_REG_CTRL_REG2, 0x08); // INT
//accel_reg_write8(ACCEL_REG_CTRL_REG2, 0x04); // DRDY
accel_reg_write8(ACCEL_REG_CTRL_REG3, 0x4b);
// DD threshold (0xffff / 2 = 0x7fff = FS (2g)
// => 1g = 0x7fff / 2 = 0x3fff (16383)
accel_reg_write16(ACCEL_REG_DD_THSE_L, 0x2800); // 0.6g
//accel_reg_write16(ACCEL_REG_DD_THSI_L, 0x2600);
accel_reg_write16(ACCEL_REG_DD_THSI_L, 0x1300); // 0.3g
accel_reg_read8(ACCEL_REG_HP_FILTER_RESET);
//accel_reg_write8(ACCEL_REG_DD_CFG, 0xcf); // X & Y DD
//accel_reg_write8(ACCEL_REG_DD_CFG, 0xfc); // Y & Z DD
//accel_reg_write8(ACCEL_REG_DD_CFG, 0xcc); // Y (hi/low) only
accel_reg_write8(ACCEL_REG_DD_CFG, 0xc4); // Y (low) only
spi_unlock();
}
int accel_stop() {
//switch off:
spi_lock();
accel_reg_write8(ACCEL_REG_CTRL_REG1, 0x00);
spi_unlock();
}
/** \brief write N page on [page]
*
* \param page uint32_t unit : byte (4096 * N,1 page = 4096byte)
* \param buffer const uint8_t*
* \param size uint32_t unit : byte ( 4096*N )
* \return uint32_t
*
*/
uint32_t sst25vfxx_page_write(uint32_t page,const uint8_t * buffer,uint32_t size)
{
uint32_t index;
page &= ~0xFFF; // page size = 4096byte
spi_lock();
spi_config();
//CS_LOW();
spi_readwrite( CMD_WREN );//write en
//CS_HIGH();
//CS_LOW();
spi_readwrite( CMD_ERASE_4K );
spi_readwrite( page >> 16 );
spi_readwrite( page >> 8 );
spi_readwrite( page );
//CS_HIGH();
sst25vfxx_wait_busy(); // wait erase done.
//CS_LOW();
spi_readwrite( CMD_WREN );//write en
//CS_HIGH();
//CS_LOW();
spi_readwrite( CMD_AAIP );
spi_readwrite( page>>16 );
spi_readwrite( page>>8 );
spi_readwrite( page );
spi_readwrite( *buffer++ );
spi_readwrite( *buffer++ );
size -= 2;
//CS_HIGH();
sst25vfxx_wait_busy();
for(index=0; index < size/2; index++)
{
//CS_LOW();
spi_readwrite( CMD_AAIP );
spi_readwrite( *buffer++ );
spi_readwrite( *buffer++ );
//CS_HIGH();
sst25vfxx_wait_busy();
}
//CS_HIGH();
//CS_LOW();
spi_readwrite( CMD_WRDI );
//CS_HIGH();
spi_unlock();
return size;
}
//------------------------------------------------------------------------------
static void ds1390_wr_b(unsigned char addr, unsigned char byte )
{
spi_lock();
ds1390_select();
memory_spi_rw(0x80 | addr);
memory_spi_rw(byte);
ds1390_unselect();
spi_unlock();
}
//------------------------------------------------------------------------------
static unsigned char ds1390_rd_b(unsigned char addr )
{
unsigned char byte;
spi_lock();
ds1390_select();
memory_spi_rw(addr);
byte = memory_spi_rw(0xFF);
ds1390_unselect();
spi_unlock();
return byte;
}
//------------------------------------------------------------------------------
static void ds1390_rd(unsigned char* buf)
{
unsigned char len = sizeof (DS1390_DATA_BUF);
spi_lock();
ds1390_select();
memory_spi_rw(0x00);
while (len--)
*buf++ = memory_spi_rw(0xFF);
ds1390_unselect();
spi_unlock();
}
//------------------------------------------------------------------------------
static void ds1390_wr(unsigned char* buf)
{
unsigned char len = sizeof (DS1390_DATA_BUF);
spi_lock();
ds1390_select();
memory_spi_rw(0x80);
while (len--)
{
memory_spi_rw(*buf++);
}
ds1390_unselect();
spi_unlock();
}
/** \brief read [size] byte from [offset] to [buffer]
*
* \param offset uint32_t unit : byte
* \param buffer uint8_t*
* \param size uint32_t unit : byte
* \return uint32_t byte for read
*
*/
uint32_t sst25vfxx_read(uint32_t offset,uint8_t * buffer,uint32_t size)
{
uint32_t index;
spi_lock();
spi_config();
//CS_LOW();
spi_readwrite( CMD_WRDI );
//CS_HIGH();
//CS_LOW();
spi_readwrite( CMD_READ);
spi_readwrite( offset>>16 );
spi_readwrite( offset>>8 );
spi_readwrite( offset );
#if SPI_FLASH_USE_DMA
for(index=0; index<size/DMA_BUFFER_SIZE; index++)
{
DMA_RxConfiguration((rt_uint32_t)_spi_flash_buffer, DMA_BUFFER_SIZE);
SPI_I2S_ClearFlag(SPI1, SPI_I2S_FLAG_RXNE);
SPI_I2S_DMACmd(SPI1, SPI_I2S_DMAReq_Tx | SPI_I2S_DMAReq_Rx, ENABLE);
while (DMA_GetFlagStatus(DMA1_FLAG_TC2) == RESET);
SPI_I2S_DMACmd(SPI1, SPI_I2S_DMAReq_Tx | SPI_I2S_DMAReq_Rx, DISABLE);
rt_memcpy(buffer,_spi_flash_buffer,DMA_BUFFER_SIZE);
buffer += DMA_BUFFER_SIZE;
}
#else
for(index=0; index<size; index++)
{
*buffer++ = spi_readwrite(0xFF);
}
#endif
//CS_HIGH();
spi_unlock();
return size;
}
int accel_read(int16_t *x, int16_t *y, int16_t *z, bool lock) {
if (lock)
spi_lock();
/*
while(1) {
uint8_t s = accel_reg_read8(ACCEL_REG_STATUS_REG);
if (s & 0x08)
break;
}
*/
#if 1
*x = accel_reg_read16(ACCEL_REG_OUTX_L);
*y = accel_reg_read16(ACCEL_REG_OUTY_L);
*z = accel_reg_read16(ACCEL_REG_OUTZ_L);
#else
uint8_t l, h;
spi_rw_bytes(0, out, in, 7, 1);
l = in[1];
h = in[2];
*x = (h << 8) | l;
l = in[3];
h = in[4];
*y = (h << 8) | l;
l = in[5];
h = in[2];
*z = (h << 8) | l;
#endif
if (lock)
spi_unlock();
return 0;
}
static void nap_exti_thread(void *arg)
{
(void)arg;
chRegSetThreadName("NAP ISR");
while (TRUE) {
/* Waiting for the IRQ to happen.*/
chBSemWaitTimeout(&nap_exti_sem, MS2ST(PROCESS_PERIOD_ms));
/* We need a level (not edge) sensitive interrupt -
* if there is another interrupt pending on the Swift
* NAP then the IRQ line will stay high. Therefore if
* the line is still high, don't suspend the thread.
*/
spi_lock(SPI_SLAVE_FPGA);
while (palReadLine(LINE_NAP_IRQ)) {
handle_nap_exti();
}
tracking_channels_process();
spi_unlock(SPI_SLAVE_FPGA);
}
}
void
spi_xfer_end(spi_desc_t *desc)
{
spi_xfer_wait(desc);
spi_unlock(desc->spi_dev_id);
}
/** \brief sst25vfxx SPI flash init
*
* \param void
* \return void
*
*/
rt_err_t rt_hw_sst25vfxx_init(const char * spi_device_name)
{
port_init();
if (rt_sem_init(&spi2_lock, "spi2lock", 1, RT_IPC_FLAG_FIFO) != RT_EOK)
{
rt_kprintf("init spi2 lock semaphore failed\n");
}
rt_spi_device = (struct rt_spi_device *)rt_device_find(spi_device_name);
if(rt_spi_device == RT_NULL)
{
FLASH_TRACE("spi device %s not found!\r\n", spi_device_name);
return -RT_ENOSYS;
}
/* config spi */
{
struct rt_spi_configuration cfg;
cfg.data_width = 8;
cfg.mode = RT_SPI_MODE_0 | RT_SPI_MSB; /* SPI Compatible: Mode 0 and Mode 3 */
cfg.max_hz = 9 * 1000 * 1000; /* 10M */
rt_spi_configure(rt_spi_device, &cfg);
}
spi_lock();
spi_config();
//CS_LOW();
spi_readwrite( CMD_WRDI );
//CS_HIGH();
//CS_LOW();
spi_readwrite( CMD_JEDEC_ID );
device_id = spi_readwrite(0xFF);
device_id |= spi_readwrite(0xFF)<<8;
device_id |= spi_readwrite(0xFF)<<16;
//CS_HIGH();
if(device_id == SST25VF016)
{
FLASH_TRACE("FLASH TYPE : SST25VF016\r\n");
rt_kprintf("SPI Flash device_id is : 0x%X !\n",device_id);
//CS_LOW();
spi_readwrite( CMD_DBSY );
//CS_HIGH();
//CS_LOW();
spi_readwrite( CMD_EWSR );
//CS_HIGH();
//CS_LOW();
spi_readwrite( CMD_WRSR );
spi_readwrite( 0 );
//CS_HIGH();
}
rt_kprintf("SPI Flash device_id is : 0x%X !\n",device_id);
spi_unlock();
spi_flash_device.type = RT_Device_Class_Block;
spi_flash_device.init = sst25vfxx_flash_init;
spi_flash_device.open = sst25vfxx_flash_open;
spi_flash_device.close = sst25vfxx_flash_close;
spi_flash_device.read = sst25vfxx_flash_read;
spi_flash_device.write = sst25vfxx_flash_write;
spi_flash_device.control = sst25vfxx_flash_control;
/* no private */
spi_flash_device.user_data = RT_NULL;
rt_device_register(&spi_flash_device, "spi0",
RT_DEVICE_FLAG_RDWR | RT_DEVICE_FLAG_STANDALONE);
return RT_EOK;
}
