static int __init mt_psci_cpu_prepare(unsigned int cpu)
{
pr_warn("[AT]CPU%d psci_cpu_prepare\n", cpu);
if (cpu == 1)
spm_mtcmos_cpu_init();
return cpu_psci_ops.cpu_prepare(cpu);
}
void __init mt_smp_prepare_cpus(unsigned int max_cpus)
{
#if !defined (CONFIG_ARM_PSCI)
/*
* 20140512 marc.huang
* 1. only need to get core count if !defined(CONFIG_OF)
* 2. only set possible cpumask in mt_smp_init_cpus() if !defined(CONFIG_OF)
* 3. only set present cpumask in mt_smp_prepare_cpus() if !defined(CONFIG_OF)
*/
#if !defined(CONFIG_OF)
int i;
for (i = 0; i < max_cpus; i++)
set_cpu_present(i, true);
#endif //#if !defined(CONFIG_OF)
#ifdef CONFIG_MTK_FPGA
/* write the address of slave startup into the system-wide flags register */
mt_reg_sync_writel(virt_to_phys(mt_secondary_startup), SLAVE_JUMP_REG);
#endif
/* Set all cpus into AArch32 */
mcusys_smc_write(MP0_MISC_CONFIG3, REG_READ(MP0_MISC_CONFIG3) & 0xFFFF0FFF);
// mcusys_smc_write(MP1_MISC_CONFIG3, REG_READ(MP1_MISC_CONFIG3) & 0xFFFF0FFF);
//#ifndef CONFIG_MTK_FPGA
/* enable bootrom power down mode */
REG_WRITE(BOOTROM_SEC_CTRL, REG_READ(BOOTROM_SEC_CTRL) | SW_ROM_PD);
//#endif
/* write the address of slave startup into boot address register for bootrom power down mode */
#if defined (MT_SMP_VIRTUAL_BOOT_ADDR)
mt_reg_sync_writel(virt_to_phys(mt_smp_boot), BOOTROM_BOOT_ADDR);
#else
mt_reg_sync_writel(virt_to_phys(mt_secondary_startup), BOOTROM_BOOT_ADDR);
#endif
#endif //#if !defined (CONFIG_ARM_PSCI)
/* initial spm_mtcmos memory map */
spm_mtcmos_cpu_init();
}
