/* * Initialize the timer systems of the STM32 */ void __init stm32_timer_init(void) { /* * Configure the STM32 clocks, and get the reference clock value */ stm32_clock_init(); tick_tmr_clk = stm32_clock_get(TICK_TIM_CLOCK); src_tmr_clk = stm32_clock_get(CLOCK_HCLK) / 8; /* * Init clockevents (sys timer) */ tick_tmr_init(); /* * Init clocksource */ src_tmr_init(); }
/* * Register the STM32 specific SPI controllers and devices with the kernel. */ void __init stm32_spi_init(void) { int p = stm32_platform_get(); #if defined(CONFIG_STM32_SPI1) platform_set_drvdata(&spi_stm32_dev1, (void *) stm32_clock_get(CLOCK_PCLK2)); platform_device_register(&spi_stm32_dev1); #endif #if defined(CONFIG_STM32_SPI2) platform_set_drvdata(&spi_stm32_dev2, (void *) stm32_clock_get(CLOCK_PCLK1)); platform_device_register(&spi_stm32_dev2); #endif #if defined(CONFIG_STM32_SPI3) platform_set_drvdata(&spi_stm32_dev3, (void *) stm32_clock_get(CLOCK_PCLK1)); platform_device_register(&spi_stm32_dev3); #endif #if defined(CONFIG_STM32_SPI4) platform_set_drvdata(&spi_stm32_dev4, (void *) stm32_clock_get(CLOCK_PCLK2)); platform_device_register(&spi_stm32_dev4); #endif #if defined(CONFIG_STM32_SPI5) platform_set_drvdata(&spi_stm32_dev5, (void *) stm32_clock_get(CLOCK_PCLK2)); platform_device_register(&spi_stm32_dev5); #endif #if defined(CONFIG_STM32_SPI6) platform_set_drvdata(&spi_stm32_dev6, (void *) stm32_clock_get(CLOCK_PCLK2)); platform_device_register(&spi_stm32_dev6); #endif if (p == PLATFORM_STM32_STM_SOM || p == PLATFORM_STM32_STM_STM32F439_SOM) { /* This assumes that there is an SPI Flash device * handwired to SPI5 on the breadboard area of SOM-BSB-EXT. * SPI Flash can be accessed either via SPIDEV interface * and this takes precedence if SPIDEV is enabled in the kernel. * If SPIDEV is disabled, then SPI Flash can be * accessed via the Flash MTD interface */ #if defined(CONFIG_STM32_SPI5) && \ (defined(CONFIG_MTD_M25P80) || defined(CONFIG_SPI_SPIDEV)) /* * Flash MTD partitioning. * This is used only if CONFIG_SPIDEV is undefined */ #if !defined(CONFIG_SPI_SPIDEV) /* * SPI Flash partitioning: */ # define FLASH_JFFS2_OFFSET__STM32F4_SOM (1024 * 1024 * 1) # define FLASH_SIZE__STM32F4_SOM (1024 * 1024 * 4) static struct mtd_partition spi_stm32_flash_partitions__stm32f4_som[] = { { .name = "spi_flash_part0", .size = FLASH_JFFS2_OFFSET__STM32F4_SOM, .offset = 0, }, { .name = "spi_flash_part1", .size = FLASH_SIZE__STM32F4_SOM - FLASH_JFFS2_OFFSET__STM32F4_SOM, .offset = FLASH_JFFS2_OFFSET__STM32F4_SOM, }, };
/* * Register the STM32 specific I2C devices with the kernel. */ void __init stm32_i2c_init(void) { int p = stm32_platform_get(); #if defined(CONFIG_STM32_I2C1) /* * Pass the device parameters to the driver */ i2c_stm32_data_dev1.ref_clk = stm32_clock_get(CLOCK_PCLK1); platform_set_drvdata(&i2c_stm32_dev1, &i2c_stm32_data_dev1); /* * Register a platform device for this interface */ platform_device_register(&i2c_stm32_dev1); #endif #if defined(CONFIG_STM32_I2C2) /* * Pass the device parameters to the driver */ i2c_stm32_data_dev2.ref_clk = stm32_clock_get(CLOCK_PCLK1); platform_set_drvdata(&i2c_stm32_dev2, &i2c_stm32_data_dev2); /* * Register a platform device for this interface */ platform_device_register(&i2c_stm32_dev2); #endif #if defined(CONFIG_STM32_I2C3) /* * Pass the device parameters to the driver */ i2c_stm32_data_dev3.ref_clk = stm32_clock_get(CLOCK_PCLK1); platform_set_drvdata(&i2c_stm32_dev3, &i2c_stm32_data_dev3); /* * Register a platform device for this interface */ platform_device_register(&i2c_stm32_dev3); #endif #if defined(CONFIG_STM32_I2C4) /* * Pass the device parameters to the driver */ i2c_stm32_data_dev4.ref_clk = stm32_clock_get(CLOCK_PCLK1); platform_set_drvdata(&i2c_stm32_dev4, &i2c_stm32_data_dev4); /* * Register a platform device for this interface */ platform_device_register(&i2c_stm32_dev4); #endif /* * Perform board-specific I2C device registration */ if (p == PLATFORM_STM32_STM_SOM || p == PLATFORM_STM32_STM_STM32F439_SOM || p == PLATFORM_STM32_STM_STM32F7_SOM) { #if defined(CONFIG_STM32_I2C1) /* * This assumes that a compatible I2C EEPROM is * wired to I2C_1 in the baseboard area. */ #if defined(CONFIG_EEPROM_AT24) static struct i2c_board_info i2c_eeprom__dongle = { I2C_BOARD_INFO("24c512", 0x56) }; #endif #if defined(CONFIG_EEPROM_AT24) i2c_register_board_info(0, &i2c_eeprom__dongle, 1); #endif #endif } else if (p == PLATFORM_STM32_STM_DISCO) { #if defined(CONFIG_STM32_I2C3) #if defined(CONFIG_GPIO_PCAL6416A) static struct pcal6416a_platform_data stm32f4_pcal6416a_gpio_pdata = { .gpio_base = STM32_GPIO_LEN, }; #endif static struct i2c_board_info __initdata stm32f4_bdinfo_i2c3[] = { #if defined(CONFIG_GPIO_PCAL6416A) { I2C_BOARD_INFO("pcal6416a", 0x21), .platform_data = &stm32f4_pcal6416a_gpio_pdata, }, #endif #if defined(CONFIG_EEPROM_AT24) {