int stmpe_set_bits(struct stmpe *stmpe, u32 reg, u8 mask, u8 val)
{
u8 tmp;
int err;
err = stmpe_reg_read(stmpe, reg, &tmp);
tmp = (tmp & ~mask) | val;
if (!err)
err = stmpe_reg_write(stmpe, reg, tmp);
return err;
}
static void stmpe_gpio_set(struct gpio_chip *chip, unsigned offset, int val)
{
struct stmpe_gpio *stmpe_gpio = gpiochip_get_data(chip);
struct stmpe *stmpe = stmpe_gpio->stmpe;
int which = val ? STMPE_IDX_GPSR_LSB : STMPE_IDX_GPCR_LSB;
u8 reg = stmpe->regs[which + (offset / 8)];
u8 mask = BIT(offset % 8);
/*
* Some variants have single register for gpio set/clear functionality.
* For them we need to write 0 to clear and 1 to set.
*/
if (stmpe->regs[STMPE_IDX_GPSR_LSB] == stmpe->regs[STMPE_IDX_GPCR_LSB])
stmpe_set_bits(stmpe, reg, mask, val ? mask : 0);
else
stmpe_reg_write(stmpe, reg, mask);
}
static ssize_t stmpe_write(struct cdev *cdev, const void *_buf, size_t count, loff_t offset, ulong flags)
{
struct stmpe *stmpe = to_stmpe(cdev);
const u8 *buf = _buf;
size_t i = count;
int err;
while (i) {
err = stmpe_reg_write(stmpe, offset, *buf);
if (err)
return (ssize_t)err;
buf++;
i--;
offset++;
}
return count;
}
