Пример #1
0
int main(int argc, char *argv[]) {
    char *client_id = argc > 1 ? argv[1] : "local1";

    lwm2m_context *context = lwm2m_create_context();
    context->has_smartcard = false;
    context->objects = create_example_objects();
    context->factory_bootstrap_callback = perform_factory_bootstrap;
    context->smartcard_bootstrap_callback = NULL;
    context->client_id = client_id;
    context->tls = 0;

//    context->broker_address = "tcp://ec2-52-212-253-117.eu-west-1.compute.amazonaws.com:1883";
    context->broker_address = "34.250.196.139:1883";
    context->endpoint_client_name = client_id;

    lwm2m_start_client(context);

    getchar();
    printf("Stopping...\n");
    // Deregister from all servers
    for (list_elem *elem = context->servers->first; elem != NULL; elem = elem->next) {
        lwm2m_server *server = elem->value;
        deregister(server);
    }
    sleep(2);
    stop_mqtt(context);
    stop_scheduler(context->scheduler);
    return 0;
}
Пример #2
0
/* all clocks in the 1.8 V domain are stopped,
 * the PLL, the HSI and the HSE RC oscillators are disabled.
 * SRAM and register contents are preserved.
 * all I/O pins keep the same state as in the Run mode.
 * ADC, DAC, WDG, RTC, LSI_RC, and LSE_OSC can consume power. */
void __enter_stop_mode()
{
	unsigned int irqflag;

	irq_save(irqflag);
	local_irq_disable();

	PWRCLK_ENABLE();
	SCB_SCR |= 4; /* Set SLEEPDEEP bit */
	/* Clear PDDS bit in Power Control register (PWR_CR) */
	PWR_CR |= 1; /* configure LPDS bit in PWR_CR */

	stop_scheduler();
	dsb();
	__wfi();
	clock_init();
	run_scheduler();

	SCB_SCR &= ~4;
	PWR_CR &= ~1;
	PWRCLK_DISABLE();

	irq_restore(irqflag);

	/* wakeup latency:
	 * HSI RC wakeup time + regulator wakeup time from Low-power mode */

	/* Note from reference manual:
	 * If the application needs to disable the external clock before
	 * entering Stop mode, the HSEON bit must first be disabled and the
	 * system clock switched to HSI. Otherwise, if the HSEON bit remains
	 * enabled and the external clock (external oscillator) is removed when
	 * entering Stop mode, the clock security system (CSS) feature must be
	 * enabled to detect any external oscillator failure and avoid a
	 * malfunction behavior when entering stop mode. */
	//BITBAND(&RCC_CR, CSSON, ON);
}