/*! \brief Enable the USART system clock in SPI master mode.
*
* \param p_usart Pointer to Base address of the USART instance.
*
*/
void usart_spi_init(Usart *p_usart)
{
uint8_t uc_id;
#ifdef USART0
if (p_usart == USART0) {
uc_id = ID_USART0;
}
#endif
#ifdef USART1
else if(p_usart == USART1) {
uc_id = ID_USART1;
}
#endif
#ifdef USART2
else if(p_usart == USART2) {
uc_id = ID_USART2;
}
#endif
#ifdef USART3
else if(p_usart == USART3) {
uc_id = ID_USART3;
}
#endif
sysclk_enable_peripheral_clock(uc_id);
}
/*
* \brief Initializes the TFA
*
* This function is called to initialize the TFA.
*
* \return MAC_SUCCESS if everything went correct;
* FAILURE otherwise
*/
retval_t tfa_init(void)
{
init_tfa_pib();
write_all_tfa_pibs_to_trx();
sysclk_enable_peripheral_clock(&ADC);
return MAC_SUCCESS;
}
/**
* \brief Run TRNG driver unit tests.
*/
int main(void)
{
const usart_serial_options_t usart_serial_options = {
.baudrate = CONF_TEST_BAUDRATE,
.charlength = CONF_TEST_CHARLENGTH,
.paritytype = CONF_TEST_PARITY,
.stopbits = CONF_TEST_STOPBITS
};
sysclk_init();
board_init();
sysclk_enable_peripheral_clock(CONSOLE_UART_ID);
stdio_serial_init(CONF_TEST_USART, &usart_serial_options);
/* Define all the test cases */
DEFINE_TEST_CASE(trng_test, NULL, run_trng_test, NULL,
"trng random value generate test");
/* Put test case addresses in an array */
DEFINE_TEST_ARRAY(trng_test_array) = {
&trng_test,};
/* Define the test suite */
DEFINE_TEST_SUITE(trng_suite, trng_test_array,
"trng driver test suite");
/* Run all tests in the test suite */
test_suite_run(&trng_suite);
while (1) {
/* Busy-wait forever */
}
}
/**
* Configure board USART communication with PC or other terminal.
*/
static void configure_usart(void)
{
const sam_usart_opt_t usart_console_settings = {
BOARD_USART_BAUDRATE,
US_MR_CHRL_8_BIT,
US_MR_PAR_NO,
US_MR_NBSTOP_1_BIT,
US_MR_CHMODE_NORMAL,
BOARD_USART_IRDA_FILTER
};
/* Enable peripheral clock. */
sysclk_enable_peripheral_clock(BOARD_ID_USART);
/* Configure USART in IrDA mode. */
usart_init_irda(BOARD_USART, &usart_console_settings, sysclk_get_cpu_hz());
/* Disable all the interrupts. */
usart_disable_interrupt(BOARD_USART, ALL_INTERRUPT_MASK);
/* Enable TX & RX function. */
usart_enable_tx(BOARD_USART);
usart_enable_rx(BOARD_USART);
/* Configure and enable interrupt of USART. */
NVIC_EnableIRQ(USART_IRQn);
}
/**
* \brief USART RS485 mode configuration.
*
* Configure USART in RS485 mode, asynchronous, 8 bits, 1 stop bit,
* no parity, 256000 bauds and enable its transmitter and receiver.
*/
void configure_usart(void)
{
const sam_usart_opt_t usart_console_settings = {
BOARD_USART_BAUDRATE,
US_MR_CHRL_8_BIT,
US_MR_PAR_NO,
US_MR_NBSTOP_1_BIT,
US_MR_CHMODE_NORMAL,
/* This field is only used in IrDA mode. */
0
};
/* Enable the peripheral clock in the PMC. */
sysclk_enable_peripheral_clock(BOARD_ID_USART);
/* Configure USART in RS485 mode. */
//jsi 7feb16 we want rs232 not rs485 for our application usart_init_rs485(BOARD_USART, &usart_console_settings,
//jsi 7feb16 we want rs232 not rs485 for our application sysclk_get_cpu_hz());
usart_init_rs232(BOARD_USART, &usart_console_settings, sysclk_get_cpu_hz());
/* enable transmitter timeguard, 4 bit period delay. */
usart_set_tx_timeguard(BOARD_USART, 4);
/* Disable all the interrupts. */
usart_disable_interrupt(BOARD_USART, ALL_INTERRUPT_MASK);
/* Enable TX & RX function. */
usart_enable_tx(BOARD_USART);
usart_enable_rx(BOARD_USART);
/* Configure and enable interrupt of USART. */
NVIC_EnableIRQ(USART_IRQn);
}
wwd_result_t platform_bus_exit_powersave( void )
{
if ( sdio_bus_initted == WICED_TRUE )
{
uint32_t a;
/* Enable SDIO peripheral clock */
for ( a = WWD_PIN_SDIO_CLK; a < WWD_PIN_SDIO_MAX; a++ )
{
if( a == WWD_PIN_SDIO_OOB_IRQ )
{
platform_gpio_peripheral_pin_init( &wifi_sdio_pins[a], 0 );
}
else
{
platform_gpio_peripheral_pin_init( &wifi_sdio_pins[a], ( IOPORT_MODE_MUX_C | IOPORT_MODE_PULLUP ));
}
}
/* Enable the MCI peripheral */
sysclk_enable_peripheral_clock( ID_HSMCI );
}
return WICED_SUCCESS;
}
/**
* \brief Configure UART console.
*/
static void configure_console(void)
{
#if SAMD21
struct usart_config usart_conf;
usart_get_config_defaults(&usart_conf);
usart_conf.mux_setting = CONF_STDIO_MUX_SETTING;
usart_conf.pinmux_pad0 = CONF_STDIO_PINMUX_PAD0;
usart_conf.pinmux_pad1 = CONF_STDIO_PINMUX_PAD1;
usart_conf.pinmux_pad2 = CONF_STDIO_PINMUX_PAD2;
usart_conf.pinmux_pad3 = CONF_STDIO_PINMUX_PAD3;
usart_conf.baudrate = CONF_STDIO_BAUDRATE;
stdio_serial_init(&cdc_uart_module, CONF_STDIO_USART_MODULE, &usart_conf);
usart_enable(&cdc_uart_module);
#elif SAME70
const usart_serial_options_t uart_serial_options = {
.baudrate = CONF_UART_BAUDRATE,
#ifdef CONF_UART_CHAR_LENGTH
.charlength = CONF_UART_CHAR_LENGTH,
#endif
.paritytype = CONF_UART_PARITY,
#ifdef CONF_UART_STOP_BITS
.stopbits = CONF_UART_STOP_BITS,
#endif
};
/* Configure console UART. */
sysclk_enable_peripheral_clock(CONSOLE_UART_ID);
stdio_serial_init(CONF_UART, &uart_serial_options);
#endif
}
/**
* \brief Configure USART in synchronous mode.
*
* \param ul_ismaster 1 for master, 0 for slave.
* \param ul_baudrate Baudrate for synchronous communication.
*
*/
static void configure_usart(uint32_t ul_ismaster, uint32_t ul_baudrate)
{
sam_usart_opt_t usart_console_settings = {
0,
US_MR_CHRL_8_BIT,
US_MR_PAR_NO,
US_MR_NBSTOP_1_BIT,
US_MR_CHMODE_NORMAL,
/* This field is only used in IrDA mode. */
0
};
usart_console_settings.baudrate = ul_baudrate;
/* Enable the peripheral clock in the PMC. */
sysclk_enable_peripheral_clock(BOARD_ID_USART);
/* Configure USART in SYNC. master or slave mode. */
if (ul_ismaster) {
usart_init_sync_master(BOARD_USART, &usart_console_settings, sysclk_get_cpu_hz());
} else {
usart_init_sync_slave(BOARD_USART, &usart_console_settings);
}
/* Disable all the interrupts. */
usart_disable_interrupt(BOARD_USART, ALL_INTERRUPT_MASK);
/* Enable TX & RX function. */
usart_enable_tx(BOARD_USART);
usart_enable_rx(BOARD_USART);
/* Configure and enable interrupt of USART. */
NVIC_EnableIRQ(USART_IRQn);
}
/**
* \brief Run SSC driver unit tests.
*/
int main(void)
{
const usart_serial_options_t usart_serial_options = {
.baudrate = CONF_TEST_BAUDRATE,
.paritytype = CONF_TEST_PARITY
};
sysclk_init();
board_init();
sysclk_enable_peripheral_clock(CONSOLE_UART_ID);
stdio_serial_init(CONF_TEST_USART, &usart_serial_options);
/* Define all the test cases. */
DEFINE_TEST_CASE(ssc_test, NULL, run_ssc_test, NULL,
"Init SSC in loop mode and check the received data with transmit data");
/* Put test case addresses in an array. */
DEFINE_TEST_ARRAY(ssc_tests) = {
&ssc_test,
};
/* Define the test suite */
DEFINE_TEST_SUITE(ssc_suite, ssc_tests, "SAM SSC driver test suite");
/* Run all tests in the test suite. */
test_suite_run(&ssc_suite);
while (1) {
/* Busy-wait forever. */
}
}
void serial_format(serial_t *obj, int data_bits, SerialParity parity, int stop_bits)
{
/* Sanity check arguments */
MBED_ASSERT(obj);
MBED_ASSERT((stop_bits == 1) || (stop_bits == 2));
MBED_ASSERT((parity == ParityNone) || (parity == ParityOdd) || (parity == ParityEven));
MBED_ASSERT((data_bits == 5) || (data_bits == 6) || (data_bits == 7) || (data_bits == 8));
uint32_t clockid = 0;
clockid = get_usart_clock_id(pUSART_S(obj));
if (clockid != (uint32_t)NC) {
sysclk_disable_peripheral_clock(clockid);
}
switch(stop_bits) { /*selecting the stop bits*/
case 1:
pSERIAL_S(obj)->uart_serial_options.stopbits = US_MR_NBSTOP_1_BIT;
break;
case 2:
pSERIAL_S(obj)->uart_serial_options.stopbits = US_MR_NBSTOP_2_BIT;
break;
}
switch(parity) { /*selecting the parity bits*/
case ParityNone:
pSERIAL_S(obj)->uart_serial_options.paritytype = US_MR_PAR_NO;
break;
case ParityOdd:
pSERIAL_S(obj)->uart_serial_options.paritytype = US_MR_PAR_ODD;
break;
case ParityEven:
pSERIAL_S(obj)->uart_serial_options.paritytype = US_MR_PAR_EVEN;
break;
case ParityForced1: /*No Hardware Support*/
MBED_ASSERT(0);
break;
case ParityForced0: /*No Hardware Support*/
MBED_ASSERT(0);
break;
}
switch(data_bits) { /*selecting the data bits*/
case 5:
pSERIAL_S(obj)->uart_serial_options.charlength = US_MR_CHRL_5_BIT;
break;
case 6:
pSERIAL_S(obj)->uart_serial_options.charlength = US_MR_CHRL_6_BIT;
break;
case 7:
pSERIAL_S(obj)->uart_serial_options.charlength = US_MR_CHRL_7_BIT;
break;
case 8:
pSERIAL_S(obj)->uart_serial_options.charlength = US_MR_CHRL_8_BIT;
break;
}
usart_serial_init(_USART(obj), &(pSERIAL_S(obj)->uart_serial_options));
sysclk_enable_peripheral_clock(clockid);
}
void tc_enable(volatile void *tc)
{
irqflags_t iflags = cpu_irq_save();
sysclk_enable_peripheral_clock(tc);
cpu_irq_restore(iflags);
}
void initOLEDFramebuffer()
{
sysclk_enable_peripheral_clock(SSD1306_SPI);
static SSD1306Framebuffer oled(SSD1306_SPI, SSD1306_SPI_NPCS, SSD1306_GPIO_DC_PIN, SSD1306_GPIO_RST_PIN, SSD1306_DISPLAY_WIDTH, SSD1306_DISPLAY_HEIGHT);
fb = &oled;
fb->init();
fb->clear();
fb->flush();
}
void i2c400_init(void)
{
m_options.speed_reg = TWI_BAUD(sysclk_get_cpu_hz(),m_options.speed);
sysclk_enable_peripheral_clock(&TWI_I2C400);
twi_master_init(&TWI_I2C400,&m_options);
}
wwd_result_t host_platform_bus_init( void )
{
if ( sdio_bus_initted == WICED_FALSE )
{
uint8_t a = 0;
platform_mcu_powersave_disable();
/* SDIO bootstrapping: GPIO0 = 0 and GPIO1 = 0 */
#ifdef WICED_WIFI_USE_GPIO_FOR_BOOTSTRAP
platform_gpio_init( &wifi_control_pins[WWD_PIN_BOOTSTRAP_0], OUTPUT_PUSH_PULL );
platform_gpio_output_low( &wifi_control_pins[WWD_PIN_BOOTSTRAP_0] );
platform_gpio_init( &wifi_control_pins[WWD_PIN_BOOTSTRAP_1], OUTPUT_PUSH_PULL );
platform_gpio_output_low( &wifi_control_pins[WWD_PIN_BOOTSTRAP_1] );
#endif /* WICED_WIFI_USE_GPIO_FOR_BOOTSTRAP */
/* Setup SDIO pins */
for ( a = WWD_PIN_SDIO_CLK; a < WWD_PIN_SDIO_MAX; a++ )
{
if( a == WWD_PIN_SDIO_OOB_IRQ )
{
platform_gpio_peripheral_pin_init( &wifi_sdio_pins[a], 0 );
}
else
{
platform_gpio_peripheral_pin_init( &wifi_sdio_pins[a], ( IOPORT_MODE_MUX_C | IOPORT_MODE_PULLUP ));
}
}
/* Enable the MCI peripheral */
sysclk_enable_peripheral_clock( ID_HSMCI );
HSMCI->HSMCI_CR = HSMCI_CR_SWRST;
MCI_Disable( HSMCI );
MCI_Init( &sdio_driver, HSMCI, ID_HSMCI, CPU_CLOCK_HZ );
/* Enable SDIO interrupt */
/* Priority must be set in platform.c file function platform_init_peripheral_irq_priorities */
/* !!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!! */
/* !!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!! */
// NVIC_SetPriority( HSMCI_IRQn, SAM4S_SDIO_IRQ_PRIO );
NVIC_EnableIRQ( HSMCI_IRQn );
// host_rtos_init_semaphore( &sdio_transfer_done_semaphore );
// enable_sdio_block_transfer_done_irq();
platform_mcu_powersave_enable();
sdio_bus_initted = WICED_TRUE;
}
return WICED_SUCCESS;
}
// Supporting function implementation
Accelerometer::Accelerometer() {
// Initialize variables
uint8_t value;
// Configure VDDIO, SDA and SCL pins
ioport_set_pin_dir(ACCELEROMETER_VDDIO_PIN, IOPORT_DIR_OUTPUT);
ioport_set_pin_level(ACCELEROMETER_VDDIO_PIN, IOPORT_PIN_LEVEL_HIGH);
ioport_set_pin_mode(ACCELEROMETER_SDA_PIN, IOPORT_MODE_WIREDANDPULL);
ioport_set_pin_mode(ACCELEROMETER_SCL_PIN, IOPORT_MODE_WIREDANDPULL);
// Configure interface
twi_options_t options;
options.speed = BUS_SPEED;
options.chip = MASTER_ADDRESS;
options.speed_reg = TWI_BAUD(sysclk_get_cpu_hz(), BUS_SPEED);
// Initialize interface
sysclk_enable_peripheral_clock(&TWI_MASTER);
twi_master_init(&TWI_MASTER, &options);
twi_master_enable(&TWI_MASTER);
// Create packet
twi_package_t packet;
packet.addr[0] = WHO_AM_I;
packet.addr_length = 1;
packet.chip = ACCELEROMETER_ADDRESS;
packet.buffer = &value;
packet.length = 1;
packet.no_wait = false;
// Check if transmitting or receiving failed
if(twi_master_read(&TWI_MASTER, &packet) != TWI_SUCCESS || value != DEVICE_ID)
// Clear is working
isWorking = false;
// Otherwise
else {
// Reset the accelerometer
writeValue(CTRL_REG2, CTRL_REG2_RST);
// Wait enough time for accelerometer to initialize
delay_ms(1);
// Initialize settings
initializeSettings();
// Calibrate
//calibrate();
// Set is working
isWorking = true;
}
}
/**
* \brief Generate the CRC value for the firmware
*/
static void generate_crc(void)
{
uint32_t buffer_size = 0;
/* Enable CRCCU peripheral clock */
sysclk_enable_peripheral_clock(CRCCU);
/* Reset the CRCCU */
crccu_reset(CRCCU);
/* Open the input file for CRC32 generation */
f_open(&file_object1,
(char const *)input_file_name,
FA_OPEN_EXISTING | FA_READ);
/* Generate the CRC32 for the input binary */
while (true) {
/* Read the data from the firmware */
f_read(&file_object1, (uint8_t *)buffer, FLASH_BUFFER_SIZE,
&buffer_size);
/* Check if there is any buffer */
if (!buffer_size) {
break;
}
/* Set the memory address for CRCCU DMA transfer */
crc_dscr.ul_tr_addr = (uint32_t) buffer;
/* Transfer width: byte, interrupt disable */
crc_dscr.ul_tr_ctrl = CRCCU_TR_CTRL_TRWIDTH_BYTE | buffer_size
| CRCCU_TR_CTRL_IEN_DISABLE;
/* Configure the CRCCU descriptor */
crccu_configure_descriptor(CRCCU, (uint32_t) &crc_dscr);
/* Configure CRCCU mode */
crccu_configure_mode(CRCCU, CRCCU_MR_ENABLE | APP_CRC_POLYNOMIAL_TYPE);
/* Start the CRC calculation */
crccu_enable_dma(CRCCU);
/* Wait for calculation ready */
while ((crccu_get_dma_status(CRCCU) == CRCCU_DMA_SR_DMASR)) {
}
}
/* Store the CRC32 Value */
firmware_crc = crccu_read_crc_value(CRCCU);
/* Enable CRCCU peripheral clock */
sysclk_disable_peripheral_clock(CRCCU);
/* Close the input file */
f_close(&file_object1);
}
/**
* \brief Run AFEC driver unit tests.
*/
int main(void)
{
const usart_serial_options_t usart_serial_options = {
.baudrate = CONF_TEST_BAUDRATE,
.paritytype = CONF_TEST_PARITY
};
/* Initialize the system clock and board */
sysclk_init();
board_init();
sysclk_enable_peripheral_clock(CONSOLE_UART_ID);
stdio_serial_init(CONF_TEST_USART, &usart_serial_options);
afec_enable(AFEC0);
struct afec_config afec_cfg;
afec_get_config_defaults(&afec_cfg);
afec_init(AFEC0, &afec_cfg);
/*
* Because the internal ADC offset is 0x800, it should cancel it and shift
* down to 0.
*/
afec_channel_set_analog_offset(AFEC0, AFEC_CHANNEL_1, 0x800);
afec_channel_enable(AFEC0, AFEC_CHANNEL_1);
#if defined(__GNUC__)
setbuf(stdout, NULL);
#endif
/* Define all the test cases */
DEFINE_TEST_CASE(afec_tc_trig_test, NULL, run_afec_tc_trig_test, NULL,
"AFEC TC Trig test");
DEFINE_TEST_CASE(afec_comp_test, NULL, run_afec_comp_test,
NULL, "AFEC Comparison Window test");
/* Put test case addresses in an array */
DEFINE_TEST_ARRAY(afec_tests) = {
&afec_tc_trig_test,
&afec_comp_test,
};
/* Define the test suite */
DEFINE_TEST_SUITE(afec_suite, afec_tests,
"SAM AFEC driver test suite");
/* Run all tests in the test suite */
test_suite_run(&afec_suite);
while (1) {
/* Busy-wait forever. */
}
}
/* Initialize ADC */
static void adc_initialisation()
{
/* Enable a peripherals clock */
sysclk_enable_peripheral_clock(&ADC);
/* set prescaler and enable ADC */
adc_init(ADC_PRESCALER_DIV128);
/* set voltage reference, mux input and right adjustment */
adc_set_admux(ADC_VREF_AVCC | ADC_MUX_ADC0 | ADC_ADJUSTMENT_RIGHT);
adc_enable_interrupt();
}
/**
* Configure UART console.
*/
static void configure_console(void) {
const usart_serial_options_t uart_serial_options = {
.baudrate = CONF_UART_BAUDRATE,
.paritytype = CONF_UART_PARITY
};
/* Configure console UART. */
sysclk_enable_peripheral_clock(CONSOLE_UART_ID);
stdio_serial_init(CONF_UART, &uart_serial_options);
}
void lp_ticker_init(void)
{
if(lp_ticker_inited)
return;
if (!us_ticker_inited)
us_ticker_init();
sysclk_enable_peripheral_clock(TICKER_COUNTER_CLK2);
tc_init(TICKER_COUNTER_lp, TICKER_COUNTER_CHANNEL2, TC_CMR_TCCLKS_TIMER_CLOCK4);
lp_ticker_inited = 1;
}
/**
* \brief User Interface - Board Monitor Initialization :
* and send SAM4L status.
*/
void ui_bm_init(void)
{
/*
* Initialize Board Monitor and send first status
*/
sysclk_enable_peripheral_clock(BM_USART_USART);
bm_init();
sysclk_disable_peripheral_clock(BM_USART_USART);
ui_bm_send_mcu_status();
}
/**
* \brief External interrupt handler, used by PB0 push button
*/
static void eic5_callback(void)
{
sysclk_enable_peripheral_clock(EIC);
if(eic_line_interrupt_is_pending(EIC,GPIO_PUSH_BUTTON_EIC_LINE))
{
eic_line_clear_interrupt(EIC,GPIO_PUSH_BUTTON_EIC_LINE);
event_pbEvent = true;
}
sysclk_disable_peripheral_clock(EIC);
}
// Interrupt on "pin change" from PB0 to do wakeup on USB
// Note:
// This interrupt is enable when the USB host enable remotewakeup feature
// This interrupt wakeup the CPU if this one is in idle mode
static void UI_WAKEUP_HANDLER(void)
{
sysclk_enable_peripheral_clock(EIC);
if(eic_line_interrupt_is_pending(EIC, UI_WAKEUP_EIC_LINE)) {
eic_line_clear_interrupt(EIC, UI_WAKEUP_EIC_LINE);
ui_disable_asynchronous_interrupt();
// It is a wakeup then send wakeup USB
udc_remotewakeup();
}
sysclk_disable_peripheral_clock(EIC);
}
/**
* \brief User Interface Board Monitor send SAM4L status.
*/
void ui_bm_send_mcu_status(void)
{
uint32_t power_scaling, sleep_mode, cpu_freq, cpu_src;
sysclk_enable_peripheral_clock(BM_USART_USART);
power_scaling = sam4l_status.power_scaling;
sleep_mode = sam4l_status.sleep_mode;
cpu_freq = sam4l_status.cpu_freq;
cpu_src = sam4l_status.cpu_src;
bm_send_mcu_status(power_scaling, sleep_mode, cpu_freq, cpu_src);
sysclk_disable_peripheral_clock(BM_USART_USART);
}
void init_spi_to_bbb(){
sysclk_enable_peripheral_clock( &SPIC );
PORTC.DIR = 0x40; // MISO output; MOSI, SCK, SS inputs
SPIC.CTRL = 0x40; // slave mode, mode 0
SPIC.INTCTRL = 0x03; // enable interrupts
PMIC.CTRL = 0x04; // enable high priority interrupts
memset(&rx_buff, 0, sizeof(circular_buffer_t));
memset(&tx_buff, 0, sizeof(circular_buffer_t));
}
/*! \brief Enable the USART system clock in SPI master mode.
*
* \param p_usart Pointer to Base address of the USART instance.
*
*/
void usart_spi_init(Usart *p_usart)
{
#if (!SAMG55)
uint8_t uc_id;
#ifdef USART0
if (p_usart == USART0) {
uc_id = ID_USART0;
}
#endif
#ifdef USART1
else if(p_usart == USART1) {
uc_id = ID_USART1;
}
#endif
#ifdef USART2
else if(p_usart == USART2) {
uc_id = ID_USART2;
}
#endif
#ifdef USART3
else if(p_usart == USART3) {
uc_id = ID_USART3;
}
#endif
#endif
#if SAM4L
sysclk_enable_peripheral_clock(p_usart);
#elif SAMG55
flexcom_enable(BOARD_FLEXCOM_USART);
flexcom_set_opmode(BOARD_FLEXCOM_USART, FLEXCOM_USART);
#else
sysclk_enable_peripheral_clock(uc_id);
#endif
}
/*! \brief to initialiaze hw timer
*/
uint8_t tmr_init(void)
{
uint8_t tmr_mul;
/* Configure clock service. */
#if SAM4L
sysclk_enable_peripheral_clock(TIMER);
#else
sysclk_enable_peripheral_clock(ID_TC);
#endif
/* Get system clock. */
tmr_mul = sysclk_get_peripheral_bus_hz(TIMER) / DEF_1MHZ;
tmr_mul = tmr_mul >> 1;
#if SAM4L
tc_init(TIMER, TIMER_CHANNEL_ID,
TC_CMR_TCCLKS_TIMER_CLOCK2 | TC_CMR_WAVE |
TC_CMR_WAVSEL_UP_NO_AUTO);
#elif SAM4E
tc_init(TIMER, TIMER_CHANNEL_ID,
TC_CMR_TCCLKS_TIMER_CLOCK1 | TC_CMR_WAVE |
TC_CMR_WAVSEL_UP_RC);
#else
tc_init(TIMER, TIMER_CHANNEL_ID,
TC_CMR_TCCLKS_TIMER_CLOCK1 | TC_CMR_WAVE |
TC_CMR_WAVSEL_UP);
#endif
/* Configure and enable interrupt on RC compare. */
configure_NVIC(TIMER, TIMER_CHANNEL_ID);
#if SAM4E
tc_get_status(TIMER, TIMER_CHANNEL_ID);
tc_enable_interrupt(TIMER, TIMER_CHANNEL_ID, TC_IER_CPCS);
tc_write_rc(TIMER, TIMER_CHANNEL_ID, UINT16_MAX);
#else
tc_get_status(TIMER, TIMER_CHANNEL_ID);
tc_enable_interrupt(TIMER, TIMER_CHANNEL_ID, TC_IER_COVFS);
#endif
tmr_disable_cc_interrupt();
tc_start(TIMER, TIMER_CHANNEL_ID);
return tmr_mul;
}
static void configure_console(void) {
sysclk_enable_peripheral_clock(PRINTF_USART_ID);
//const usart_serial_options_t uart_serial_options = { .baudrate = CONF_UART_BAUDRATE, .paritytype = CONF_UART_PARITY, };
const usart_serial_options_t uart_serial_options = {
.baudrate = USART_BAUDRATE,
.charlength = USART_CHAR_LENGTH,
.paritytype = USART_PARITY,
.stopbits = false
//US_MR_CHMODE_NORMAL
};
usart_serial_init(PRINTF_USART, &uart_serial_options);
stdio_serial_init(PRINTF_USART, &uart_serial_options);
usart_enable_tx(PRINTF_USART);
usart_enable_rx(PRINTF_USART);
}
int main(void) {
sysclk_init();
board_init();
configure_console();
printf("CPH BaseStation v%d\r\n", 1);
printf("create_uart_cli_task\r\n");
create_uart_cli_task(CONSOLE_UART, mainUART_CLI_TASK_STACK_SIZE, mainUART_CLI_TASK_PRIORITY);
// printf("create_dialer_task\r\n");
// create_dialer_task(mainDIALER_TASK_STACK_SIZE, mainDIALER_TASK_PRIORITY);
printf("create_comm_task\r\n");
create_comm_task(mainCOMM_TASK_STACK_SIZE, mainCOMM_TASK_PRIORITY);
printf("create_apptask_task\r\n");
create_app_task(mainAPPTASK_TASK_STACK_SIZE, mainAPPTASK_TASK_PRIORITY);
printf("create_led_task\r\n");
create_led_task();
printf("starting task scheduler\r\n");
/* Start the scheduler. */
vTaskStartScheduler();
for (;;) {
}
/* Will only get here if there was insufficient memory to create the idle task. */
return 0;
}
/**
* \brief Initialize the events module.
*
* \param[in] config Configuration structure to initialize to default values
*/
void events_init(
struct events_conf *const config)
{
/* Validate parameters. */
Assert(config);
/* Enable clock for PEVC module */
sysclk_enable_peripheral_clock(PEVC);
/* Set configuration */
events_set_igf_divider(config->igf_divider);
}
/**
* \brief Enable the GLOC module.
*
* \param dev_inst Device structure pointer.
*
*/
void gloc_enable(struct gloc_dev_inst *const dev_inst)
{
struct genclk_config gencfg;
sysclk_enable_peripheral_clock(dev_inst->hw_dev);
sleepmgr_lock_mode(SLEEPMGR_SLEEP_0);
genclk_config_defaults(&gencfg, GLOC_GCLK_NUM);
genclk_enable_source(CONFIG_GLOC_GENCLK_SRC);
genclk_config_set_source(&gencfg, CONFIG_GLOC_GENCLK_SRC);
genclk_config_set_divider(&gencfg, CONFIG_GLOC_GENCLK_DIV);
genclk_enable(&gencfg, GLOC_GCLK_NUM);
}