void __init tegra_init_early(void)
{
arm_pm_restart = tegra_pm_restart;
tegra_init_fuse();
tegra_init_clock();
tegra_clk_init_from_table(common_clk_init_table);
tegra_init_power();
tegra_init_cache();
}
void __init tegra_init_early(void)
{
#ifndef CONFIG_SMP
/* For SMP system, initializing the reset handler here is too
late. For non-SMP systems, the function that calls the reset
handler initializer is not called, so do it here for non-SMP. */
tegra_cpu_reset_handler_init();
#endif
tegra_init_fuse();
tegra_gpio_resume_init();
tegra_init_clock();
tegra_init_pinmux();
tegra_clk_init_from_table(common_clk_init_table);
tegra_init_power();
tegra_init_cache(true);
tegra_init_ahb_gizmo_settings();
}
void __init tegra_init_irq(void) {
/*int i;*/
printk("%s\n", __FUNCTION__);
gic_dist_init(0, IO_ADDRESS(TEGRA_ARM_INT_DIST_BASE), 32);
gic_cpu_init(0, IO_ADDRESS(TEGRA_ARM_PERIF_BASE + 0x100));
/*for (i=0; i<4; i++) {
__raw_writel(~0UL, ictlr_reg_base[i] + ICTLR_CPU_IER_CLR);
__raw_writel(0, ictlr_reg_base[i] + ICTLR_CPU_IEP_CLASS);
}
for (i=32; i<NR_IRQS; i++) {
if (set_irq_chip(i, &tegra_irq_chip))
BUG();
set_irq_handler(i, handle_level_irq);
}*/
tegra_init_clock();
}
void __init tegra_init_early(void)
{
#ifndef CONFIG_SMP
/* For SMP system, initializing the reset handler here is too
late. For non-SMP systems, the function that calls the reset
handler initializer is not called, so do it here for non-SMP. */
tegra_cpu_reset_handler_init();
#endif
/*tegra_fbmem = 800@18012000*/
tegra_bootloader_fb_size = 819200;
tegra_bootloader_fb_start = 0x18012000;
tegra_init_fuse();
tegra_init_clock();
tegra_gpio_resume_init();
tegra_init_pinmux();
tegra_clk_init_from_table(common_clk_init_table);
tegra_init_power();
tegra_init_cache(true);
tegra_init_ahb_gizmo_settings();
tegra_init_debug_uart_rate();
}
