void up_timerinit(void)
{
uint16_t mcr;
/* Power up Timer0 */
SCB_PCONP |= PCTIM0;
/* Timer0 clock input frequency = CCLK / TO_PCLKDIV */
SCB_PCLKSEL0 = (SCB_PCLKSEL0 & ~T0_PCLKSEL_MASK) | TIMER0_PCLKSEL;
/* Clear all match and capture event interrupts */
tmr_putreg8(TMR_IR_ALLI, TMR_IR_OFFSET);
/* Clear the timer counter */
tmr_putreg32(0, TMR_TC_OFFSET);
/* No pre-scaler */
tmr_putreg32(0, TMR_PR_OFFSET);
tmr_putreg32(0, TMR_PC_OFFSET);
/* Set timer match register to get a TICK_PER_SEC rate See arch/board.h and
* sched/os_internal.h
*/
tmr_putreg32(T0_TICKS_COUNT, TMR_MR0_OFFSET); /* 10ms Intterrupt */
/* Reset timer counter register and interrupt on match */
mcr = tmr_getreg16(TMR_MCR_OFFSET);
mcr &= ~TMR_MCR_MR1I;
mcr |= (TMR_MCR_MR0I | TMR_MCR_MR0R);
tmr_putreg16(mcr, TMR_MCR_OFFSET); /* -- bit 0=1 -int on MR0, bit 1=1 - Reset on MR0 */
/* Enable counting */
/* ~ tmr_putreg32(1, TMR_TCR_OFFSET); */
tmr_putreg8(TMR_CR_ENABLE, TMR_TCR_OFFSET);
/* Attach the timer interrupt vector */
#ifdef CONFIG_VECTORED_INTERRUPTS
up_attach_vector(IRQ_SYSTIMER, PRIORITY_HIGHEST, (vic_vector_t) up_timerisr);
#else
(void)irq_attach(IRQ_SYSTIMER, (xcpt_t) up_timerisr);
up_prioritize_irq(IRQ_SYSTIMER, PRIORITY_HIGHEST);
#endif
/* And enable the system timer interrupt */
up_enable_irq(IRQ_SYSTIMER);
}
int up_timerisr(int irq, uint32_t * regs)
#endif
{
static uint32_t tick;
/* Process timer interrupt */
sched_process_timer();
/* Clear the MR0 match interrupt */
tmr_putreg8(TMR_IR_MR0I, TMR_IR_OFFSET);
/* Reset the VIC as well */
#ifdef CONFIG_VECTORED_INTERRUPTS
/* write any value to VICAddress to acknowledge the interrupt */
vic_putreg(0, VIC_ADDRESS_OFFSET);
#endif
if (tick++ > 100)
{
tick = 0;
up_statledoff();
}
else
up_statledon();
return 0;
}
void up_timer_initialize(void)
{
uint16_t mcr;
/* Clear all match and capture event interrupts */
tmr_putreg8(LPC214X_TMR_IR_ALLI, LPC214X_TMR_IR_OFFSET);
/* Clear the timer counter */
tmr_putreg32(0, LPC214X_TMR_TC_OFFSET);
/* No pre-scaler */
tmr_putreg32(0, LPC214X_TMR_PR_OFFSET);
/* Set timer match registger to get a TICK_PER_SEC rate
*/
tmr_putreg32(LPC214X_PCLKFREQ/TICK_PER_SEC, LPC214X_TMR_MR0_OFFSET);
/* Reset timer counter regiser and interrupt on match */
mcr = tmr_getreg16(LPC214X_TMR_MCR_OFFSET);
mcr &= ~LPC214X_TMR_MCR_MR1I;
mcr |= (LPC214X_TMR_MCR_MR0I | LPC214X_TMR_MCR_MR0R);
tmr_putreg16(mcr, LPC214X_TMR_MCR_OFFSET);
/* Enable counting */
tmr_putreg8(LPC214X_TMR_CR_ENABLE, LPC214X_TMR_TCR_OFFSET);
/* Attach the timer interrupt vector */
#ifdef CONFIG_VECTORED_INTERRUPTS
up_attach_vector(LPC214X_IRQ_SYSTIMER, LPC214X_SYSTIMER_VEC, (vic_vector_t)up_timerisr);
#else
(void)irq_attach(LPC214X_IRQ_SYSTIMER, (xcpt_t)up_timerisr);
#endif
/* And enable the timer interrupt */
up_enable_irq(LPC214X_IRQ_SYSTIMER);
}
int up_timerisr(int irq, uint32_t *regs)
#endif
{
/* Process timer interrupt */
sched_process_timer();
/* Clear the MR0 match interrupt */
tmr_putreg8(LPC214X_TMR_IR_MR0I, LPC214X_TMR_IR_OFFSET);
/* Reset the VIC as well */
#ifdef CONFIG_VECTORED_INTERRUPTS
vic_putreg(0, LPC214X_VIC_VECTADDR_OFFSET);
#endif
return 0;
}