static int lpc_uart_io_handler(struct vmctx *ctx, int vcpu, int in, int port, int bytes, uint32_t *eax, void *arg) { int offset; struct lpc_uart_softc *sc = arg; offset = port - sc->iobase; switch (bytes) { case 1: if (in) *eax = uart_read(sc->uart_softc, offset); else uart_write(sc->uart_softc, offset, *eax); break; case 2: if (in) { *eax = uart_read(sc->uart_softc, offset); *eax |= uart_read(sc->uart_softc, offset + 1) << 8; } else { uart_write(sc->uart_softc, offset, *eax); uart_write(sc->uart_softc, offset + 1, *eax >> 8); } break; default: return (-1); } return (0); }
static int _send(netdev2_t *netdev, const struct iovec *vector, int count) { ethos_t * dev = (ethos_t *) netdev; (void)dev; /* count total packet length */ size_t pktlen = iovec_count_total(vector, count); /* lock line in order to prevent multiple writes */ mutex_lock(&dev->out_mutex); /* send start-frame-delimiter */ uint8_t frame_delim = ETHOS_FRAME_DELIMITER; uart_write(dev->uart, &frame_delim, 1); /* send iovec */ while(count--) { size_t n = vector->iov_len; uint8_t *ptr = vector->iov_base; while(n--) { _write_escaped(dev->uart, *ptr++); } vector++; } uart_write(dev->uart, &frame_delim, 1); mutex_unlock(&dev->out_mutex); return pktlen; }
void ethos_send_frame(ethos_t *dev, const uint8_t *data, size_t len, unsigned frame_type) { uint8_t frame_delim = ETHOS_FRAME_DELIMITER; if (!irq_is_in()) { mutex_lock(&dev->out_mutex); } else { /* Send frame delimiter. This cancels the current frame, * but enables in-ISR writes. */ uart_write(dev->uart, &frame_delim, 1); } /* send frame delimiter */ uart_write(dev->uart, &frame_delim, 1); /* set frame type */ if (frame_type) { uint8_t out[2] = { ETHOS_ESC_CHAR, (frame_type ^ 0x20) }; uart_write(dev->uart, out, 2); } /* send frame content */ while(len--) { _write_escaped(dev->uart, *(uint8_t*)data++); } /* end of frame */ uart_write(dev->uart, &frame_delim, 1); if (!irq_is_in()) { mutex_unlock(&dev->out_mutex); } }
static int _send(netdev_t *netdev, const iolist_t *iolist) { ethos_t * dev = (ethos_t *) netdev; (void)dev; /* count total packet length */ size_t pktlen = iolist_count_total(iolist); /* lock line in order to prevent multiple writes */ mutex_lock(&dev->out_mutex); /* send start-frame-delimiter */ uint8_t frame_delim = ETHOS_FRAME_DELIMITER; uart_write(dev->uart, &frame_delim, 1); /* send iolist */ for (const iolist_t *iol = iolist; iol; iol = iol->iol_next) { size_t n = iol->iol_len; uint8_t *ptr = iol->iol_base; while(n--) { _write_escaped(dev->uart, *ptr++); } } uart_write(dev->uart, &frame_delim, 1); mutex_unlock(&dev->out_mutex); return pktlen; }
uint8_t *packet_process() { uint8_t ret; uint8_t message[MESSAGE_SIZE]; /* simple surface check of incoming data */ ret = packet_sanity_check(packet_in, NETWORK_PACKET_SIZE); if (ret != OK) { make_response(NACK, packet_out); uart_write("Packet failed sanity test\n"); return packet_out; } /* verify hmac and decrypt data */ ret = verify_and_decrypt_client_message(packet_in, message); if (ret == HMAC_FAILURE) { make_response(HMAC_FAILURE, packet_out); uart_write("Packet has invalid hmac\n"); return packet_out; } else if (ret == DEC_FAILURE) { make_response(DEC_FAILURE, packet_out); uart_write("Packet encryption failed\n"); return packet_out; } /* parse received, decrypted command */ ret = parse_command(message); make_response(ret, packet_out); return packet_out; }
void shackbus_init(void) { // Initialize MCP2515 can_init(BITRATE_125_KBPS); #ifdef UART_DEBUG uart_write("can_init(BITRATE_125_KBPS);"); #endif // Load filters and masks can_static_filter(can_filter); #ifdef UART_DEBUG uart_write("can_static_filter(can_filter);"); #endif fifo_init (&can_outfifo, can_outbuf, 10); framestorage_init(); // Create a test messsage send_msg_blink_ret.id = ((3L<<26)+(4L<<22)+(6L<<14)+(5L<<6)+11L); //Absender = 2 Empfänger = 1 send_msg_blink_ret.flags.rtr = 0; send_msg_blink_ret.flags.extended = 1; send_msg_blink_ret.length = 3; send_msg_blink_ret.data[0] = 0; send_msg_blink_ret.data[1] = 0; send_msg_blink_ret.data[2] = 0; shackbus_startup_message(); }
int uart_lthread(uart_thread_struct *uptr, unsigned char msgtype, signed char length, unsigned char *msgbuffer) { if (msgtype == MSGT_OVERRUN) { } else if (msgtype == MSGT_UART_DATA) { // print the message (this assumes that the message // was a printable string) //msgbuffer[length] = '\0'; // null-terminate the array as a string // Now we would do something with it // Find if it matches the checksum unsigned char commandlength = (msgbuffer[1] & 0xF); unsigned char checksum = msgbuffer[length - 1]; unsigned char a = 'a'; uart_write(1, &a); uart_write(1, &length); unsigned char checker = 0; for (unsigned char i = 0; i < length; i++) { checker = checker + msgbuffer[i]; } if ((checker & 0xFF) == checksum) { unsigned char messageID = (msgbuffer[1] & 0xF0) >> 4; if (messageID == 0x0){ // Sensor data request } else if (messageID == 0x1){ // This should never happen } else if (messageID == 0x2){ // Motor command for (unsigned char j = 0; j < commandlength; j++){ unsigned char command = msgbuffer[1 + j]; unsigned char cmdID = (command & 0xF0); unsigned char turn = (command & 0xF); unsigned int start = 0x7; if (cmdID == 0x0){ // start //i2c_master_send(1, &start); } else if (cmdID == 0x1){ // stop } else if (cmdID == 0x2) { //straight } else if (cmdID == 0x3) { // turn right } else if (cmdID == 0x4) { // turn left } } } }
Int32 cppi_qmss_init(void) { if (Init_Qmss () != 0) { uart_write ("QMSS init failed \n"); //BIOS_exit (-1); return -1; } else { uart_write ("QMSS successfully initialized \n"); } /* Initialize CPPI */ if (Init_Cppi () != 0) { uart_write ("CPPI init failed \n"); //BIOS_exit (-1); return -1; } else { uart_write ("CPPI successfully initialized \n"); } return 0; }
void cmdReadMemory(unsigned long addr, int lng, unsigned char * data){ if(lng > data_size){ handle_error(DATA_LEN_ERROR); return; } /* TODO: handler assert error */ if(cmdGeneric(0x11)){ mdebug(10, "*** ReadMemory command"); unsigned char * addr_buffer = (unsigned char *) malloc(sizeof(unsigned char)*5); encode_addr(addr, addr_buffer); /* Get addr and crc buffer */ uart_write(addr_buffer, 5); wait_for_ask(); int n = (lng - 1) & 0xFF; unsigned char crc = n ^ 0xFF; unsigned char n_crc_buff[2]; n_crc_buff[0] = n; n_crc_buff[1] = crc; uart_write(n_crc_buff, 2); wait_for_ask(); /* read lng number of bytes */ uart_reads(data, lng); } else{ /* TODO: handle nack */ handle_error(NACK_ERROR); } }
int uart_printf(const char * format, ...) { const size_t BUFFER_SIZE = 80; int ret = 0; va_list aptr; static char * buffer = 0; if (!buffer) { /* lazy-initialize a buffer, reuse it and never free */ buffer = (char *)malloc(BUFFER_SIZE); if (!buffer) { const char * message = "*** insufficient memory to print ***\n"; uart_write(message, strlen(message)); return ret; } } va_start(aptr, format); ret = vsprintf(buffer, format, aptr); va_end(aptr); uart_write(buffer, ret); return ret; }
void _unlzma_veneer(){ uart_write('D'); uart_write(' '); int res = unlzma((uint8_t *)code, (uint8_t *)SYSMEM_BASE, 16384); if(res != 0) error_loop(); // uart_write('S'); uart_write(' '); long_jump_to_start(); }
/* * シリアルI/Oポートのオープン */ SIOPCB * uart_opn_por(ID siopid, VP_INT exinf) { SIOPCB *siopcb; const SIOPINIB *siopinib; siopcb = get_siopcb(siopid); siopinib = siopcb->siopinib; /* * 初期化 */ uart_init_siopinib(siopcb->siopinib); /* 受信割込み許可 */ uart_write(siopcb->siopinib->reg_base, UART_IER, IER_RX); /* 割込み線をイネーブル */ uart_write(siopcb->siopinib->reg_base, UART_MCR, MCR_INT_ENABLE); siopcb->exinf = exinf; siopcb->getready = siopcb->putready = FALSE; siopcb->openflag = TRUE; return(siopcb); }
void handle_alarm ( int argc, char **argv) { if(argc == 0 ) { return; } uint8_t na = 0; // Get num entries. uart_write("an",2); uart_read((char *)&na, 1); long int alarm = strtol(argv[0], NULL, 10)-1; if(alarm < 0 || alarm >= na) { fprintf(stderr, "Invalid alarm number.\n"); return; } // Skip. argv++; argc--; if(argc == 0 ) { // Read time char buffer[32] = { 'a', 'r', '0'+alarm }; write(fd, buffer, 3); ssize_t t = 0; while(t < 3) { t +=read(fd, &buffer[t], 2); } buffer[t] = '\0'; printf("%02d:%02d (%s)\n", buffer[0]%24, buffer[1], (buffer[2])?"Enable":"Disable"); } else { char *command = argv[0]; argv++; argc--; if(strcasecmp(command,"enable") == 0 ) { char buffer[3] = { 'a', 'e', '0'+alarm }; uart_write(buffer, 3); } else if (strcasecmp(command, "disable") == 0) { char buffer[3] = { 'a', 'd', '0'+alarm }; uart_write(buffer, 3); } else if (strcasecmp(command, "set") == 0 ) { if (argc == 2) { char buffer[7]; int hour = strtol(argv[0], NULL, 10); int minute = strtol(argv[1], NULL, 10); sprintf(buffer,"aw%d%02d%02d", alarm, hour, minute); uart_write(buffer, 7); }else { fprintf(stderr, "Invalid number of arguments\n"); } } } }
void uart_puts(const char *s) { while (*s) { if (*s == '\n') uart_write('\r'); uart_write(*s++); } }
int uart_stdio_putc(char c, FILE*) { if(c == '\n') uart_write('\r'); uart_write(c); return 0; }
void pause_resume(){ if(Nsteps == 0) return; // motor is stopped if(TIM2_CR1 & TIM_CR1_CEN){ // pause TIM2_CR1 &= ~TIM_CR1_CEN; uart_write("pause\n"); }else{ // resume TIM2_CR1 |= TIM_CR1_CEN; uart_write("resume\n"); } }
void ralink_com_early(int silent) { struct com_regs regs; uint32_t r; int error; /* reset */ r = sysctl_read(RA_SYSCTL_RST); r |= RST_UARTL; sysctl_write(RA_SYSCTL_RST, r); r ^= RST_UARTL; sysctl_write(RA_SYSCTL_RST, r); if (silent) { /* * put us in PIO mode, * effectively tri-stating the UARTL block */ r = sysctl_read(RA_SYSCTL_GPIOMODE); r |= GPIOMODE_UARTL; sysctl_write(RA_SYSCTL_GPIOMODE, r); } else { /* make sure we are in UART mode */ r = sysctl_read(RA_SYSCTL_GPIOMODE); r &= ~GPIOMODE_UARTL; sysctl_write(RA_SYSCTL_GPIOMODE, r); } uart_write(RA_UART_IER, 0); /* disable interrupts */ uart_write(RA_UART_FCR, 0); /* disable fifos */ /* set baud rate */ uart_write(RA_UART_LCR, UART_LCR_WLS0 | UART_LCR_WLS1 | UART_LCR_DLAB); uart_write(RA_UART_DLL, (RA_UART_FREQ / RA_SERIAL_CLKDIV / RA_BAUDRATE) & 0xffff); uart_write(RA_UART_LCR, UART_LCR_WLS0 | UART_LCR_WLS1); regs.cr_iot = &ra_bus_memt; regs.cr_iobase = RA_UART_LITE_BASE; regs.cr_nports = 0x1000; ralink_com_initmap(®s); if ((error = bus_space_map(regs.cr_iot, regs.cr_iobase, regs.cr_nports, 0, ®s.cr_ioh)) != 0) { return; } /* Ralink UART has a 16-bit rate latch (like the AU1x00) */ comcnattach1(®s, RA_BAUDRATE, RA_UART_FREQ, COM_TYPE_AU1x00, CONMODE); }
int uart_writeUBE32(uint32_t i) { if (hostendian == 1) return uart_write(&i, 4); else if (hostendian == 0) { uint16_t swapped; swapEndian(&i, &swapped, 4); return uart_write(&swapped, 4); } else { generateError("System endianness is not supported. Use uart_write()"); return 0; } }
int __init tegra_fiqdb_register(void) { while (uart_read(UART_LSR) & UART_LSR_DR) uart_read(UART_RX); /* enable rx and lsr interrupt */ uart_write(UART_IER_RLSI | UART_IER_RDI, UART_IER); /* interrupt on every character */ uart_write(0, UART_IIR); fiqdb_register(&tegra_fiqdb); }
void proceed_msg( Msg * m ) { uint8_t crc_in = crc( m->bytes, sizeof( Msg )-1 ); if( crc_in != m->fields.crc ) { /* Ignore message! * The pc will handle the situation, that * he doesn't get a response! */ } else if( CMD_NOP == m->fields.header ) { /* simple echo */ uart_write( (char*)m->bytes, sizeof( Msg ) ); } else if( CMD_CALC == m->fields.header ) { /* please note: we extract the message fields to the stack * because of some "Program received signal SIGBUS, Bus error. ... incomplete sequence" * problem. It seems there is some problem with the alignment * (or maybe something else, but the problem does not occur if there is no pragma pack in msg.h) * * */ int32_t x, xx, y, yy, a, aa; uint8_t mode; /* extract */ x = m->fields.payload[0]; y = m->fields.payload[1]; a = m->fields.payload[3]; mode = m->fields.mode; /* do the calculation */ yac_single( &yac, &x, &y, &a, &xx, &yy, &aa, &mode ); /* put back the result */ m->fields.payload[ 0 ] = xx; m->fields.payload[ 1 ] = yy; m->fields.payload[ 2 ] = aa; /* calculate the crc*/ m->fields.crc = crc( m->bytes, sizeof( Msg )-1 ); /* write out the message */ uart_write( (char*)&m->bytes[0], sizeof( Msg ) ); } }
static void _keypress_handler(const char* str ) { const char* c = str; #if ENABLED(SEND_CR_LF) char CR = 13; #endif while( *c ) { char ch = *c; //ee_printf("CHAR 0x%x\n",ch ); #if ENABLED(SEND_CR_LF) if( ch == 10 ) { // Send CR first uart_write( &CR, 1 ); } #endif #if ENABLED(SEND_CR_ONLY) if( ch == 10 ) { ch = 13; } #endif #if ENABLED( SWAP_DEL_WITH_BACKSPACE ) if( ch == 0x7F ) { ch = 0x8; } #endif #if ENABLED( BACKSPACE_ECHO ) if( ch == 0x8 ) gfx_term_putstring( "\x7F" ); #endif #if ENABLED(SKIP_BACKSPACE_ECHO) if( ch == 0x7F ) { backspace_n_skip = 2; last_backspace_t = time_microsec(); } #endif uart_write( &ch, 1 ); ++c; } }
static void reset_serial_session(int signal) { int i; session_end(); if(signal) { /* Signal end-of-session inband with zero length packet. */ for(i=0;i<4;i++) uart_write(0x5a); for(i=0;i<4;i++) uart_write(0x00); } session_start(); }
static void dump_buf(const uint8_t* buf, uint8_t n) { uint8_t c; uint8_t i; for (i = 0; i != n; ++i) { c = to_hex(buf[i] >> 4); uart_write(&c, 1); c = to_hex(buf[i] & 0xf); uart_write(&c, 1); } uart_write((const uint8_t*)"\r\n", 2); }
/** * \ingroup SIOAPI * \brief コールバックの禁止 * \param siopcb コールバックを禁止するSIOポート * \param cbrtn SIO_RDY_SND あるいは SIO_RDY_RCV * \details * シリアル制御タスクのコールバック関数の呼び出しを禁止する関数。 cbrtn 引数を使って送信と受信のいずれの側で禁止するかを * 指定する。 * * この関数はTOPPERS/ASPのシリアル制御タスクの中から呼び出される。コールバックの禁止にはペリフェラルの割り込み禁止機能を使う。 */ void sio_dis_cbr(SIOPCB *siopcb, uint_t cbrtn) { uint32_t reg = siopcb->reg_base; /* UARTのベースアドレスを取得 */ switch (cbrtn) { case SIO_RDY_SND: uart_write( reg, UART_IER, uart_read(reg, UART_IER) & ~IER_TX ); /* 送信割り込みを禁止 */ break; case SIO_RDY_RCV: uart_write( reg, UART_IER, uart_read(reg, UART_IER) & ~IER_RX ); /* 受信割り込みを禁止 */ break; default: break; } }
int putchar(int c) { char ch = (char) c; if(uart_write(0, &ch, 1) == 0) return c; else return -1; }
int main(int argc, char *argv[]) { unsigned long count; count = 0; int temp = 0; int i =0 ; int reset = 0; int bd = atoi(argv[1]); int dc1 = atoi(argv[2]); int dc2 = atoi(argv[3]); baud_rate = bd; printf("bd is set to %d\n",baud_rate); ptz_init(); ptz_write(RS485_DEVICE_WRITE_MODE); status = uart_init(UART_PORT) ; printf("\n V.2.2: delay: %d \n",dc1); if(status <= 0 ) { printf("\nmodbusRS485_init: uart_init failed:%d \n",status); return FAILURE; } dc2 =dc2*1000; dc1 =dc1*1000; printf("Delay set is Before write %d \t after write %d \n",dc1,dc2); while(1) { // ptz_write(RS485_DEVICE_WRITE_MODE); // usleep(dc); #if 1 status = uart_write(UART_PORT,r2,11); if(status < SUCCESS){ printf("\nsensor write failed Error:%d \n ",status); status = FAILURE; } usleep(dc1); #endif ptz_write(RS485_DEVICE_READ_MODE); // usleep(dc2); #if 1 temp = uart_read(UART_PORT,buffer_t1, 1); if(temp > 0){ printf("\nbuff contains : \n"); for(i = 0; i <= temp; i++) printf("\t%c\t ",buffer_t1[i]); } else{ printf("uart read : error %d \n",temp); } #endif // usleep(500); // ptz_write(RS485_DEVICE_WRITE_MODE); sleep(1); printf("\n ++ %d \n",++tp); } }
static void handle_write(const char *req, int *req_index) { if (!uart_is_open(uart)) { send_error_response("ebadf"); return; } int term_size; if (ei_decode_tuple_header(req, req_index, &term_size) < 0 || term_size != 2) errx(EXIT_FAILURE, "expecting {data, timeout}"); int term_type; if (ei_get_type(req, req_index, &term_type, &term_size) < 0 || term_type != ERL_BINARY_EXT) errx(EXIT_FAILURE, "expecting data as a binary"); uint8_t *to_write = malloc(term_size); long amount_to_write; if (ei_decode_binary(req, req_index, to_write, &amount_to_write) < 0) errx(EXIT_FAILURE, "decode binary error?"); long timeout; if (ei_decode_long(req, req_index, &timeout) < 0) errx(EXIT_FAILURE, "expecting timeout"); // uart_write always invokes a callback when it completes (error or no error). uart_write(uart, to_write, amount_to_write, timeout); }
void printUint(U8 *val, U8 len){ unsigned long Number = 0; U8 i = len; char ch; U8 decimal_buff[12]; // max len of U32 == 10 + \n + \0 if(len > 4 || len == 3 || len == 0) return; for(i = 0; i < 12; i++) decimal_buff[i] = 0; decimal_buff[10] = '\n'; ch = 9; switch(len){ case 1: Number = *((U8*)val); break; case 2: Number = *((U16*)val); break; case 4: Number = *((unsigned long*)val); break; } do{ i = Number % 10L; decimal_buff[ch--] = i + '0'; Number /= 10L; }while(Number && ch > -1); uart_write((char*)&decimal_buff[ch+1]); }
int putchar(int c) { uart_write(c); if(write_hook != NULL) write_hook(c); return c; }
void write_log(char *filename, U32 lineno, const char *function, const char *message, U8 type) { U32 msr; char logBuffer[MAX_LOG_STR_LEN]; int logLen; if( !filename ) filename = strNull; if( !function ) function = strNull; if( !message ) message = strNull; if( type > LOG_TYPE_MAX ) type = LOG_TYPE_MAX; MFMSR(msr); WRTEEI(0); ISYNC; logLen = snprintf(logBuffer, MAX_LOG_STR_LEN, "[%u] %s %s:%u %s: %s\n", get_ticks(), function, filename, lineno, msgTypes[type], message); uart_write( logBuffer, logLen ); MTMSR(msr); ISYNC; }