void up_boot(void)
{
/* __start provided the basic MMU mappings for SDRAM. Now provide mappings for all
* IO regions (Including the vector region).
*/
up_setupmappings();
/* Provide a special mapping for the IRAM interrupt vector positioned in high
* memory.
*/
up_vectormapping();
/* Setup up vector block. _vector_start and _vector_end are exported from
* up_vector.S
*/
up_copyvectorblock();
/* Set up the board-specific LEDs */
#ifdef CONFIG_ARCH_LEDS
board_led_initialize();
#endif
/* Perform early serial initialization */
#ifdef USE_EARLYSERIALINIT
up_earlyserialinit();
#endif
}
void up_lowinit(void)
{
/* Disable the watchdog timer */
wdt_disable();
/* Set the system clock divider to 1 */
clock_prescale_set(clock_div_1);
/* Initialize the watchdog timer */
up_wdtinit();
/* Initialize a console (probably a serial console) */
up_consoleinit();
/* Perform early serial initialization (so that we will have debug output
* available as soon as possible).
*/
#ifdef CONFIG_USE_EARLYSERIALINIT
up_earlyserialinit();
#endif
/* Perform board-level initialization */
up_boardinitialize();
}
void __start(void)
{
const uint32_t *src;
uint32_t *dest;
/* Configure the uart so that we can get debug output as soon as possible */
stm32_clockconfig();
stm32_fpuconfig();
stm32_lowsetup();
stm32_gpioinit();
showprogress('A');
/* Clear .bss. We'll do this inline (vs. calling memset) just to be
* certain that there are no issues with the state of global variables.
*/
for (dest = &_sbss; dest < &_ebss; )
{
*dest++ = 0;
}
showprogress('B');
/* Move the intialized data section from his temporary holding spot in
* FLASH into the correct place in SRAM. The correct place in SRAM is
* give by _sdata and _edata. The temporary location is in FLASH at the
* end of all of the other read-only data (.text, .rodata) at _eronly.
*/
for (src = &_eronly, dest = &_sdata; dest < &_edata; )
{
*dest++ = *src++;
}
showprogress('C');
/* Perform early serial initialization */
#ifdef USE_EARLYSERIALINIT
up_earlyserialinit();
#endif
showprogress('D');
/* Initialize onboard resources */
stm32_boardinitialize();
showprogress('E');
/* Then start NuttX */
showprogress('\r');
showprogress('\n');
os_start();
/* Shoulnd't get here */
for(;;);
}
void arm_boot(void)
{
/* __start provided the basic MMU mappings for SRAM. Now provide mappings for all
* IO regions (Including the vector region).
*/
#ifndef CONFIG_ARCH_ROMPGTABLE
up_setupmappings();
/* Provide a special mapping for the IRAM interrupt vector positioned in high
* memory.
*/
#ifndef CONFIG_ARCH_LOWVECTORS
up_vectormapping();
#endif
#endif /* CONFIG_ARCH_ROMPGTABLE */
/* Setup up vector block. _vector_start and _vector_end are exported from
* up_vector.S
*/
up_copyvectorblock();
/* Reset all clocks */
lpc31_resetclks();
/* Initialize the PLLs */
lpc31_hp1pllconfig();
lpc31_hp0pllconfig();
/* Initialize clocking to settings provided by board-specific logic */
lpc31_clkinit(&g_boardclks);
/* Map first 4KB of ARM space to ISRAM area */
putreg32(LPC31_INTSRAM0_PADDR, LPC31_SYSCREG_ARM926SHADOWPTR);
/* Perform common, low-level chip initialization (might do nothing) */
lpc31_lowsetup();
/* Perform early serial initialization if we are going to use the serial driver */
#ifdef USE_EARLYSERIALINIT
up_earlyserialinit();
#endif
/* Perform board-specific initialization */
lpc31_boardinitialize();
}
void up_lowsetup(void)
{
/* Initialize the Global descriptor table */
up_gdtinit();
/* Early serial driver initialization */
#ifdef CONFIG_USE_EARLYSERIALINIT
up_earlyserialinit();
#endif
/* Now perform board-specific initializations */
up_boardinitialize();
}
void up_lowinit(void)
{
/* Initialize MCU clocking */
up_clkinitialize();
/* Initialize a console (probably a serial console) */
up_consoleinit();
/* Perform early serial initialization (so that we will have debug output
* available as soon as possible).
*/
#ifdef USE_EARLYSERIALINIT
up_earlyserialinit();
#endif
/* Perform board-level initialization */
at32uc3_boardinitialize();
}
void __start(void)
{
const uint32_t *src;
uint32_t *dest;
/* Disable the watchdog */
putreg32(0, KL_SIM_COPC);
/* Configure the uart so that we can get debug output as soon as possible */
kl_clockconfig();
kl_lowsetup();
showprogress('A');
/* Clear .bss. We'll do this inline (vs. calling memset) just to be
* certain that there are no issues with the state of global variables.
*/
for (dest = &_sbss; dest < &_ebss; )
{
*dest++ = 0;
}
showprogress('B');
/* Move the initialized data section from his temporary holding spot in
* FLASH into the correct place in SRAM. The correct place in SRAM is
* give by _sdata and _edata. The temporary location is in FLASH at the
* end of all of the other read-only data (.text, .rodata) at _eronly.
*/
for (src = &_eronly, dest = &_sdata; dest < &_edata; )
{
*dest++ = *src++;
}
showprogress('C');
/* Perform early serial initialization */
#ifdef USE_EARLYSERIALINIT
up_earlyserialinit();
#endif
showprogress('D');
/* For the case of the separate user-/kernel-space build, perform whatever
* platform specific initialization of the user memory is required.
* Normally this just means initializing the user space .data and .bss
* segments.
*/
#ifdef CONFIG_NUTTX_KERNEL
kl_userspace();
showprogress('E');
#endif
/* Initialize onboard resources */
kl_boardinitialize();
showprogress('F');
/* Then start NuttX */
showprogress('\r');
showprogress('\n');
os_start();
/* Shoulnd't get here */
for (;;);
}
void __start(void)
{
const uint32_t *src;
uint32_t *dest;
/* Disable the watchdog timer */
kinetis_wddisable();
/* Clear .bss. We'll do this inline (vs. calling memset) just to be
* certain that there are no issues with the state of global variables.
*/
for (dest = &_sbss; dest < &_ebss; )
{
*dest++ = 0;
}
/* Move the initialized data section from his temporary holding spot in
* FLASH into the correct place in SRAM. The correct place in SRAM is
* give by _sdata and _edata. The temporary location is in FLASH at the
* end of all of the other read-only data (.text, .rodata) at _eronly.
*/
for (src = &_eronly, dest = &_sdata; dest < &_edata; )
{
*dest++ = *src++;
}
/* Copy any necessary code sections from FLASH to RAM. The correct
* destination in SRAM is given by _sramfuncs and _eramfuncs. The
* temporary location is in flash after the data initialization code
* at _framfuncs
*/
#ifdef CONFIG_ARCH_RAMFUNCS
for (src = &_framfuncs, dest = &_sramfuncs; dest < &_eramfuncs; )
{
*dest++ = *src++;
}
#endif
/* Perform clock and Kinetis module initialization (This depends on
* RAM functions having been copied to RAM).
*/
kinetis_clockconfig();
/* Configure the uart and perform early serial initialization so that we
* can get debug output as soon as possible (This depends on clock
* configuration).
*/
kinetis_lowsetup();
#ifdef USE_EARLYSERIALINIT
up_earlyserialinit();
#endif
/* For the case of the separate user-/kernel-space build, perform whatever
* platform specific initialization of the user memory is required.
* Normally this just means initializing the user space .data and .bss
* segments.
*/
#ifdef CONFIG_BUILD_PROTECTED
kinetis_userspace();
#endif
/* Initialize other on-board resources */
kinetis_boardinitialize();
/* Show reset status */
dbg("Reset status: %02x:%02x\n",
getreg8(KINETIS_SMC_SRSH), getreg8(KINETIS_SMC_SRSL));
/* Then start NuttX */
os_start();
/* Shouldn't get here */
for (;;);
}
void __start(void)
{
const uint32_t *src;
uint32_t *dest;
/* Configure the uart so that we can get debug output as soon as possible */
efm32_clockconfig();
efm32_fpuconfig();
efm32_lowsetup();
showprogress('A');
/* Clear .bss. We'll do this inline (vs. calling memset) just to be
* certain that there are no issues with the state of global variables.
*/
for (dest = &_sbss; dest < &_ebss; )
{
*dest++ = 0;
}
showprogress('B');
/* Move the initialized data section from his temporary holding spot in
* FLASH into the correct place in SRAM. The correct place in SRAM is
* give by _sdata and _edata. The temporary location is in FLASH at the
* end of all of the other read-only data (.text, .rodata) at _eronly.
*/
for (src = &_eronly, dest = &_sdata; dest < &_edata; )
{
*dest++ = *src++;
}
showprogress('C');
/* Perform early serial initialization */
up_earlyserialinit();
showprogress('D');
/* For the case of the separate user-/kernel-space build, perform whatever
* platform specific initialization of the user memory is required.
* Normally this just means initializing the user space .data and .bss
* segments.
*/
#ifdef CONFIG_NUTTX_KERNEL
efm32_userspace();
showprogress('E');
#endif
/* Initialize onboard resources */
efm32_boardinitialize();
showprogress('F');
/* Then start NuttX */
showprogress('\r');
showprogress('\n');
#ifdef CONFIG_STACK_COLORATION
/* Set the IDLE stack to the coloration value and jump into os_start() */
go_os_start((FAR void *)&_ebss, CONFIG_IDLETHREAD_STACKSIZE);
#else
/* Call os_start() */
os_start();
/* Shouldn't get here */
for(;;);
#endif
}
void __start(void)
{
const uint32_t *src;
uint32_t *dest;
/* Reset as many of the LPC43 peripherals as possible. This is necessary
* because the LPC43 does not provide any way of performing a full system
* reset under debugger control. So, if CONFIG_DEBUG is set (indicating
* that a debugger is being used?), the boot logic will call this
* function on all restarts.
*/
#ifdef CONFIG_DEBUG
lpc43_softreset();
#endif
/* Make sure that any exceptions (such as hard faults) that occur before
* we are initialized are caught by the BOOT ROM.
*/
lpc43_setbootrom();
/* Configure the CGU clocking and the console uart so that we can get
* debug output as soon as possible.
*/
lpc43_clockconfig();
lpc43_lowsetup();
showprogress('A');
/* If we are executing from external FLASH, then enable buffering */
lpc43_enabuffering();
/* Clear .bss. We'll do this inline (vs. calling memset) just to be
* certain that there are no issues with the state of global variables.
*/
for (dest = &_sbss; dest < &_ebss; )
{
*dest++ = 0;
}
showprogress('B');
/* Move the initialized data section from his temporary holding spot in
* FLASH into the correct place in SRAM. The correct place in SRAM is
* give by _sdata and _edata. The temporary location is in FLASH at the
* end of all of the other read-only data (.text, .rodata) at _eronly.
*/
for (src = &_eronly, dest = &_sdata; dest < &_edata; )
{
*dest++ = *src++;
}
showprogress('C');
/* Initialize the FPU (if configured) */
lpc43_fpuconfig();
showprogress('D');
/* Perform early serial initialization */
#ifdef USE_EARLYSERIALINIT
up_earlyserialinit();
#endif
showprogress('E');
/* For the case of the separate user-/kernel-space build, perform whatever
* platform specific initialization of the user memory is required.
* Normally this just means initializing the user space .data and .bss
* segments.
*/
#ifdef CONFIG_NUTTX_KERNEL
lpc43_userspace();
showprogress('F');
#endif
/* Initialize onboard resources */
lpc43_boardinitialize();
showprogress('G');
/* Then start NuttX */
showprogress('\r');
showprogress('\n');
os_start();
/* Shouldn't get here */
for (;;);
}
void __start(void)
{
const uint32_t *src;
uint32_t *dest;
/* Clear .bss. We'll do this inline (vs. calling memset) just to be
* certain that there are no issues with the state of global variables.
*/
for (dest = &_sbss; dest < &_ebss; )
{
*dest++ = 0;
}
/* Move the initialized data section from his temporary holding spot in
* FLASH into the correct place in SRAM. The correct place in SRAM is
* give by _sdata and _edata. The temporary location is in FLASH at the
* end of all of the other read-only data (.text, .rodata) at _eronly.
*/
for (src = &_eronly, dest = &_sdata; dest < &_edata; )
{
*dest++ = *src++;
}
#ifdef NEED_WDT_DISABLE
/* Disable the watchdog timer */
# warning Missing logic
#endif
/* Copy any necessary code sections from FLASH to RAM. The correct
* destination in SRAM is geive by _sramfuncs and _eramfuncs. The
* temporary location is in flash after the data initalization code
* at _framfuncs. This must be done before sam_clockconfig() can be
* called (at least for the SAM4L family).
*/
#ifdef CONFIG_ARCH_RAMFUNCS
for (src = &_framfuncs, dest = &_sramfuncs; dest < &_eramfuncs; )
{
*dest++ = *src++;
}
#endif
/* Configure the uart so that we can get debug output as soon as possible */
sam_clockconfig();
sam_lowsetup();
showprogress('A');
/* Perform early serial initialization */
#ifdef USE_EARLYSERIALINIT
up_earlyserialinit();
#endif
showprogress('B');
/* For the case of the separate user-/kernel-space build, perform whatever
* platform specific initialization of the user memory is required.
* Normally this just means initializing the user space .data and .bss
* segements.
*/
#ifdef CONFIG_NUTTX_KERNEL
sam_userspace();
showprogress('C');
#endif
/* Initialize onboard resources */
sam_boardinitialize();
showprogress('D');
/* Then start NuttX */
showprogress('\r');
showprogress('\n');
os_start();
/* Shouldn't get here */
for(;;);
}
