void *
util_make_geometry_passthrough_shader(struct pipe_context *pipe,
uint num_attribs,
const ubyte *semantic_names,
const ubyte *semantic_indexes)
{
static const unsigned zero[4] = {0, 0, 0, 0};
struct ureg_program *ureg;
struct ureg_dst dst[PIPE_MAX_SHADER_OUTPUTS];
struct ureg_src src[PIPE_MAX_SHADER_INPUTS];
struct ureg_src imm;
unsigned i;
ureg = ureg_create(PIPE_SHADER_GEOMETRY);
if (!ureg)
return NULL;
ureg_property(ureg, TGSI_PROPERTY_GS_INPUT_PRIM, PIPE_PRIM_POINTS);
ureg_property(ureg, TGSI_PROPERTY_GS_OUTPUT_PRIM, PIPE_PRIM_POINTS);
ureg_property(ureg, TGSI_PROPERTY_GS_MAX_OUTPUT_VERTICES, 1);
ureg_property(ureg, TGSI_PROPERTY_GS_INVOCATIONS, 1);
imm = ureg_DECL_immediate_uint(ureg, zero, 4);
/**
* Loop over all the attribs and declare the corresponding
* declarations in the geometry shader
*/
for (i = 0; i < num_attribs; i++) {
src[i] = ureg_DECL_input(ureg, semantic_names[i],
semantic_indexes[i], 0, 1);
src[i] = ureg_src_dimension(src[i], 0);
dst[i] = ureg_DECL_output(ureg, semantic_names[i], semantic_indexes[i]);
}
/* MOV dst[i] src[i] */
for (i = 0; i < num_attribs; i++) {
ureg_MOV(ureg, dst[i], src[i]);
}
/* EMIT IMM[0] */
ureg_insn(ureg, TGSI_OPCODE_EMIT, NULL, 0, &imm, 1, 0);
/* END */
ureg_END(ureg);
return ureg_create_shader_and_destroy(ureg, pipe);
}
void *
st_pbo_create_gs(struct st_context *st)
{
static const int zero = 0;
struct ureg_program *ureg;
struct ureg_dst out_pos;
struct ureg_dst out_layer;
struct ureg_src in_pos;
struct ureg_src imm;
unsigned i;
ureg = ureg_create(PIPE_SHADER_GEOMETRY);
if (!ureg)
return NULL;
ureg_property(ureg, TGSI_PROPERTY_GS_INPUT_PRIM, PIPE_PRIM_TRIANGLES);
ureg_property(ureg, TGSI_PROPERTY_GS_OUTPUT_PRIM, PIPE_PRIM_TRIANGLE_STRIP);
ureg_property(ureg, TGSI_PROPERTY_GS_MAX_OUTPUT_VERTICES, 3);
out_pos = ureg_DECL_output(ureg, TGSI_SEMANTIC_POSITION, 0);
out_layer = ureg_DECL_output(ureg, TGSI_SEMANTIC_LAYER, 0);
in_pos = ureg_DECL_input(ureg, TGSI_SEMANTIC_POSITION, 0, 0, 1);
imm = ureg_DECL_immediate_int(ureg, &zero, 1);
for (i = 0; i < 3; ++i) {
struct ureg_src in_pos_vertex = ureg_src_dimension(in_pos, i);
/* out_pos = in_pos[i] */
ureg_MOV(ureg, out_pos, in_pos_vertex);
/* out_layer.x = f2i(in_pos[i].z) */
ureg_F2I(ureg, ureg_writemask(out_layer, TGSI_WRITEMASK_X),
ureg_scalar(in_pos_vertex, TGSI_SWIZZLE_Z));
ureg_EMIT(ureg, ureg_scalar(imm, TGSI_SWIZZLE_X));
}
ureg_END(ureg);
return ureg_create_shader_and_destroy(ureg, st->pipe);
}
/**
* Translate Mesa program to TGSI format.
* \param program the program to translate
* \param numInputs number of input registers used
* \param inputMapping maps Mesa fragment program inputs to TGSI generic
* input indexes
* \param inputSemanticName the TGSI_SEMANTIC flag for each input
* \param inputSemanticIndex the semantic index (ex: which texcoord) for
* each input
* \param interpMode the TGSI_INTERPOLATE_LINEAR/PERSP mode for each input
* \param numOutputs number of output registers used
* \param outputMapping maps Mesa fragment program outputs to TGSI
* generic outputs
* \param outputSemanticName the TGSI_SEMANTIC flag for each output
* \param outputSemanticIndex the semantic index (ex: which texcoord) for
* each output
*
* \return PIPE_OK or PIPE_ERROR_OUT_OF_MEMORY
*/
enum pipe_error
st_translate_mesa_program(
struct gl_context *ctx,
uint procType,
struct ureg_program *ureg,
const struct gl_program *program,
GLuint numInputs,
const GLuint inputMapping[],
const ubyte inputSemanticName[],
const ubyte inputSemanticIndex[],
const GLuint interpMode[],
GLuint numOutputs,
const GLuint outputMapping[],
const ubyte outputSemanticName[],
const ubyte outputSemanticIndex[],
boolean passthrough_edgeflags,
boolean clamp_color)
{
struct st_translate translate, *t;
unsigned i;
enum pipe_error ret = PIPE_OK;
assert(numInputs <= ARRAY_SIZE(t->inputs));
assert(numOutputs <= ARRAY_SIZE(t->outputs));
t = &translate;
memset(t, 0, sizeof *t);
t->procType = procType;
t->inputMapping = inputMapping;
t->outputMapping = outputMapping;
t->ureg = ureg;
/*_mesa_print_program(program);*/
/*
* Declare input attributes.
*/
if (procType == TGSI_PROCESSOR_FRAGMENT) {
for (i = 0; i < numInputs; i++) {
t->inputs[i] = ureg_DECL_fs_input(ureg,
inputSemanticName[i],
inputSemanticIndex[i],
interpMode[i]);
}
if (program->InputsRead & VARYING_BIT_POS) {
/* Must do this after setting up t->inputs, and before
* emitting constant references, below:
*/
emit_wpos(st_context(ctx), t, program, ureg);
}
if (program->InputsRead & VARYING_BIT_FACE) {
emit_face_var( t, program );
}
/*
* Declare output attributes.
*/
for (i = 0; i < numOutputs; i++) {
switch (outputSemanticName[i]) {
case TGSI_SEMANTIC_POSITION:
t->outputs[i] = ureg_DECL_output( ureg,
TGSI_SEMANTIC_POSITION, /* Z / Depth */
outputSemanticIndex[i] );
t->outputs[i] = ureg_writemask( t->outputs[i],
TGSI_WRITEMASK_Z );
break;
case TGSI_SEMANTIC_STENCIL:
t->outputs[i] = ureg_DECL_output( ureg,
TGSI_SEMANTIC_STENCIL, /* Stencil */
outputSemanticIndex[i] );
t->outputs[i] = ureg_writemask( t->outputs[i],
TGSI_WRITEMASK_Y );
break;
case TGSI_SEMANTIC_COLOR:
t->outputs[i] = ureg_DECL_output( ureg,
TGSI_SEMANTIC_COLOR,
outputSemanticIndex[i] );
break;
default:
debug_assert(0);
return 0;
}
}
}
else if (procType == TGSI_PROCESSOR_GEOMETRY) {
for (i = 0; i < numInputs; i++) {
t->inputs[i] = ureg_DECL_input(ureg,
inputSemanticName[i],
inputSemanticIndex[i], 0, 1);
}
for (i = 0; i < numOutputs; i++) {
t->outputs[i] = ureg_DECL_output( ureg,
outputSemanticName[i],
outputSemanticIndex[i] );
}
}
else {
assert(procType == TGSI_PROCESSOR_VERTEX);
for (i = 0; i < numInputs; i++) {
t->inputs[i] = ureg_DECL_vs_input(ureg, i);
}
for (i = 0; i < numOutputs; i++) {
t->outputs[i] = ureg_DECL_output( ureg,
outputSemanticName[i],
outputSemanticIndex[i] );
if (outputSemanticName[i] == TGSI_SEMANTIC_FOG) {
/* force register to contain a fog coordinate in the form (F, 0, 0, 1). */
ureg_MOV(ureg,
ureg_writemask(t->outputs[i], TGSI_WRITEMASK_YZW),
ureg_imm4f(ureg, 0.0f, 0.0f, 0.0f, 1.0f));
t->outputs[i] = ureg_writemask(t->outputs[i], TGSI_WRITEMASK_X);
}
}
if (passthrough_edgeflags)
emit_edgeflags( t, program );
}
/* Declare address register.
*/
if (program->NumAddressRegs > 0) {
debug_assert( program->NumAddressRegs == 1 );
t->address[0] = ureg_DECL_address( ureg );
}
/* Declare misc input registers
*/
{
GLbitfield sysInputs = program->SystemValuesRead;
unsigned numSys = 0;
for (i = 0; sysInputs; i++) {
if (sysInputs & (1 << i)) {
unsigned semName = _mesa_sysval_to_semantic[i];
t->systemValues[i] = ureg_DECL_system_value(ureg, numSys, semName, 0);
if (semName == TGSI_SEMANTIC_INSTANCEID ||
semName == TGSI_SEMANTIC_VERTEXID) {
/* From Gallium perspective, these system values are always
* integer, and require native integer support. However, if
* native integer is supported on the vertex stage but not the
* pixel stage (e.g, i915g + draw), Mesa will generate IR that
* assumes these system values are floats. To resolve the
* inconsistency, we insert a U2F.
*/
struct st_context *st = st_context(ctx);
struct pipe_screen *pscreen = st->pipe->screen;
assert(procType == TGSI_PROCESSOR_VERTEX);
assert(pscreen->get_shader_param(pscreen, PIPE_SHADER_VERTEX, PIPE_SHADER_CAP_INTEGERS));
(void) pscreen; /* silence non-debug build warnings */
if (!ctx->Const.NativeIntegers) {
struct ureg_dst temp = ureg_DECL_local_temporary(t->ureg);
ureg_U2F( t->ureg, ureg_writemask(temp, TGSI_WRITEMASK_X), t->systemValues[i]);
t->systemValues[i] = ureg_scalar(ureg_src(temp), 0);
}
}
numSys++;
sysInputs &= ~(1 << i);
}
}
}
if (program->IndirectRegisterFiles & (1 << PROGRAM_TEMPORARY)) {
/* If temps are accessed with indirect addressing, declare temporaries
* in sequential order. Else, we declare them on demand elsewhere.
*/
for (i = 0; i < program->NumTemporaries; i++) {
/* XXX use TGSI_FILE_TEMPORARY_ARRAY when it's supported by ureg */
t->temps[i] = ureg_DECL_temporary( t->ureg );
}
}
/* Emit constants and immediates. Mesa uses a single index space
* for these, so we put all the translated regs in t->constants.
*/
if (program->Parameters) {
t->constants = calloc( program->Parameters->NumParameters,
sizeof t->constants[0] );
if (t->constants == NULL) {
ret = PIPE_ERROR_OUT_OF_MEMORY;
goto out;
}
for (i = 0; i < program->Parameters->NumParameters; i++) {
switch (program->Parameters->Parameters[i].Type) {
case PROGRAM_STATE_VAR:
case PROGRAM_UNIFORM:
t->constants[i] = ureg_DECL_constant( ureg, i );
break;
/* Emit immediates only when there's no indirect addressing of
* the const buffer.
* FIXME: Be smarter and recognize param arrays:
* indirect addressing is only valid within the referenced
* array.
*/
case PROGRAM_CONSTANT:
if (program->IndirectRegisterFiles & PROGRAM_ANY_CONST)
t->constants[i] = ureg_DECL_constant( ureg, i );
else
t->constants[i] =
ureg_DECL_immediate( ureg,
(const float*) program->Parameters->ParameterValues[i],
4 );
break;
default:
break;
}
}
}
/* texture samplers */
for (i = 0; i < ctx->Const.Program[MESA_SHADER_FRAGMENT].MaxTextureImageUnits; i++) {
if (program->SamplersUsed & (1 << i)) {
t->samplers[i] = ureg_DECL_sampler( ureg, i );
}
}
/* Emit each instruction in turn:
*/
for (i = 0; i < program->NumInstructions; i++) {
set_insn_start( t, ureg_get_instruction_number( ureg ));
compile_instruction( ctx, t, &program->Instructions[i], clamp_color );
}
/* Fix up all emitted labels:
*/
for (i = 0; i < t->labels_count; i++) {
ureg_fixup_label( ureg,
t->labels[i].token,
t->insn[t->labels[i].branch_target] );
}
out:
free(t->insn);
free(t->labels);
free(t->constants);
if (t->error) {
debug_printf("%s: translate error flag set\n", __func__);
}
return ret;
}
